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Wed, 25 Mar 2026 15:55:17 -0700 (PDT) From: Bhargav Joshi To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, xuwei5@hisilicon.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, ulf.hansson@linaro.org, zhangfei.gao@linaro.org, linux-mmc@vger.kernel.org Cc: daniel.baluta@nxp.com, simona.toaca@nxp.com, d-gole@ti.com, m-chawdhry@ti.com, rougueprince47@gmail.com, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: mmc: hisilicon,hi3660-dw-mshc: Convert to DT schema Date: Thu, 26 Mar 2026 04:24:38 +0530 Message-ID: <20260325225439.68161-2-rougueprince47@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260325225439.68161-1-rougueprince47@gmail.com> References: <20260325225439.68161-1-rougueprince47@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the Hisilicon DesignWare Mobile Storage Host Controller (dw-mshc) bindings from text format to DT schema. As part of this conversion, the binding file is renamed from k3-dw-mshc.txt to hisilicon,hi3660-dw-mshc.yaml to align with compatible string naming conventions. Examples have been updated to pass schema validation. Note: synopsys-dw-mshc binding specifies clock names as "biu" followed by "ciu". However, this Hisilicon binding reverses the order to 'ciu' then 'biu' to match both the legacy text binding and in-kernel Hisilicon DTS board files. Signed-off-by: Bhargav Joshi Acked-by: Zhangfei Gao Reviewed-by: Krzysztof Kozlowski --- Changes in v2: - Grouped compatible strings into an enum. - Replaced raw numbers with proper flags. - Fixed property order and removed invalid hex values. - Added explanation for clock order change in commit message. - Collected Acked-by tag. .../mmc/hisilicon,hi3660-dw-mshc.yaml | 117 ++++++++++++++++++ .../devicetree/bindings/mmc/k3-dw-mshc.txt | 73 ----------- 2 files changed, 117 insertions(+), 73 deletions(-) create mode 100644 Documentation/devicetree/bindings/mmc/hisilicon,hi3660-= dw-mshc.yaml delete mode 100644 Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt diff --git a/Documentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc= .yaml b/Documentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml new file mode 100644 index 000000000000..296bd776488e --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/hisilicon,hi3660-dw-mshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon specific extensions to the Synopsys Designware Mobile Sto= rage Host Controller + +maintainers: + - Zhangfei Gao + +description: + The Synopsys designware mobile storage host controller is used to interf= ace + a SoC with storage medium such as eMMC or SD/MMC cards. This file docume= nts + differences between the core Synopsys dw mshc controller properties desc= ribed + by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific + extensions to the Synopsys Designware Mobile Storage Host Controller. + +allOf: + - $ref: /schemas/mmc/synopsys-dw-mshc-common.yaml# + +properties: + compatible: + oneOf: + - enum: + - hisilicon,hi3660-dw-mshc + - hisilicon,hi4511-dw-mshc + - hisilicon,hi6220-dw-mshc + - items: + - const: hisilicon,hi3670-dw-mshc + - const: hisilicon,hi3660-dw-mshc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: card interface unit clock + - description: bus interface unit clock + + clock-names: + items: + - const: ciu + - const: biu + + hisilicon,peripheral-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle of syscon used to control peripheral. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + mmc@fcd03000 { + compatible =3D "hisilicon,hi4511-dw-mshc"; + reg =3D <0xfcd03000 0x1000>; + interrupts =3D ; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&mmc_clock HI3620_SD_CIUCLK>, <&clock HI3620_DDRC_PER_= CLK>; + clock-names =3D "ciu", "biu"; + vmmc-supply =3D <&ldo12>; + fifo-depth =3D <0x100>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; + bus-width =3D <4>; + disable-wp; + cd-gpios =3D <&gpio10 3 GPIO_ACTIVE_HIGH>; + cap-mmc-highspeed; + cap-sd-highspeed; + }; + + - | + #include + #include + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + mmc@f723e000 { + compatible =3D "hisilicon,hi6220-dw-mshc"; + reg =3D <0x0 0xf723e000 0x0 0x1000>; + interrupts =3D ; + clocks =3D <&clock_sys HI6220_MMC1_CIUCLK>, + <&clock_sys HI6220_MMC1_CLK>; + clock-names =3D "ciu", "biu"; + bus-width =3D <4>; + disable-wp; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + card-detect-delay =3D <200>; + hisilicon,peripheral-syscon =3D <&ao_ctrl>; + cd-gpios =3D <&gpio1 0 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default", "idle"; + pinctrl-0 =3D <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; + pinctrl-1 =3D <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; + vqmmc-supply =3D <&ldo7>; + vmmc-supply =3D <&ldo10>; + }; + }; diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documen= tation/devicetree/bindings/mmc/k3-dw-mshc.txt deleted file mode 100644 index 36c4bea675d5..000000000000 --- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt +++ /dev/null @@ -1,73 +0,0 @@ -* Hisilicon specific extensions to the Synopsys Designware Mobile - Storage Host Controller - -Read synopsys-dw-mshc.txt for more details - -The Synopsys designware mobile storage host controller is used to interface -a SoC with storage medium such as eMMC or SD/MMC cards. This file documents -differences between the core Synopsys dw mshc controller properties descri= bed -by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific -extensions to the Synopsys Designware Mobile Storage Host Controller. - -Required Properties: - -* compatible: should be one of the following. - - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific exten= sions. - - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers - with hi3670 specific extensions. - - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific exten= sions. - - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific exten= sions. - -Optional Properties: -- hisilicon,peripheral-syscon: phandle of syscon used to control periphera= l. - -Example: - - /* for Hi3620 */ - - /* SoC portion */ - dwmmc_0: dwmmc0@fcd03000 { - compatible =3D "hisilicon,hi4511-dw-mshc"; - reg =3D <0xfcd03000 0x1000>; - interrupts =3D <0 16 4>; - #address-cells =3D <1>; - #size-cells =3D <0>; - clocks =3D <&mmc_clock HI3620_SD_CIUCLK>, <&clock HI3620_DDRC_PER_CLK>; - clock-names =3D "ciu", "biu"; - }; - - /* Board portion */ - dwmmc0@fcd03000 { - vmmc-supply =3D <&ldo12>; - fifo-depth =3D <0x100>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; - bus-width =3D <4>; - disable-wp; - cd-gpios =3D <&gpio10 3 0>; - cap-mmc-highspeed; - cap-sd-highspeed; - }; - - /* for Hi6220 */ - - dwmmc_1: dwmmc1@f723e000 { - compatible =3D "hisilicon,hi6220-dw-mshc"; - bus-width =3D <0x4>; - disable-wp; - cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - card-detect-delay =3D <200>; - hisilicon,peripheral-syscon =3D <&ao_ctrl>; - reg =3D <0x0 0xf723e000 0x0 0x1000>; - interrupts =3D <0x0 0x49 0x4>; - clocks =3D <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; - clock-names =3D "ciu", "biu"; - cd-gpios =3D <&gpio1 0 1>; - pinctrl-names =3D "default", "idle"; - pinctrl-0 =3D <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; - pinctrl-1 =3D <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; 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Wed, 25 Mar 2026 15:55:26 -0700 (PDT) From: Bhargav Joshi To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, xuwei5@hisilicon.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, ulf.hansson@linaro.org, zhangfei.gao@linaro.org, linux-mmc@vger.kernel.org Cc: daniel.baluta@nxp.com, simona.toaca@nxp.com, d-gole@ti.com, m-chawdhry@ti.com, rougueprince47@gmail.com, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 2/2] arm64: dts: hisilicon: Rename dwmmc nodes to mmc Date: Thu, 26 Mar 2026 04:24:39 +0530 Message-ID: <20260325225439.68161-3-rougueprince47@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260325225439.68161-1-rougueprince47@gmail.com> References: <20260325225439.68161-1-rougueprince47@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The core mmc devicetree schema expects mmc controller nodes to be named using '^mmc(@.*)?$' pattern. The legacy Hisilicon SoC files (hi3660, hi3670, and hi6220) previously used the 'dwmmc' prefix for their nodes. This caused warnings during dtbs_check. Rename the 'dwmmc' nodes to 'mmc' to comply with the standard schema and dtbs_check warnings. The legacy phandle labels are kept intact. Signed-off-by: Bhargav Joshi Acked-by: Zhangfei Gao Reviewed-by: Krzysztof Kozlowski --- Changes in v2: - No code changes. - Collected Acked-by and Reviewed-by tags. =20 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 +++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dt= s/hisilicon/hi3660.dtsi index 957a1b41f19b..374aa173bec6 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1057,7 +1057,7 @@ ufs: ufs@ff3b0000 { }; =20 /* SD */ - dwmmc1: dwmmc1@ff37f000 { + dwmmc1: mmc@ff37f000 { compatible =3D "hisilicon,hi3660-dw-mshc"; reg =3D <0x0 0xff37f000 0x0 0x1000>; #address-cells =3D <1>; @@ -1075,7 +1075,7 @@ dwmmc1: dwmmc1@ff37f000 { }; =20 /* SDIO */ - dwmmc2: dwmmc2@ff3ff000 { + dwmmc2: mmc@ff3ff000 { compatible =3D "hisilicon,hi3660-dw-mshc"; reg =3D <0x0 0xff3ff000 0x0 0x1000>; #address-cells =3D <0x1>; diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dt= s/hisilicon/hi3670.dtsi index 886b93c5893a..0db1849a2878 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -679,7 +679,7 @@ ufs: ufs@ff3c0000 { }; =20 /* SD */ - dwmmc1: dwmmc1@ff37f000 { + dwmmc1: mmc@ff37f000 { compatible =3D "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc"; reg =3D <0x0 0xff37f000 0x0 0x1000>; @@ -698,7 +698,7 @@ dwmmc1: dwmmc1@ff37f000 { }; =20 /* SDIO */ - dwmmc2: dwmmc2@fc183000 { + dwmmc2: mmc@fc183000 { compatible =3D "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc"; reg =3D <0x0 0xfc183000 0x0 0x1000>; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dt= s/hisilicon/hi6220.dtsi index f8b56d443850..61eaa7f8c1c9 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -799,7 +799,7 @@ mailbox: mailbox@f7510000 { #mbox-cells =3D <3>; }; =20 - dwmmc_0: dwmmc0@f723d000 { + dwmmc_0: mmc@f723d000 { compatible =3D "hisilicon,hi6220-dw-mshc"; reg =3D <0x0 0xf723d000 0x0 0x1000>; interrupts =3D <0x0 0x48 0x4>; @@ -812,7 +812,7 @@ dwmmc_0: dwmmc0@f723d000 { &emmc_cfg_func &emmc_rst_cfg_func>; }; =20 - dwmmc_1: dwmmc1@f723e000 { + dwmmc_1: mmc@f723e000 { compatible =3D "hisilicon,hi6220-dw-mshc"; hisilicon,peripheral-syscon =3D <&ao_ctrl>; reg =3D <0x0 0xf723e000 0x0 0x1000>; @@ -828,7 +828,7 @@ dwmmc_1: dwmmc1@f723e000 { pinctrl-1 =3D <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; }; =20 - dwmmc_2: dwmmc2@f723f000 { + dwmmc_2: mmc@f723f000 { compatible =3D "hisilicon,hi6220-dw-mshc"; reg =3D <0x0 0xf723f000 0x0 0x1000>; interrupts =3D <0x0 0x4a 0x4>; --=20 2.53.0