From nobody Fri Apr 3 04:35:27 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 812CF2D5950; Wed, 25 Mar 2026 03:58:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774411132; cv=none; b=Jf2xNLYJK5dUOuR0ohs8E/s+4yq27LvCxHBp0GzmtCBQpJM8fnoUk7P8x4NI3x3Zxzf/fGC9y9Co8tchKIHOYVNjolnVg03v862+GkpzFj4CRaJWEHAbfPQsUR+uOZyUK2DL/s/BxIeWthyNEYo0TQMeh0KSDyMM3kKf9M/ZIpo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774411132; c=relaxed/simple; bh=pBYi0QyxZkUhIoE/ZkcJ4VYYr593hQwCZVyAWSQz6TQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Htu/+f5Awb9/PJabVfI9biXr6ZD9zWWenOAid9MxQYiLsjDX2IzJjp/0aJDJL/rqcTj+eeTMs5G7uj6WXR/WrnFQEbdjzlHO7dL6Vk3thuAfvOR9OqQCj5Pzn601l1LMcRfmoQi4ZK8wml26bfzQycHPwTK8xpxga3uvv7sChr0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=I63Zx87a; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="I63Zx87a" X-UUID: ebd2cf1c27fe11f1a02d4725871ece0b-20260325 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=D+YQ3c1JxIPYJ6rQ2JZt6TXgpTOOwn4ufLcw8yJ1Rec=; b=I63Zx87aDFNeZwSnUgv0knTcb6E4dj23SDMjK2hxEw8JUTJ+XUHS2ehqeWLZjhLnSNrwIp/GtQf1fYKHn0LBIdlcaegyBhkuqEFHLxRiDWJ6WrDGPKaQ1EPZW1dXDSCoxT2AZJGIUzq1E+RGigLuQOVJjB6Psbzj7vDOsiUKczE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.12,REQID:1c38b843-ec1d-4d82-9e6d-6c0073fce575,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:e7bac3a,CLOUDID:a53faa8e-6df4-4a3d-a7a4-fbdc42d669ce,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: ebd2cf1c27fe11f1a02d4725871ece0b-20260325 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1502807647; Wed, 25 Mar 2026 11:58:45 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Wed, 25 Mar 2026 11:58:44 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Wed, 25 Mar 2026 11:58:44 +0800 From: Jason-JH Lin To: Jassi Brar , Chun-Kuang Hu , AngeloGioacchino Del Regno , Nicolas Dufresne , Mauro Carvalho Chehab CC: Matthias Brugger , Jason-JH Lin , Nancy Lin , Singo Chang , Paul-PL Chen , Moudy Ho , Xiandong Wang , Sirius Wang , Fei Shao , Chen-yu Tsai , , , , , , Subject: [PATCH v2 4/5] media: platform: mtk-mdp3: Refactor CMDQ writes for CMDQ API change Date: Wed, 25 Mar 2026 11:57:41 +0800 Message-ID: <20260325035836.2110757-5-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260325035836.2110757-1-jason-jh.lin@mediatek.com> References: <20260325035836.2110757-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Update CMDQ register writes to use subsys-aware APIs, cmdq_pkt_write_subsys() and cmdq_pkt_write_mask_subsys(). This conforms to recent CMDQ API changes that split access by subsys ID support. Since all current MDP SoCs support subsys ID, and future MDP deployments will not run on SoCs without subsys ID, only subsys-specific API calls are needed. No logic for non-subsys ID hardware is required. Signed-off-by: Jason-JH Lin Reviewed-by: AngeloGioacchino Del Regno --- drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c | 4 ++-- drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c b/drivers= /media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c index d30a05782ab9..8dff981f6720 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c @@ -321,7 +321,7 @@ static int mdp_path_config_subfrm(struct mdp_cmdq_cmd *= cmd, /* Enable mux settings */ for (index =3D 0; index < ctrl->num_sets; index++) { set =3D &ctrl->sets[index]; - cmdq_pkt_write(&cmd->pkt, set->subsys_id, set->reg, set->value); + cmdq_pkt_write_subsys(&cmd->pkt, set->subsys_id, set->reg, set->reg, set= ->value); } /* Config sub-frame information */ for (index =3D (num_comp - 1); index >=3D 0; index--) { @@ -376,7 +376,7 @@ static int mdp_path_config_subfrm(struct mdp_cmdq_cmd *= cmd, /* Disable mux settings */ for (index =3D 0; index < ctrl->num_sets; index++) { set =3D &ctrl->sets[index]; - cmdq_pkt_write(&cmd->pkt, set->subsys_id, set->reg, 0); + cmdq_pkt_write_subsys(&cmd->pkt, set->subsys_id, set->reg, set->reg, 0); } =20 return 0; diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h b/drivers= /media/platform/mediatek/mdp3/mtk-mdp3-comp.h index 681906c16419..c6fc180950f2 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h @@ -12,14 +12,14 @@ #define MM_REG_WRITE_MASK(cmd, id, base, ofst, val, mask) \ do { \ typeof(mask) (m) =3D (mask); \ - cmdq_pkt_write_mask(&((cmd)->pkt), id, (base) + (ofst), \ - (val), \ + cmdq_pkt_write_mask_subsys(&((cmd)->pkt), (id), (base), \ + (base) + (ofst), (val), \ (((m) & (ofst##_MASK)) =3D=3D (ofst##_MASK)) ? \ (0xffffffff) : (m)); \ } while (0) =20 #define MM_REG_WRITE(cmd, id, base, ofst, val) \ - cmdq_pkt_write(&((cmd)->pkt), id, (base) + (ofst), (val)) + cmdq_pkt_write_subsys(&((cmd)->pkt), (id), (base), (base) + (ofst), (val)) =20 #define MM_REG_WAIT(cmd, evt) \ do { \ --=20 2.43.0