From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AC601EDA2C; Wed, 25 Mar 2026 01:48:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403308; cv=none; b=X98RinOcMZN9tLiV22dnMhZXsz+EvhtmPCP7efAVAnskgkJQR5YfgiGyFQmp7B3vBlAXyth4uGzoLUT25whPz6Dbd0PPtldQRcn9IfvjBKQ28RTxYa+d6n5MwYD4BPz26RuI7THhCREd1TZNtGwEUSPUoakdKNaWwWGxACUAEjs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403308; c=relaxed/simple; bh=esySUl71PKPiQ5rlztA6Tfpvu1vzLlTV4KLeCs1Dyeo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=p8vY3fzuMr/Y6FzN9cvTwm2o8r/5QcXO01HI1/TL/7n27rQFaF5VK61NwmN0AmBz2N0pd1dmv2DHjVPvLY8OxVQkL43fvQBtbUuY4obhVXKMpGNdpoYRPa1O4Fxw4ohBl7FmOpusruL3UyfE7hgDzKuB/TQdl5LYdDxZSKbARtU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=InCaE0q5; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="InCaE0q5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403307; x=1805939307; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=esySUl71PKPiQ5rlztA6Tfpvu1vzLlTV4KLeCs1Dyeo=; b=InCaE0q5QwvNdJcxDqYxuGVC3ZdPDBb4GBggweI7h/QPjeWQlbuMIm71 mHmSdYkjBoYnN1IKAFuvEHyWT30vn8Y/sVJsXF5Ba7KhaitMcj5YWCZ8J 5X3ih4Hb0sHdtaGxxvX/Ni6TBqrn+K7QVNVOnTggS+fIWDxBGMNc9Mj74 1YtYUnRduQHalnlN/gSOBMNaZb2YMIcAN68P0iK8wGVq1/Dl/ITijHZZe eIhkKDtBezAu1VKj09/zeNYCZMWgND40IHEPC8EyUuGtCcfNkT3rHkb8N FNoHp/rMopSLvFbozmFjl4QIg8ClWujjORSR2m2lxC/hb2ns7Y087z+3q w==; X-CSE-ConnectionGUID: drcxEPkcRgGcrPeWLZeFoA== X-CSE-MsgGUID: lWnDdq0vRXuSQRCG1Vu0Ug== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317486" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317486" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:25 -0700 X-CSE-ConnectionGUID: DXD3/5+jS7eMIzegTQ3ZkA== X-CSE-MsgGUID: 9BxuK2AzSgOKSfifOttVIA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190776" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:25 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 01/17] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing Date: Tue, 24 Mar 2026 18:48:03 -0700 Message-ID: <20260325014819.1283566-2-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add optional pre- and post-decode callbacks to the PMT class so namespaces can perform setup and cleanup steps around header parsing. - Add pmt_pre_decode() and pmt_post_decode() to struct intel_pmt_namespace. - Update intel_pmt_dev_create() to invoke, in order: pre =E2=86=92 header_decode() =E2=86=92 post. - Keep the existing pmt_header_decode() callback unchanged. No functional changes. This adds flexibility for upcoming decoders while preserving current behavior. Signed-off-by: David E. Box --- V2 - No changes drivers/platform/x86/intel/pmt/class.c | 12 ++++++++++++ drivers/platform/x86/intel/pmt/class.h | 4 ++++ 2 files changed, 16 insertions(+) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index b4c9964df807..9b315334a69b 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -381,10 +381,22 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entr= y, struct intel_pmt_namespa if (IS_ERR(entry->disc_table)) return PTR_ERR(entry->disc_table); =20 + if (ns->pmt_pre_decode) { + ret =3D ns->pmt_pre_decode(intel_vsec_dev, entry); + if (ret) + return ret; + } + ret =3D ns->pmt_header_decode(entry, dev); if (ret) return ret; =20 + if (ns->pmt_post_decode) { + ret =3D ns->pmt_post_decode(intel_vsec_dev, entry); + if (ret) + return ret; + } + ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, disc_res); if (ret) return ret; diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index 1ae56a5baad2..ff39014b208c 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -62,6 +62,10 @@ struct intel_pmt_namespace { struct xarray *xa; int (*pmt_header_decode)(struct intel_pmt_entry *entry, struct device *dev); + int (*pmt_pre_decode)(struct intel_vsec_device *ivdev, + struct intel_pmt_entry *entry); + int (*pmt_post_decode)(struct intel_vsec_device *ivdev, + struct intel_pmt_entry *entry); int (*pmt_add_endpoint)(struct intel_vsec_device *ivdev, struct intel_pmt_entry *entry); }; --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE399267B05; Wed, 25 Mar 2026 01:48:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403309; cv=none; b=OrWhwl7UMLv19M/fPZzadt0sXfkuz3wroNN6qaChX1OAlp3jvVTTWb2kMsRM83zhVm8yYCSSekR8mfLtr4RQJbtQUjNNmNRSJEuVupVXqsqB6P0jreD7CTkUxDrA4My77yFLEfBQeOWh0UKkoBfpEASrXAcjWS5qoT1zx/4ZTcU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403309; c=relaxed/simple; bh=D2zqbsmuetU9cdO58nyqDzsxrl4v4tccz7HarHPw5WI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dSUK0rtk9WT4HKsRLUWOix0mZ3CWH8FlQXEOKqwEaxZms8PUz7vZwMhgCOzxe8j9rsX+fJRpSF3xiuAiF2XULZ2+LFoXJkK1ywtjybsYcniFI/UgmYx+WMBq8q4IwS3PIVvUaEcN2mUVFsPpN5yo0tmRBqPSW9Uu1lmPY/L9Gu0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OsgcbNvj; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OsgcbNvj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403308; x=1805939308; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=D2zqbsmuetU9cdO58nyqDzsxrl4v4tccz7HarHPw5WI=; b=OsgcbNvjXHsD6Tup0LdADye/Wir5De5RNJZvSltOhAtyORIlLF65Mg/X TCSzUAbOzp4+YJ3R5ZXKYCR1ynH3LJPuZXlFoX/cl6EHT0WqQT6s7foA0 LnK96SkJZy6/hzycJ193B9RZeoQZU/XhV9b3mCYlPeBM7HUlyj7xOD4ke V2XLIGVjdgoc4h/7HGXB+JLntnrfIuIJmfqbYJV0lEmruTzwykWasxyKQ LqJF7MxFEe+uzZZ90SfymTr4IiK8ezAtFJtxDt3wdJjw198WiO3imxaTH FdEFgP9WGM1E8xGLixdKjeBKp2fdwOiYyeTP57jXAQA6l+UOnPAmH4CP3 w==; X-CSE-ConnectionGUID: GIo4Y/suTi2EcixVElBLzg== X-CSE-MsgGUID: Bxh0VJKHQgWSoIDG4Dje9w== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317489" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317489" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:26 -0700 X-CSE-ConnectionGUID: ApYrjYYOT5qmUCMuAuIEbw== X-CSE-MsgGUID: wEz8rIRNTbyEn9WGd92w0Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190777" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:26 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 02/17] platform/x86/intel/pmt/crashlog: Split init into pre-decode Date: Tue, 24 Mar 2026 18:48:04 -0700 Message-ID: <20260325014819.1283566-3-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Refactor crashlog initialization to use the PMT namespace pre-decode hook: - Add pmt_crashlog_pre_decode() to parse type/version, select the crashlog_info, initialize the control mutex, and set entry->attr_grp. - Simplify pmt_crashlog_header_decode() to only read header fields from the discovery table. - Wire the namespace with .pmt_pre_decode =3D pmt_crashlog_pre_decode. This separates structural initialization from header parsing, aligning crashlog with the PMT class pre/post decode flow. Signed-off-by: David E. Box --- V2 - No changes drivers/platform/x86/intel/pmt/crashlog.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x= 86/intel/pmt/crashlog.c index b0393c9c5b4b..f936daf99e4d 100644 --- a/drivers/platform/x86/intel/pmt/crashlog.c +++ b/drivers/platform/x86/intel/pmt/crashlog.c @@ -496,11 +496,9 @@ static const struct crashlog_info *select_crashlog_inf= o(u32 type, u32 version) return &crashlog_type1_ver2; } =20 -static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry, - struct device *dev) +static int pmt_crashlog_pre_decode(struct intel_vsec_device *ivdev, + struct intel_pmt_entry *entry) { - void __iomem *disc_table =3D entry->disc_table; - struct intel_pmt_header *header =3D &entry->header; struct crashlog_entry *crashlog; u32 version; u32 type; @@ -513,6 +511,16 @@ static int pmt_crashlog_header_decode(struct intel_pmt= _entry *entry, mutex_init(&crashlog->control_mutex); =20 crashlog->info =3D select_crashlog_info(type, version); + entry->attr_grp =3D crashlog->info->attr_grp; + + return 0; +} + +static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry, + struct device *dev) +{ + void __iomem *disc_table =3D entry->disc_table; + struct intel_pmt_header *header =3D &entry->header; =20 header->access_type =3D GET_ACCESS(readl(disc_table)); header->guid =3D readl(disc_table + GUID_OFFSET); @@ -521,8 +529,6 @@ static int pmt_crashlog_header_decode(struct intel_pmt_= entry *entry, /* Size is measured in DWORDS, but accessor returns bytes */ header->size =3D GET_SIZE(readl(disc_table + SIZE_OFFSET)); =20 - entry->attr_grp =3D crashlog->info->attr_grp; - return 0; } =20 @@ -530,6 +536,7 @@ static DEFINE_XARRAY_ALLOC(crashlog_array); static struct intel_pmt_namespace pmt_crashlog_ns =3D { .name =3D "crashlog", .xa =3D &crashlog_array, + .pmt_pre_decode =3D pmt_crashlog_pre_decode, .pmt_header_decode =3D pmt_crashlog_header_decode, }; =20 --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C6F627281E; Wed, 25 Mar 2026 01:48:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403309; cv=none; b=dxupIhTkuVzCsbaT71OcbqZx2Ny+SYvfKGn27+dOke/mSGQxW7uBhdejs8aSpvGESFZ5F/Ywx0kILvWtOPN+be5ps0+mV7vLP6xoIpQ8DsReh1YMqCAQiY6lFV6YsUyp0nc6swry9fuZ7X12u0aqNFZsNTTcAvyPNHoiqJ2JnUA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403309; c=relaxed/simple; bh=i1ecLgcNoR9HAax0E0XF/g8dAznGag43FCd8P7rp4A8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=V6fGI5050Kmjg/YZuqQoCe+D+oJRtjwlZkmFz2+/+ByOF2akZydqQDXKXKZIzq6/3wBJ5V6Hv3BA2XS2L68zlGgoJ+nEginrLkMwJyemFYZzK94mkYg7GQVfIUOjqoKpv5XOp2XY7hHTbV+ESRqdd9EOOAQap1KgAe8BzaSoURU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OPWSqS8E; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OPWSqS8E" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403308; x=1805939308; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i1ecLgcNoR9HAax0E0XF/g8dAznGag43FCd8P7rp4A8=; b=OPWSqS8EjNFfua9iAgXN1J995ZePwLduuYOSn8iUN0xeNim64dTMUkP5 pe8nGw1HBaWk2Bq+S/Dwq1Iyc6yg4M+wsIB4HQjNg6+q+6GDpovCwvv5l zBHTr0B+6/bpVQDm/tau3JrWkCxZbssYn4PW4On7jZM5FOqovgCCCP6b6 hu9p/5VbqQwjAwjBbH4C2zH5tDg7/I0VAYOkf/yOF2TcDUsFACiASiKJ4 RowJKkcmyYwEvjHo0P9Nuevbzn4ccr4X48IIhk8O913LqP87vDG3a+SqT 6hRCyvENZWhHDjek22pwbdYaYx9Z4M+CERuu67HYZACu2nozhbDoqXN5K A==; X-CSE-ConnectionGUID: B2MpdCrDSL2Q9Ykvo+L4Yg== X-CSE-MsgGUID: vpM0zca4Tw20ijpMWh/Jsw== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317492" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317492" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:26 -0700 X-CSE-ConnectionGUID: TGW+pxBsSpql+/qvvyDVCA== X-CSE-MsgGUID: AgWz5LDOTLSwipoZz6OuWw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190778" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:26 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 03/17] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook Date: Tue, 24 Mar 2026 18:48:05 -0700 Message-ID: <20260325014819.1283566-4-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the telemetry namespace to use the new PMT class pre/post decode interface. The overlap check, which previously occurred during header decode, is now performed in the post-decode hook once header fields are populated. This preserves existing behavior while reusing the same header decode logic across PMT drivers. Signed-off-by: David E. Box --- V2 - No changes drivers/platform/x86/intel/pmt/class.h | 1 + drivers/platform/x86/intel/pmt/telemetry.c | 24 ++++++++++++++-------- 2 files changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index ff39014b208c..8a0db0ef58c1 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -37,6 +37,7 @@ struct intel_pmt_header { u32 size; u32 guid; u8 access_type; + u8 telem_type; }; =20 struct intel_pmt_entry { diff --git a/drivers/platform/x86/intel/pmt/telemetry.c b/drivers/platform/= x86/intel/pmt/telemetry.c index bdc7c24a3678..d22f633638be 100644 --- a/drivers/platform/x86/intel/pmt/telemetry.c +++ b/drivers/platform/x86/intel/pmt/telemetry.c @@ -58,14 +58,9 @@ struct pmt_telem_priv { struct intel_pmt_entry entry[]; }; =20 -static bool pmt_telem_region_overlaps(struct intel_pmt_entry *entry, - struct device *dev) +static bool pmt_telem_region_overlaps(struct device *dev, u32 guid, u32 ty= pe) { - u32 guid =3D readl(entry->disc_table + TELEM_GUID_OFFSET); - if (intel_pmt_is_early_client_hw(dev)) { - u32 type =3D TELEM_TYPE(readl(entry->disc_table)); - if ((type =3D=3D TELEM_TYPE_PUNIT_FIXED) || (guid =3D=3D TELEM_CLIENT_FIXED_BLOCK_GUID)) return true; @@ -80,15 +75,25 @@ static int pmt_telem_header_decode(struct intel_pmt_ent= ry *entry, void __iomem *disc_table =3D entry->disc_table; struct intel_pmt_header *header =3D &entry->header; =20 - if (pmt_telem_region_overlaps(entry, dev)) - return 1; - header->access_type =3D TELEM_ACCESS(readl(disc_table)); header->guid =3D readl(disc_table + TELEM_GUID_OFFSET); header->base_offset =3D readl(disc_table + TELEM_BASE_OFFSET); =20 /* Size is measured in DWORDS, but accessor returns bytes */ header->size =3D TELEM_SIZE(readl(disc_table)); + header->telem_type =3D TELEM_TYPE(readl(entry->disc_table)); + + return 0; +} + +static int pmt_telem_post_decode(struct intel_vsec_device *ivdev, + struct intel_pmt_entry *entry) +{ + struct intel_pmt_header *header =3D &entry->header; + struct device *dev =3D &ivdev->auxdev.dev; + + if (pmt_telem_region_overlaps(dev, header->guid, header->telem_type)) + return 1; =20 /* * Some devices may expose non-functioning entries that are @@ -131,6 +136,7 @@ static struct intel_pmt_namespace pmt_telem_ns =3D { .name =3D "telem", .xa =3D &telem_array, .pmt_header_decode =3D pmt_telem_header_decode, + .pmt_post_decode =3D pmt_telem_post_decode, .pmt_add_endpoint =3D pmt_telem_add_endpoint, }; =20 --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BED6275AFD; Wed, 25 Mar 2026 01:48:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403310; cv=none; b=WbtmmG2Jm4e3VS2LS/k7VqKJHrleiX2yAiC2k1HLpE7/9HYpg7ZvM0Qpno6jiJA5gPkrvKb06XshpT0XVYPyHrxYohJmZATFJS8nHs9NwUwiPWOhSyvAOTKPe8LAGlGVbK0453CoL7+db/C0u7xphyQByJyak/74KXV/l3MuFQY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403310; c=relaxed/simple; bh=tl7BrBjb85ZeuLHWNcJDNnwzzj//w046XBYDy35hDRg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pln/hZYy1Ccp/8CWKWEyVGwx075T8/tMQ+PIl6tI5TZrBTSa3h+DWdS+UiJ9xaRbo9JUIesQEfT8df8E6kC1FuCJg4BPbwueDc98ensXCnFEqw1rRcHtkj8US7ICST13B6I5hSkM7ruxonc9LML7Eg7u+W7ijrwaAIP+6Xx5Tk4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=GKtp12E4; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="GKtp12E4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403308; x=1805939308; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tl7BrBjb85ZeuLHWNcJDNnwzzj//w046XBYDy35hDRg=; b=GKtp12E4I0OEFXajDhKQpdd8tloeWg8L6p2UW6yHQq3w0sOCSg+5ns26 YLW4+oCKguDYzK27Pc8ENiu9+oL/I0UmgkgRdqPDzX0QUioHjY8PumVfI D2aj/MBGaXd6TNvgj6WjS/o/gbHFSdM6hlh6o5VYh3o/1MLiri88yb9rJ MIG0dzk6/KhByji34BfNZ5r7jP/Cm5okzAfmtTfYfLsvV/0T5nfVhZyWQ T95gIq5B+bBs4bYsnDlF99QKDrngEElG7Cn9FG5pMfYbzxmUbJ95BEsYP Yy4VVBSdmPLndHIAWVzMwHqA5aUFc+cUzamdUQdDmbZuMVCvDJEKT14zM g==; X-CSE-ConnectionGUID: ZvrAR3FvQCanjeEwElp+JQ== X-CSE-MsgGUID: f4UKVPA8S9i8+PkWbzHVhA== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317495" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317495" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:27 -0700 X-CSE-ConnectionGUID: lrTAWigbSuG/34QVh/RFrA== X-CSE-MsgGUID: fa18HYz6QhCifT/hWGks+w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190779" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:27 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 04/17] platform/x86/intel/pmt: Move header decode into common helper Date: Tue, 24 Mar 2026 18:48:06 -0700 Message-ID: <20260325014819.1283566-5-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Unify PMT discovery table parsing by moving header decode logic into the class driver. A new helper, pmt_read_header(), now fills in the standard header fields from the discovery table, replacing the per-namespace pmt_header_decode callbacks in telemetry and crashlog. This centralizes the discovery table bit-field definitions in class.h, removes duplicate decode code from telemetry and crashlog, and prepares the PMT class for additional discovery sources. Signed-off-by: David E. Box --- V2 changes: - Added PMT_GET_SIZE_BYTES(v), addressing Ilpo feedback on macro naming and unit clarity - Also in PMT_GET_SIZE_BYTES(v) change ((v) << 2) to ((v) * sizeof(u32)) for clarity - Removed unused macros from crashlog.c per feedback from Ilpo drivers/platform/x86/intel/pmt/class.c | 37 +++++++++++++++------- drivers/platform/x86/intel/pmt/class.h | 15 +++++++-- drivers/platform/x86/intel/pmt/crashlog.c | 23 -------------- drivers/platform/x86/intel/pmt/telemetry.c | 26 --------------- 4 files changed, 39 insertions(+), 62 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index 9b315334a69b..d652b21261f0 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -8,6 +8,7 @@ * Author: "Alexander Duyck" */ =20 +#include #include #include #include @@ -368,26 +369,40 @@ static int intel_pmt_dev_register(struct intel_pmt_en= try *entry, return ret; } =20 -int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_n= amespace *ns, - struct intel_vsec_device *intel_vsec_dev, int idx) +static int pmt_read_header(struct intel_vsec_device *ivdev, int idx, + struct intel_pmt_entry *entry) { - struct device *dev =3D &intel_vsec_dev->auxdev.dev; - struct resource *disc_res; - int ret; + struct intel_pmt_header *header =3D &entry->header; + struct device *dev =3D &ivdev->auxdev.dev; + u64 headers[2]; =20 - disc_res =3D &intel_vsec_dev->resource[idx]; - - entry->disc_table =3D devm_ioremap_resource(dev, disc_res); + entry->disc_table =3D devm_ioremap_resource(dev, &ivdev->resource[idx]); if (IS_ERR(entry->disc_table)) return PTR_ERR(entry->disc_table); =20 + memcpy_fromio(headers, entry->disc_table, 2 * sizeof(u64)); + + header->access_type =3D FIELD_GET(PMT_ACCESS_TYPE, headers[0]); + header->telem_type =3D FIELD_GET(PMT_TELEM_TYPE, headers[0]); + header->size =3D PMT_GET_SIZE_BYTES(headers[0]); + header->guid =3D FIELD_GET(PMT_GUID32, headers[0]); + header->base_offset =3D FIELD_GET(PMT_BASE_OFFSET, headers[1]); + + return 0; +} + +int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_n= amespace *ns, + struct intel_vsec_device *intel_vsec_dev, int idx) +{ + int ret; + if (ns->pmt_pre_decode) { ret =3D ns->pmt_pre_decode(intel_vsec_dev, entry); if (ret) return ret; } =20 - ret =3D ns->pmt_header_decode(entry, dev); + ret =3D pmt_read_header(intel_vsec_dev, idx, entry); if (ret) return ret; =20 @@ -397,11 +412,11 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entr= y, struct intel_pmt_namespa return ret; } =20 - ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, disc_res); + ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, &intel_vsec_dev->= resource[idx]); if (ret) return ret; =20 - return intel_pmt_dev_register(entry, ns, dev); + return intel_pmt_dev_register(entry, ns, &intel_vsec_dev->auxdev.dev); } EXPORT_SYMBOL_NS_GPL(intel_pmt_dev_create, "INTEL_PMT"); =20 diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index 8a0db0ef58c1..96ebb15f0053 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -11,6 +11,19 @@ =20 #include "telemetry.h" =20 +/* PMT Discovery Table DWORD 1 */ +#define PMT_ACCESS_TYPE GENMASK_ULL(3, 0) +#define PMT_TELEM_TYPE GENMASK_ULL(7, 4) +#define PMT_SIZE GENMASK_ULL(27, 12) +#define PMT_GUID32 GENMASK_ULL(63, 32) + +/* PMT Discovery Table DWORD 2 */ +#define PMT_BASE_OFFSET GENMASK_ULL(31, 0) +#define PMT_TELE_ID GENMASK_ULL(63, 32) + +/* Convert DWORD size to bytes */ +#define PMT_GET_SIZE_BYTES(h) ((FIELD_GET(PMT_SIZE, h)) * sizeof(u32)) + /* PMT access types */ #define ACCESS_BARID 2 #define ACCESS_LOCAL 3 @@ -61,8 +74,6 @@ struct intel_pmt_entry { struct intel_pmt_namespace { const char *name; struct xarray *xa; - int (*pmt_header_decode)(struct intel_pmt_entry *entry, - struct device *dev); int (*pmt_pre_decode)(struct intel_vsec_device *ivdev, struct intel_pmt_entry *entry); int (*pmt_post_decode)(struct intel_vsec_device *ivdev, diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x= 86/intel/pmt/crashlog.c index f936daf99e4d..ef1826b15cf4 100644 --- a/drivers/platform/x86/intel/pmt/crashlog.c +++ b/drivers/platform/x86/intel/pmt/crashlog.c @@ -26,14 +26,8 @@ =20 /* Crashlog Discovery Header */ #define CONTROL_OFFSET 0x0 -#define GUID_OFFSET 0x4 -#define BASE_OFFSET 0x8 -#define SIZE_OFFSET 0xC -#define GET_ACCESS(v) ((v) & GENMASK(3, 0)) #define GET_TYPE(v) (((v) & GENMASK(7, 4)) >> 4) #define GET_VERSION(v) (((v) & GENMASK(19, 16)) >> 16) -/* size is in bytes */ -#define GET_SIZE(v) ((v) * sizeof(u32)) =20 /* * Type 1 Version 0 @@ -516,28 +510,11 @@ static int pmt_crashlog_pre_decode(struct intel_vsec_= device *ivdev, return 0; } =20 -static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry, - struct device *dev) -{ - void __iomem *disc_table =3D entry->disc_table; - struct intel_pmt_header *header =3D &entry->header; - - header->access_type =3D GET_ACCESS(readl(disc_table)); - header->guid =3D readl(disc_table + GUID_OFFSET); - header->base_offset =3D readl(disc_table + BASE_OFFSET); - - /* Size is measured in DWORDS, but accessor returns bytes */ - header->size =3D GET_SIZE(readl(disc_table + SIZE_OFFSET)); - - return 0; -} - static DEFINE_XARRAY_ALLOC(crashlog_array); static struct intel_pmt_namespace pmt_crashlog_ns =3D { .name =3D "crashlog", .xa =3D &crashlog_array, .pmt_pre_decode =3D pmt_crashlog_pre_decode, - .pmt_header_decode =3D pmt_crashlog_header_decode, }; =20 /* diff --git a/drivers/platform/x86/intel/pmt/telemetry.c b/drivers/platform/= x86/intel/pmt/telemetry.c index d22f633638be..80773e3c3efa 100644 --- a/drivers/platform/x86/intel/pmt/telemetry.c +++ b/drivers/platform/x86/intel/pmt/telemetry.c @@ -27,14 +27,6 @@ =20 #include "class.h" =20 -#define TELEM_SIZE_OFFSET 0x0 -#define TELEM_GUID_OFFSET 0x4 -#define TELEM_BASE_OFFSET 0x8 -#define TELEM_ACCESS(v) ((v) & GENMASK(3, 0)) -#define TELEM_TYPE(v) (((v) & GENMASK(7, 4)) >> 4) -/* size is in bytes */ -#define TELEM_SIZE(v) (((v) & GENMASK(27, 12)) >> 10) - /* Used by client hardware to identify a fixed telemetry entry*/ #define TELEM_CLIENT_FIXED_BLOCK_GUID 0x10000000 =20 @@ -69,23 +61,6 @@ static bool pmt_telem_region_overlaps(struct device *dev= , u32 guid, u32 type) return false; } =20 -static int pmt_telem_header_decode(struct intel_pmt_entry *entry, - struct device *dev) -{ - void __iomem *disc_table =3D entry->disc_table; - struct intel_pmt_header *header =3D &entry->header; - - header->access_type =3D TELEM_ACCESS(readl(disc_table)); - header->guid =3D readl(disc_table + TELEM_GUID_OFFSET); - header->base_offset =3D readl(disc_table + TELEM_BASE_OFFSET); - - /* Size is measured in DWORDS, but accessor returns bytes */ - header->size =3D TELEM_SIZE(readl(disc_table)); - header->telem_type =3D TELEM_TYPE(readl(entry->disc_table)); - - return 0; -} - static int pmt_telem_post_decode(struct intel_vsec_device *ivdev, struct intel_pmt_entry *entry) { @@ -135,7 +110,6 @@ static DEFINE_XARRAY_ALLOC(telem_array); static struct intel_pmt_namespace pmt_telem_ns =3D { .name =3D "telem", .xa =3D &telem_array, - .pmt_header_decode =3D pmt_telem_header_decode, .pmt_post_decode =3D pmt_telem_post_decode, .pmt_add_endpoint =3D pmt_telem_add_endpoint, }; --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32FBD2773E5; Wed, 25 Mar 2026 01:48:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403310; cv=none; b=tyJo88C49jXycQJNjFV2Yuqr3E7x60AFx3k2RwxW8qNg8jOoCp7VrENVuDuCfw3ajpcDWEMgoGwJyG9q2Gkt0OW3eHYWhx2MBQjf5D7Xqqs0s4BqybC4RpK2Aco/ZwNONNri5YOG7dJQULyF8gH2aQmI/WMizuRhfJAtLF+KguI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403310; c=relaxed/simple; bh=LXgyDtKXXnbiORT6eUF+1y0ZABeSt4RDb1/na+wDnxA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bPfzt+iRacqji2/aq0MrR2PLNEC5b3fhP28MnDFx8EUzPF/Ze/jjfO6BLRI4qSVDWcKL1wfTSm+d626bl5jvl0z47Hc3VCIzcjrE2i4Ttko4WXojPOR+jawfswjmRWu3XUi6nkMJ33SUg6dqTG8GgBvsSEy9cbLtpEa6r5EDPeI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=K4z5MN0H; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="K4z5MN0H" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403309; x=1805939309; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LXgyDtKXXnbiORT6eUF+1y0ZABeSt4RDb1/na+wDnxA=; b=K4z5MN0Hph2V4timpuDwXyFNkCVmLCi5FxVm6GHlNVxGT2BsF7CZiMBq 8snv73xQK9rc7V+3QkDQwiIhfMVXumBLVayZi19IgU7TYkQqOn/q2rVP+ 3nhKdBk1IbkPjMeAJeKQTVSYOlopipTNc3vpMaGdu43jBnJa03G8kWBa/ KtfCj3Bj0d3yH40bVdgivnBGchyxr0KLMN/P2kTfXWFIyDrBytll/78I8 uNR2/9xQghrFaPC78eClCLL9RO35OxVl8ef0582MEu+QQHO1RQzVsxhYS nnhPW3OVoNFLrz0Z3jDiJ7qSheQ+N7r3lBptNuzievU++u+iJj3+Jx4PW Q==; X-CSE-ConnectionGUID: sUB1Ood8TUmrbrCH0bfHcQ== X-CSE-MsgGUID: XzvH6g+NR+ySGzBOxgm0tw== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317498" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317498" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:27 -0700 X-CSE-ConnectionGUID: TwOHORClSSmRRNItJsoWmQ== X-CSE-MsgGUID: vTAqKqF3SOSRbx/AQbVQOg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190780" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:27 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 05/17] platform/x86/intel/pmt: Pass discovery index instead of resource Date: Tue, 24 Mar 2026 18:48:07 -0700 Message-ID: <20260325014819.1283566-6-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Change PMT class code to pass a discovery index rather than a direct struct resource when creating entries. This allows the class to identify the discovery source generically without assuming PCI BAR resources. For PCI devices, the index still resolves to a resource in the intel_vsec_device. Other discovery sources, such as ACPI, can use the same index without needing a struct resource. Signed-off-by: David E. Box --- V2 - No changes drivers/platform/x86/intel/pmt/class.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index d652b21261f0..3fcea6a6e763 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -207,11 +207,12 @@ EXPORT_SYMBOL_GPL(intel_pmt_class); =20 static int intel_pmt_populate_entry(struct intel_pmt_entry *entry, struct intel_vsec_device *ivdev, - struct resource *disc_res) + int idx) { struct pci_dev *pci_dev =3D to_pci_dev(ivdev->dev); struct device *dev =3D &ivdev->auxdev.dev; struct intel_pmt_header *header =3D &entry->header; + struct resource *disc_res; u8 bir; =20 /* @@ -236,6 +237,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_en= try *entry, * For access_type LOCAL, the base address is as follows: * base address =3D end of discovery region + base offset */ + disc_res =3D &ivdev->resource[idx]; entry->base_addr =3D disc_res->end + 1 + header->base_offset; =20 /* @@ -412,7 +414,7 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entry,= struct intel_pmt_namespa return ret; } =20 - ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, &intel_vsec_dev->= resource[idx]); + ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, idx); if (ret) return ret; =20 --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7730E279DC2; Wed, 25 Mar 2026 01:48:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403311; cv=none; b=oB7JeDzL5L/MlH37Yl6tOyhDYkGurbScQvTwaBukIcm+ariGHRxBNN7ifxJt3t3oenosKMkkYxDGX9tp3LxJfSDg1Y1e3aVayIWoIQmagHiEcRmQGEvUptPqz6hh6i964KvdycW0vB7M5iTQuo4LsSNwn2DY2wIM781IZRFeq2s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403311; c=relaxed/simple; bh=W8Vxs+grRcDDpo9oPrtqKCB83RO11/KhNWr/dO3iCR0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TH94svHF0XmPNZnKbhZAWiNiF7d80OGAE8xV7IrVVflY8dVYeIMaArMNhm+gW8tTKlSzLn9pS9e2mp3SsbssgsvZe38UAM03PF7VPA6j92y7yu0hH84CwZHnUgIhmaF48Yf3TBIwUu6d/dWP1ym40pjD7Tlh5NIb/UKBHUZ6pUw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=RCATnGph; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="RCATnGph" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403309; x=1805939309; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=W8Vxs+grRcDDpo9oPrtqKCB83RO11/KhNWr/dO3iCR0=; b=RCATnGphWHfBbr/9y2HzPe/5R6Mp3yOh+tWBb+ic2TBVQcWIxyYVL/lp fwhwv7EK/eSuZSjnB6rSfPJ81EMRnlp9LcPZ/ced8HIuof0nF2Ui5LCAt KIpv1Ua3KjmbhPVlw3mmQSV/2HKIbZfZbCyvVyzo0WMMbHsY70/ohSSb1 uM6nxJ386ECBseD6PzuxGSY7t87hDiuM4ZRe7uua11dstnbKrD5Lpnw4/ mwMaGzV4S7CavAhbcqF3SXjRM7wlvM25YJzzD4809VbtAqk8wk58MMW9O 80Osm2ChyqJS+nRAER2PO39hfuAM1EzuPEK+BrgRnC6HG+fTjLvoQ1bXI w==; X-CSE-ConnectionGUID: Jeab8WzeRXaeE83nSqdD5Q== X-CSE-MsgGUID: Jar1w+GfQHGNjPgga+mW0A== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317501" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317501" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:28 -0700 X-CSE-ConnectionGUID: MC0zyou+QbW3BamNs0WD5Q== X-CSE-MsgGUID: XtkJE6nlQ7SrJtGP0o5BHA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190782" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:28 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 06/17] platform/x86/intel/pmt: Unify header fetch and add ACPI source Date: Tue, 24 Mar 2026 18:48:08 -0700 Message-ID: <20260325014819.1283566-7-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Allow the PMT class to read discovery headers from either PCI MMIO or ACPI-provided entries, depending on the discovery source. The new source-aware fetch helper retrieves the first two QWORDs for both paths while keeping the mapped discovery table available for users such as crashlog. Split intel_pmt_populate_entry() into source-specific resolvers: - pmt_resolve_access_pci(): handles both ACCESS_LOCAL and ACCESS_BARID for PCI-backed devices and sets entry->pcidev. Same existing functionality. - pmt_resolve_access_acpi(): handles only ACCESS_BARID for ACPI-backed devices, rejecting ACCESS_LOCAL which has no valid semantics without a physical discovery resource. This maintains existing PCI behavior and makes no functional changes for PCI devices. Signed-off-by: David E. Box --- V2 changes: - In pmt_resolve_access_acpi(), moved dev_err() call to single line instead of split across two lines - Restructured error handling in intel_pmt_populate_entry(), moving error returns from after switch/case into each case statement for better readability - Addressed Ilpo's feedback on error message formatting and error handling patterns drivers/platform/x86/intel/pmt/class.c | 123 +++++++++++++++++++++++-- 1 file changed, 114 insertions(+), 9 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index 3fcea6a6e763..64678f55a20e 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -205,9 +205,9 @@ struct class intel_pmt_class =3D { }; EXPORT_SYMBOL_GPL(intel_pmt_class); =20 -static int intel_pmt_populate_entry(struct intel_pmt_entry *entry, - struct intel_vsec_device *ivdev, - int idx) +static int pmt_resolve_access_pci(struct intel_pmt_entry *entry, + struct intel_vsec_device *ivdev, + int idx) { struct pci_dev *pci_dev =3D to_pci_dev(ivdev->dev); struct device *dev =3D &ivdev->auxdev.dev; @@ -287,6 +287,81 @@ static int intel_pmt_populate_entry(struct intel_pmt_e= ntry *entry, } =20 entry->pcidev =3D pci_dev; + + return 0; +} + +static int pmt_resolve_access_acpi(struct intel_pmt_entry *entry, + struct intel_vsec_device *ivdev) +{ + struct pci_dev *pci_dev =3D NULL; + struct device *dev =3D &ivdev->auxdev.dev; + struct intel_pmt_header *header =3D &entry->header; + u8 bir; + + if (dev_is_pci(ivdev->dev)) + pci_dev =3D to_pci_dev(ivdev->dev); + + /* + * The base offset should always be 8 byte aligned. + * + * For non-local access types the lower 3 bits of base offset + * contains the index of the base address register where the + * telemetry can be found. + */ + bir =3D GET_BIR(header->base_offset); + + switch (header->access_type) { + case ACCESS_BARID: + /* ACPI platform drivers use base_addr */ + if (ivdev->base_addr) { + entry->base_addr =3D ivdev->base_addr + + GET_ADDRESS(header->base_offset); + break; + } + + /* If base_addr is not provided, then this is an ACPI companion device */ + if (!pci_dev) { + dev_err(dev, "ACCESS_BARID requires PCI BAR resources or base_addr\n"); + return -EINVAL; + } + + entry->base_addr =3D pci_resource_start(pci_dev, bir) + + GET_ADDRESS(header->base_offset); + break; + default: + dev_err(dev, "Unsupported access type %d for ACPI based PMT\n", + header->access_type); + return -EINVAL; + } + + return 0; +} + +static int intel_pmt_populate_entry(struct intel_pmt_entry *entry, + struct intel_vsec_device *ivdev, + int idx) +{ + struct intel_pmt_header *header =3D &entry->header; + struct device *dev =3D &ivdev->auxdev.dev; + int ret; + + switch (ivdev->src) { + case INTEL_VSEC_DISC_PCI: + ret =3D pmt_resolve_access_pci(entry, ivdev, idx); + if (ret) + return ret; + break; + case INTEL_VSEC_DISC_ACPI: + ret =3D pmt_resolve_access_acpi(entry, ivdev); + if (ret) + return ret; + break; + default: + dev_err(dev, "Unknown discovery source: %d\n", ivdev->src); + return -EINVAL; + } + entry->guid =3D header->guid; entry->size =3D header->size; entry->cb =3D ivdev->priv_data; @@ -371,18 +446,48 @@ static int intel_pmt_dev_register(struct intel_pmt_en= try *entry, return ret; } =20 +static int pmt_get_headers(struct intel_vsec_device *ivdev, int idx, + struct intel_pmt_entry *entry, u64 headers[2]) +{ + struct device *dev =3D &ivdev->auxdev.dev; + + switch (ivdev->src) { + case INTEL_VSEC_DISC_PCI: { + void __iomem *disc_table; + + disc_table =3D devm_ioremap_resource(dev, &ivdev->resource[idx]); + if (IS_ERR(disc_table)) + return PTR_ERR(disc_table); + + memcpy_fromio(headers, disc_table, 2 * sizeof(u64)); + + /* Used by crashlog driver */ + entry->disc_table =3D disc_table; + + return 0; + } + case INTEL_VSEC_DISC_ACPI: + memcpy(headers, &ivdev->acpi_disc[idx][0], 2 * sizeof(u64)); + + return 0; + default: + dev_err(dev, "Unknown discovery source type: %d\n", ivdev->src); + break; + } + + return -EINVAL; +} + static int pmt_read_header(struct intel_vsec_device *ivdev, int idx, struct intel_pmt_entry *entry) { struct intel_pmt_header *header =3D &entry->header; - struct device *dev =3D &ivdev->auxdev.dev; u64 headers[2]; + int ret; =20 - entry->disc_table =3D devm_ioremap_resource(dev, &ivdev->resource[idx]); - if (IS_ERR(entry->disc_table)) - return PTR_ERR(entry->disc_table); - - memcpy_fromio(headers, entry->disc_table, 2 * sizeof(u64)); + ret =3D pmt_get_headers(ivdev, idx, entry, headers); + if (ret) + return ret; =20 header->access_type =3D FIELD_GET(PMT_ACCESS_TYPE, headers[0]); header->telem_type =3D FIELD_GET(PMT_TELEM_TYPE, headers[0]); --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DB19280A51; Wed, 25 Mar 2026 01:48:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403311; cv=none; b=pzaiL5MZdBOKUunl8u06ZEeU/zux7OeE2+c3rxxBfxXGXyyugVU6E0WwYlwtoACWJXYhYxPkCC5LkEsE/Cxr3l5ebPaOrwnh2HEyL1+QZafs1dTvGus4X8CfOk9XlHieUcHVRWbw6Ufa1VMV7jETsdaQLWQ8F8MbrICXC5Gxsfs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403311; c=relaxed/simple; bh=Cw75RS+wl+j/4qp8S6wFnV+OvAUsieKdCCH1S+pIeuw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Wnp78NSBs5tuLK7t9SqX0grb0pT8J5vcOp+9EGaEoJmr1S/wC7Sx4S0oe9Bcgs3aEKIEdHX2biPvoYveaG7zNVrH3g0L3V1pRpEFX9UXnujH8NJ+DhqUZKbjAtpHMf6WP3RjeGABHOjc9aK02siRNjdssCd3whgaSQ/svVYm1H0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OmCAXEKg; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OmCAXEKg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403310; x=1805939310; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Cw75RS+wl+j/4qp8S6wFnV+OvAUsieKdCCH1S+pIeuw=; b=OmCAXEKgFIYfLx4gpXwh+KWaWb+RT9+TooEtMfRgs/NMMB4Fw8RnReEn KgvxSKEHmEt+bDic8JSUS5yux/44ssNa5XLg7xTx2wLNLPkhxowNsnXjC clu6qZcXx1GEq3EKlwC4paM33BCeidH4smCgRabpgp/EcQgbvnofkf1b3 UH7S9Gs+hDOoprGtxHZVd7utyftdt0SpuadV46M6THmwK4s8GK9uR6XWi q4V/rpcJdPHyR6kS3nZ19kZS7Jd7+GoqDDNPIBYpK8tkv42gFO6in18tQ Hn7UzNE5vLxfwkQw1KhfWvOp423txKktkpSWhIyepZozGPmsokhzEdMvD w==; X-CSE-ConnectionGUID: 1+ilh/PXS+y6G34THssRnw== X-CSE-MsgGUID: iSMIMkJRQOS0t5TbL3ozmg== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317504" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317504" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:28 -0700 X-CSE-ConnectionGUID: SIZn8mcRTUOaZ+qgzLWoNA== X-CSE-MsgGUID: ySPSiCOZTKyOlT9dT7AjxA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190785" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:28 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 07/17] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description Date: Tue, 24 Mar 2026 18:48:09 -0700 Message-ID: <20260325014819.1283566-8-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a proper description for the intel_pmc_ssram driver. Signed-off-by: David E. Box --- V2 - No changes drivers/platform/x86/intel/pmc/Kconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/= intel/pmc/Kconfig index c6ef0bcf76af..0f19dc7edcf9 100644 --- a/drivers/platform/x86/intel/pmc/Kconfig +++ b/drivers/platform/x86/intel/pmc/Kconfig @@ -28,3 +28,14 @@ config INTEL_PMC_CORE =20 config INTEL_PMC_SSRAM_TELEMETRY tristate + help + This PCI driver discovers PMC SSRAM telemetry regions through the + PMC's MMIO interface and registers them with the Intel VSEC framework + as Intel PMT telemetry devices. + + It probes the PMC SSRAM device, extracts DVSEC information from MMIO, + reads device IDs and base addresses for multiple PMCs (main, IOE, PCH), + and exposes the discovered telemetry through Intel PMT interfaces + (including sysfs). + + This option is selected by INTEL_PMC_CORE. --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1A3C282F10; Wed, 25 Mar 2026 01:48:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403312; cv=none; b=PGjpZgqOHKCU8065cTfGKr9JHhxUYo3MsBFwcg3Rp1ZleHk0sA9HxC1AOPYXr6ECJLnqwarkaB939OExlCCJUr/uzv/N+fu9NEXPNebudNcxr+uMFtlP1U2/rYAtshrK3lbXN2ojnMZ0jwzB1DJOZHxEhVqiKcfgA3YbwGKD6K0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403312; c=relaxed/simple; bh=/rZKxqY0Kmh0qLfOxW6gb1/7kwoAO+O8savzCRZdRDk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gfrOCu5iYQ84KNgPbxBwxgUQYB690jp4+qPd7Nt1WfRkieyZBxqIqKCHdxDwCf6cnBpSXymuScYB0FocL8HitXHAGGZdaFGtciEyq8Xmxd0++WUwejhXesekOHHyQTiQBspvqiq3PuqF8EOKDQRqW/C7l4kUHPCAJcqhCSzxZ5Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=b2Fhxs2E; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="b2Fhxs2E" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403310; x=1805939310; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/rZKxqY0Kmh0qLfOxW6gb1/7kwoAO+O8savzCRZdRDk=; b=b2Fhxs2E/oH6hT+s2ZxAqYS3UUTHL6R+x0ubbptyHitlXvu3e2iC3xj/ Cv0bMMJeieXtjmzq7JnOmyWjRZVk/BQuOtST3IIoV6eKFV+hqysfIcp3F TkJI8WCmq2HmCTwg+diayKK13VYvX5N/krebKSTmUvOmnda0fVEGYe9dm olO65mAtaNMsffM/RMmOnEZowE5S+DoJ1Rbp+QDM7Ieh1siqVulxhp4CC /AxYsYIchbT12oKEiPm0jhXNqcTFAAVahNeuKhau/bX/7y4DC3hX/JEfS iGhrEHhKOazYDzAX5tfZsOPEuQkZqliijbuHHd5vwyktIIof/xYTqE+jC A==; X-CSE-ConnectionGUID: xcFLTxaFTKCtOQivZousTw== X-CSE-MsgGUID: SfD3j0MAQkCf281d2QxE1A== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317508" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317508" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:29 -0700 X-CSE-ConnectionGUID: TrZNI6D5TKeogYgH4j9YmQ== X-CSE-MsgGUID: 68g4wZPJSNOLUA/izKKO5A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190787" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:29 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 08/17] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S Date: Tue, 24 Mar 2026 18:48:10 -0700 Message-ID: <20260325014819.1283566-9-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add an ACPI-based PMC PWRM telemetry driver for Nova Lake S. The driver locates PMT discovery data in _DSD under the Intel VSEC UUID, parses it, and registers telemetry regions with the PMT/VSEC framework so PMC telemetry is exposed via existing PMT interfaces. Export pmc_parse_telem_dsd() and pmc_find_telem_guid() to support ACPI discovery in other PMC drivers (e.g., ssram_telemetry) without duplicating ACPI parsing logic. Also export acpi_disc_t typedef from core.h for callers to properly declare discovery table arrays. Selected by INTEL_PMC_CORE. Existing PCI functionality is preserved. Signed-off-by: David E. Box --- V2 changes: - Added explicit include for guid_t type availability in core.h - Added explicit include in pwrm_telemetry.c for GENMASK() - Added and converted goto based cleanup to __free() attributes per Ilpo's feedback - Combined u64 hdr0 and u64 hdr1 into single declaration - Converted pmc_parse_telem_dsd() to return acpi_disc directly with ERR_PTR() for failures - Added braces around _DSD evaluation failure path drivers/platform/x86/intel/pmc/Kconfig | 14 ++ drivers/platform/x86/intel/pmc/Makefile | 2 + drivers/platform/x86/intel/pmc/core.h | 15 ++ .../platform/x86/intel/pmc/pwrm_telemetry.c | 214 ++++++++++++++++++ 4 files changed, 245 insertions(+) create mode 100644 drivers/platform/x86/intel/pmc/pwrm_telemetry.c diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/= intel/pmc/Kconfig index 0f19dc7edcf9..937186b0b5dd 100644 --- a/drivers/platform/x86/intel/pmc/Kconfig +++ b/drivers/platform/x86/intel/pmc/Kconfig @@ -9,6 +9,7 @@ config INTEL_PMC_CORE depends on ACPI depends on INTEL_PMT_TELEMETRY select INTEL_PMC_SSRAM_TELEMETRY + select INTEL_PMC_PWRM_TELEMETRY help The Intel Platform Controller Hub for Intel Core SoCs provides access to Power Management Controller registers via various interfaces. This @@ -39,3 +40,16 @@ config INTEL_PMC_SSRAM_TELEMETRY (including sysfs). =20 This option is selected by INTEL_PMC_CORE. + +config INTEL_PMC_PWRM_TELEMETRY + tristate + help + This driver discovers PMC PWRM telemetry regions described in ACPI + _DSD and registers them with the Intel VSEC framework as Intel PMT + telemetry devices. + + It validates the ACPI discovery data and publishes the discovered + regions so they can be accessed through the Intel PMT telemetry + interfaces (including sysfs). + + This option is selected by INTEL_PMC_CORE. diff --git a/drivers/platform/x86/intel/pmc/Makefile b/drivers/platform/x86= /intel/pmc/Makefile index bb960c8721d7..fdbb768f7b09 100644 --- a/drivers/platform/x86/intel/pmc/Makefile +++ b/drivers/platform/x86/intel/pmc/Makefile @@ -12,3 +12,5 @@ obj-$(CONFIG_INTEL_PMC_CORE) +=3D intel_pmc_core_pltdrv.o # Intel PMC SSRAM driver intel_pmc_ssram_telemetry-y +=3D ssram_telemetry.o obj-$(CONFIG_INTEL_PMC_SSRAM_TELEMETRY) +=3D intel_pmc_ssram_telemetry.o +intel_pmc_pwrm_telemetry-y +=3D pwrm_telemetry.o +obj-$(CONFIG_INTEL_PMC_PWRM_TELEMETRY) +=3D intel_pmc_pwrm_telemetry.o diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/i= ntel/pmc/core.h index 118c8740ad3a..37ea1caf1817 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -14,10 +14,14 @@ =20 #include #include +#include #include +#include =20 struct telem_endpoint; =20 +DEFINE_FREE(pmc_acpi_free, void *, if (_T) ACPI_FREE(_T)) + #define SLP_S0_RES_COUNTER_MASK GENMASK(31, 0) =20 #define PMC_BASE_ADDR_DEFAULT 0xFE000000 @@ -562,6 +566,8 @@ int pmc_core_pmt_get_blk_sub_req(struct pmc_dev *pmcdev= , struct pmc *pmc, extern const struct file_operations pmc_core_substate_req_regs_fops; extern const struct file_operations pmc_core_substate_blk_req_fops; =20 +extern const guid_t intel_vsec_guid; + #define pmc_for_each_mode(mode, pmc) \ for (unsigned int __i =3D 0, __cond; \ __cond =3D __i < (pmc)->num_lpm_modes, \ @@ -583,4 +589,13 @@ static const struct file_operations __name ## _fops = =3D { \ .release =3D single_release, \ } =20 +struct intel_vsec_header; +union acpi_object; + +/* Avoid checkpatch warning */ +typedef u32 (*acpi_disc_t)[4]; + + acpi_disc_t pmc_parse_telem_dsd(union acpi_object *obj, + struct intel_vsec_header *header); +union acpi_object *pmc_find_telem_guid(union acpi_object *dsd); #endif /* PMC_CORE_H */ diff --git a/drivers/platform/x86/intel/pmc/pwrm_telemetry.c b/drivers/plat= form/x86/intel/pmc/pwrm_telemetry.c new file mode 100644 index 000000000000..e852ee2d6d9f --- /dev/null +++ b/drivers/platform/x86/intel/pmc/pwrm_telemetry.c @@ -0,0 +1,214 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Intel PMC PWRM ACPI driver + * + * Copyright (C) 2025, Intel Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "core.h" + +#define ENTRY_LEN 5 + +/* DWORD2 */ +#define DVSEC_ID_MASK GENMASK(15, 0) +#define NUM_ENTRIES_MASK GENMASK(23, 16) +#define ENTRY_SIZE_MASK GENMASK(31, 24) + +/* DWORD3 */ +#define TBIR_MASK GENMASK(2, 0) +#define DISC_TBL_OFF_MASK GENMASK(31, 3) + +const guid_t intel_vsec_guid =3D + GUID_INIT(0x294903fb, 0x634d, 0x4fc7, 0xaf, 0x1f, 0x0f, 0xb9, + 0x56, 0xb0, 0x4f, 0xc1); + +static bool is_valid_entry(union acpi_object *pkg) +{ + int i; + + if (!pkg || pkg->type !=3D ACPI_TYPE_PACKAGE || pkg->package.count !=3D E= NTRY_LEN) + return false; + + if (pkg->package.elements[0].type !=3D ACPI_TYPE_STRING) + return false; + + for (i =3D 1; i < ENTRY_LEN; i++) + if (pkg->package.elements[i].type !=3D ACPI_TYPE_INTEGER) + return false; + + return true; +} + +u32 (*pmc_parse_telem_dsd(union acpi_object *obj, + struct intel_vsec_header *header))[4] +{ + acpi_disc_t disc __free(kfree) =3D NULL; + union acpi_object *vsec_pkg; + union acpi_object *disc_pkg; + u64 hdr0, hdr1; + int num_regions; + int i; + + if (!header) + return ERR_PTR(-EINVAL); + + if (!obj || obj->type !=3D ACPI_TYPE_PACKAGE || obj->package.count !=3D 2) + return ERR_PTR(-EINVAL); + + /* First Package is DVSEC info */ + vsec_pkg =3D &obj->package.elements[0]; + if (!is_valid_entry(vsec_pkg)) + return ERR_PTR(-EINVAL); + + hdr0 =3D vsec_pkg->package.elements[3].integer.value; + hdr1 =3D vsec_pkg->package.elements[4].integer.value; + + header->id =3D FIELD_GET(DVSEC_ID_MASK, hdr0); + header->num_entries =3D FIELD_GET(NUM_ENTRIES_MASK, hdr0); + header->entry_size =3D FIELD_GET(ENTRY_SIZE_MASK, hdr0); + header->tbir =3D FIELD_GET(TBIR_MASK, hdr1); + header->offset =3D FIELD_GET(DISC_TBL_OFF_MASK, hdr1); + + /* Second Package contains the discovery tables */ + disc_pkg =3D &obj->package.elements[1]; + if (disc_pkg->type !=3D ACPI_TYPE_PACKAGE || disc_pkg->package.count < 1) + return ERR_PTR(-EINVAL); + + num_regions =3D disc_pkg->package.count; + if (header->num_entries !=3D num_regions) + return ERR_PTR(-EINVAL); + + disc =3D kmalloc_array(num_regions, sizeof(*disc), GFP_KERNEL); + if (!disc) + return ERR_PTR(-ENOMEM); + + for (i =3D 0; i < num_regions; i++) { + union acpi_object *pkg; + u64 value; + int j; + + pkg =3D &disc_pkg->package.elements[i]; + if (!is_valid_entry(pkg)) + return ERR_PTR(-EINVAL); + + /* Element 0 is a descriptive string; DWORD values start at index 1. */ + for (j =3D 1; j < ENTRY_LEN; j++) { + value =3D pkg->package.elements[j].integer.value; + if (value > U32_MAX) + return ERR_PTR(-ERANGE); + + disc[i][j - 1] =3D value; + } + } + + return no_free_ptr(disc); +} +EXPORT_SYMBOL_NS_GPL(pmc_parse_telem_dsd, "INTEL_PMC_CORE"); + +union acpi_object *pmc_find_telem_guid(union acpi_object *dsd) +{ + int i; + + if (!dsd || dsd->type !=3D ACPI_TYPE_PACKAGE) + return NULL; + + for (i =3D 0; i + 1 < dsd->package.count; i +=3D 2) { + union acpi_object *uuid_obj, *data_obj; + guid_t uuid; + + uuid_obj =3D &dsd->package.elements[i]; + data_obj =3D &dsd->package.elements[i + 1]; + + if (uuid_obj->type !=3D ACPI_TYPE_BUFFER || + uuid_obj->buffer.length !=3D 16) + continue; + + memcpy(&uuid, uuid_obj->buffer.pointer, 16); + if (guid_equal(&uuid, &intel_vsec_guid)) + return data_obj; + } + + return NULL; +} +EXPORT_SYMBOL_NS_GPL(pmc_find_telem_guid, "INTEL_PMC_CORE"); + +static int pmc_pwrm_acpi_probe(struct platform_device *pdev) +{ + struct acpi_buffer buf =3D { ACPI_ALLOCATE_BUFFER, NULL }; + acpi_handle handle =3D ACPI_HANDLE(&pdev->dev); + struct intel_vsec_header header; + struct intel_vsec_header *headers[2] =3D { &header, NULL }; + struct intel_vsec_platform_info info =3D { }; + struct device *dev =3D &pdev->dev; + struct resource *res; + union acpi_object *dsd; + acpi_status status; + + if (!handle) + return -ENODEV; + + status =3D acpi_evaluate_object(handle, "_DSD", NULL, &buf); + if (ACPI_FAILURE(status)) { + return dev_err_probe(dev, -ENODEV, "Could not evaluate _DSD: %s\n", + acpi_format_exception(status)); + } + + void *dsd_buf __free(pmc_acpi_free) =3D buf.pointer; + + dsd =3D pmc_find_telem_guid(dsd_buf); + if (!dsd) + return -ENODEV; + + acpi_disc_t acpi_disc __free(kfree) =3D pmc_parse_telem_dsd(dsd, &header); + if (IS_ERR(acpi_disc)) + return PTR_ERR(acpi_disc); + + res =3D platform_get_resource(pdev, IORESOURCE_MEM, header.tbir); + if (!res) + return -EINVAL; + + info.headers =3D headers; + info.caps =3D VSEC_CAP_TELEMETRY; + info.acpi_disc =3D acpi_disc; + info.src =3D INTEL_VSEC_DISC_ACPI; + info.base_addr =3D res->start; + + return intel_vsec_register(&pdev->dev, &info); +} + +static const struct acpi_device_id pmc_pwrm_acpi_ids[] =3D { + { "INTC1122", 0 }, /* Nova Lake */ + { "INTC1129", 0 }, /* Nova Lake */ + { } +}; +MODULE_DEVICE_TABLE(acpi, pmc_pwrm_acpi_ids); + +static struct platform_driver pmc_pwrm_acpi_driver =3D { + .probe =3D pmc_pwrm_acpi_probe, + .driver =3D { + .name =3D "intel_pmc_pwrm_acpi", + .acpi_match_table =3D ACPI_PTR(pmc_pwrm_acpi_ids), + }, +}; +module_platform_driver(pmc_pwrm_acpi_driver); + +MODULE_AUTHOR("David E. Box "); +MODULE_DESCRIPTION("Intel PMC PWRM ACPI driver"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("INTEL_VSEC"); --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C3A2284B2F; Wed, 25 Mar 2026 01:48:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403312; cv=none; b=LQmSodqb8MPG5FtPjX1lNmGY+D3cgKgzLS9dRsITQ+xUwDi2mVaNxEIsHEoVBGM/Q0dwyOfSQ5ReTTEEbDW+Oe9BUtwX7LYC21NUTaV7PYt9rzN04hEgfM1SQw3WW6g9HNeE9gY4zT8/fQaYoPYr+AOtsc7hy02Uuk+TwiRtsLI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403312; c=relaxed/simple; bh=c9aRN+Z8HBx978nr9UB9cqHbnyIS7Ruq3oAI3qlGnpk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=soHb/1bMBG8LZnk0rIbAoenCUxh1eloAEuvHRUYw5ea4GVErThDFEcqFEydJ8CDXrIrsQw7q3eaWNpE8a/MacH4HdnpBLGjk+Kinbvdi1lHn70BdtjohYNtqFKPnoa0cbEEBq8SyE2joPKUH1VF3R5JWDetmLNyweArsnjF0fqU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JTlg+IwX; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JTlg+IwX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403311; x=1805939311; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=c9aRN+Z8HBx978nr9UB9cqHbnyIS7Ruq3oAI3qlGnpk=; b=JTlg+IwXwZ9w+p9qdbyBBoqoPd009t7PsgMF75YGA2Dvycf8khGb00NW ZLTW0AkEAmoXBuRQmDwP5p3ruTizOgF4/dHVYNR4qwY8TbO2zwUorRABA OueoyM9oEM1O1Ym/raz9zl/W49t/pS4FfxR2PFFQlxbh0QOYjzjQ8PPBR M5Is7DHuQySYqAuJRAsrqxcxOQpAVg8TqP9g3yM7uE+YsjeDTKZxlK602 oxc7IQj4f/IyyrtwkRQtIHGpJs8opzIY1ek8sUWAwopoT5yI7aLeHmnx4 k5QPVZUuPw51bKZeAVBsarexrqlq6/LpJ0dSOsp9V/mBcAqLfwrORS/by Q==; X-CSE-ConnectionGUID: jVhoXQK6R66T5JqvKwckPQ== X-CSE-MsgGUID: wnp6JJEWRlWt+lC13lBp3w== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317511" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317511" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:30 -0700 X-CSE-ConnectionGUID: VXGK15DjTe68wTYPHyZpdA== X-CSE-MsgGUID: eIqPRh8gREqP8OG/q658Sg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190789" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:29 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 09/17] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency Date: Tue, 24 Mar 2026 18:48:11 -0700 Message-ID: <20260325014819.1283566-10-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename intel_pmc_ssram_telemetry_probe() to pmc_ssram_telemetry_probe() and intel_pmc_ssram_telemetry_pci_ids[] to pmc_ssram_telemetry_pci_ids[], updating the MODULE_DEVICE_TABLE() and pci_driver wiring accordingly. This aligns the symbol names with the driver filename and module name, reduces redundant intel_ prefixes, and improves readability. No functional behavior changes are intended. Signed-off-by: David E. Box Reviewed-by: Ilpo J=C3=A4rvinen --- V2 - No changes drivers/platform/x86/intel/pmc/ssram_telemetry.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 6f6e83e70fc5..1deb4d71da3f 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -149,7 +149,7 @@ int pmc_ssram_telemetry_get_pmc_info(unsigned int pmc_i= dx, } EXPORT_SYMBOL_GPL(pmc_ssram_telemetry_get_pmc_info); =20 -static int intel_pmc_ssram_telemetry_probe(struct pci_dev *pcidev, const s= truct pci_device_id *id) +static int pmc_ssram_telemetry_probe(struct pci_dev *pcidev, const struct = pci_device_id *id) { int ret; =20 @@ -183,7 +183,7 @@ static int intel_pmc_ssram_telemetry_probe(struct pci_d= ev *pcidev, const struct return ret; } =20 -static const struct pci_device_id intel_pmc_ssram_telemetry_pci_ids[] =3D { +static const struct pci_device_id pmc_ssram_telemetry_pci_ids[] =3D { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_MTL_SOCM) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCS) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCM) }, @@ -193,14 +193,14 @@ static const struct pci_device_id intel_pmc_ssram_tel= emetry_pci_ids[] =3D { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_WCL_PCDN) }, { } }; -MODULE_DEVICE_TABLE(pci, intel_pmc_ssram_telemetry_pci_ids); +MODULE_DEVICE_TABLE(pci, pmc_ssram_telemetry_pci_ids); =20 -static struct pci_driver intel_pmc_ssram_telemetry_driver =3D { +static struct pci_driver pmc_ssram_telemetry_driver =3D { .name =3D "intel_pmc_ssram_telemetry", - .id_table =3D intel_pmc_ssram_telemetry_pci_ids, - .probe =3D intel_pmc_ssram_telemetry_probe, + .id_table =3D pmc_ssram_telemetry_pci_ids, + .probe =3D pmc_ssram_telemetry_probe, }; -module_pci_driver(intel_pmc_ssram_telemetry_driver); +module_pci_driver(pmc_ssram_telemetry_driver); =20 MODULE_IMPORT_NS("INTEL_VSEC"); MODULE_AUTHOR("Xi Pardee "); --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D367A286419; Wed, 25 Mar 2026 01:48:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403313; cv=none; b=TkM/LXZstwJFSrzf1ivLP/0xilY8HDuT4lntcynu96wf9T74vh0bxfM1pvHzQ0yOsyi0gXIcNsSV2pI8Sk1TCNQoUAjDlH6lBPaZ/GIWHxOIa3ZBUkmtpXABW1mR0Za5if9YQcT0dh3eCiPYiTVnNooxz3PMEgKl8OsmqFoAf/U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403313; c=relaxed/simple; bh=zFMNEZm6Uk8EBinNcApU4GO+lYKwQ895O8e35I19Wfo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=byyXIbX6Mi/lOQfWLi1kgxG2G5En0HA4LdjpyKKiIWo9eHawVrchAGuQ5SQSIUjUhrJVv83KhyDsRFCM0R6H94iVjq7/TZkdKv+CwVT1a1Q4x4/Cnf4pTqKFGHWu6ReFro9AOj+g5pqfUe7yZz8fBz4JAE7KuHBI5Pw1MDbN/x0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jr72sEFt; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jr72sEFt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403312; x=1805939312; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zFMNEZm6Uk8EBinNcApU4GO+lYKwQ895O8e35I19Wfo=; b=jr72sEFtNxodlD2zObQ43TWG6kYRhmk0RaIlhS81KWk12v2pALTO++0A E1T26+mb5VwucHojJNSFL/o6rTCU32z8nXnxg0/wybqcec6QnQbxfmBG5 m8KSqRLY3v72W61oEn7MS8pTgeZHERU/PjQPSCE5yB9DZhq3Jmunr//Uu L1sVeJz72xTpRLV9qCLhHtgLQjflolzRzDWHT0F/gVEuEA0U/W3PH8mBo 8t79908m8j87RdgRYsY1tM/JZvRO1YIIaRvXx82Nmz6yw7vXMR/NnWaXu 3/ATmHL9b8e9s65uvjjS7sKycKmpMp4DHn6Rbxv+G/OoqQQc/aP8y8whP A==; X-CSE-ConnectionGUID: gHCkW5ffSZKpHT/b6afJqg== X-CSE-MsgGUID: tDTiKVa8TlKjajOexJwhGg== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317514" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317514" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:31 -0700 X-CSE-ConnectionGUID: rFGJj0qMRoaUM8+2OFQNpA== X-CSE-MsgGUID: uHc9asd6SniV9lHwmLJl5Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190790" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:30 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 10/17] platform/x86/intel/pmc/ssram: Use fixed-size static pmc array Date: Tue, 24 Mar 2026 18:48:12 -0700 Message-ID: <20260325014819.1283566-11-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Xi Pardee Switch pmc_ssram_telems from a devm-allocated pointer to a fixed-size static array, eliminating per-probe allocation overhead and simplifying lifetime management. Correspondingly simplify pmc_ssram_telemetry_get_pmc_info() validation to check devid availability and tighten input bounds checking. Drop null-pointer checks now that the storage is static. Signed-off-by: Xi Pardee Signed-off-by: David E. Box --- V2 changes: - Replaced hardcoded array size [3] with MAX_NUM_PMC constant drivers/platform/x86/intel/pmc/ssram_telemetry.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 1deb4d71da3f..4bfe60ee55ca 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -24,7 +24,7 @@ =20 DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_= T)) =20 -static struct pmc_ssram_telemetry *pmc_ssram_telems; +static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC]; static bool device_probed; =20 static int @@ -140,7 +140,7 @@ int pmc_ssram_telemetry_get_pmc_info(unsigned int pmc_i= dx, if (pmc_idx >=3D MAX_NUM_PMC) return -EINVAL; =20 - if (!pmc_ssram_telems || !pmc_ssram_telems[pmc_idx].devid) + if (!pmc_ssram_telems[pmc_idx].devid) return -ENODEV; =20 pmc_ssram_telemetry->devid =3D pmc_ssram_telems[pmc_idx].devid; @@ -153,12 +153,6 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *p= cidev, const struct pci_de { int ret; =20 - pmc_ssram_telems =3D devm_kzalloc(&pcidev->dev, sizeof(*pmc_ssram_telems)= * MAX_NUM_PMC, - GFP_KERNEL); - if (!pmc_ssram_telems) { - ret =3D -ENOMEM; - goto probe_finish; - } =20 ret =3D pcim_enable_device(pcidev); if (ret) { --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0A8F292B2E; Wed, 25 Mar 2026 01:48:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403314; cv=none; b=A8hYuhd+/JQugIsbSEfZLBeMLE+Lxt7zCkTzJL8DjWMhVMjzLmjhOiUywUsrrfeR3XzElNFHztj5KdtuxKyYD5npogLg/nVGrsx8c33vT+O8/5l8DvaN02Cs7219GB4M/u7psmcGC2kvyCi3lVHVB3XKk4t3qsl2RARF7V3Qe8c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403314; c=relaxed/simple; bh=nRw6bSXUrKhDEhAXwI7i/cOnk+ZU7JITipM5DtcprZg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kJgKNmf/SVS3TUPefGtwg2M2Od6YSQK6somZOtZm4InkpDFF5p2HRcfbVyC35VLEU1VFCno4tNGZeXBPmcds6PskUBJNh7oGokKgmrcqPlLq+VrCFvctQvmila50GEb0uhDR3UTvU8kbr8bqum+Q0qx4eHUAwXvsyKiYaqVdfic= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UoD2/lj5; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UoD2/lj5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403313; x=1805939313; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nRw6bSXUrKhDEhAXwI7i/cOnk+ZU7JITipM5DtcprZg=; b=UoD2/lj5vyBDFpHM3wclQTrOIO5ecUun1rIWdt2a5wNHZOr6jSe1g84h 9rxiosmvGz3OVqvBFzsYsKymNF9Kk549CUFDdW3cSdZcx83V240CePRFI QyRl5WkwYqQV6ttl1BEjv/ubqK8lrUZnXlBTnY6Z9p/tuc2Nl7lfVqJeb VIQjGijluKw2Jgoty3zNRqDz7PICa7WgnayJtapemfFocxx2JxK7/a0r5 RHsZWGFdgDHLobjuA2C5twLSOWd+gAhaueFzTar6dTH69qUNz2eJBWxTf D+4tQ8XvVu4iVZAiITi3yuFxet73jcbAJ6t3W9fE37bGlY2MHn41lDKrB w==; X-CSE-ConnectionGUID: agvIXk56SGaTioZyBNK+6g== X-CSE-MsgGUID: Dvr34A+sSqCx8KGRRdDNZA== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317517" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317517" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:31 -0700 X-CSE-ConnectionGUID: zNVDwenlROazvE5dguqZNg== X-CSE-MsgGUID: mBZr/UTNRd+gZH7RcokRRg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190792" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:31 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 11/17] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper Date: Tue, 24 Mar 2026 18:48:13 -0700 Message-ID: <20260325014819.1283566-12-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move DEVID/PWRMBASE extraction into pmc_ssram_get_devid_pwrmbase(). This is a preparatory refactor to place functionality in a common helper for reuse by a subsequent patch. Additionally add missing bits.h include and define SSRAM_BASE_ADDR_MASK for the address extraction mask. Signed-off-by: David E. Box --- V2 changes: - Added missing include for GENMASK_ULL() used in get_base() - Defined SSRAM_BASE_ADDR_MASK macro to replace magic mask constant GENMASK_ULL(63, 3) .../platform/x86/intel/pmc/ssram_telemetry.c | 33 ++++++++++++------- 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 4bfe60ee55ca..779e84c724ac 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -5,6 +5,7 @@ * Copyright (c) 2023, Intel Corporation. */ =20 +#include #include #include #include @@ -21,12 +22,30 @@ #define SSRAM_PCH_OFFSET 0x60 #define SSRAM_IOE_OFFSET 0x68 #define SSRAM_DEVID_OFFSET 0x70 +#define SSRAM_BASE_ADDR_MASK GENMASK_ULL(63, 3) =20 DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_= T)) =20 static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC]; static bool device_probed; =20 +static inline u64 get_base(void __iomem *addr, u32 offset) +{ + return lo_hi_readq(addr + offset) & SSRAM_BASE_ADDR_MASK; +} + +static void pmc_ssram_get_devid_pwrmbase(void __iomem *ssram, unsigned int= pmc_idx) +{ + u64 pwrm_base; + u16 devid; + + pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); + devid =3D readw(ssram + SSRAM_DEVID_OFFSET); + + pmc_ssram_telems[pmc_idx].devid =3D devid; + pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; +} + static int pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 ssram_base, void _= _iomem *ssram) { @@ -63,18 +82,12 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64= ssram_base, void __iomem return intel_vsec_register(&pcidev->dev, &info); } =20 -static inline u64 get_base(void __iomem *addr, u32 offset) -{ - return lo_hi_readq(addr + offset) & GENMASK_ULL(63, 3); -} - static int pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, unsigned int pmc_idx, = u32 offset) { void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D NULL; void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D NULL; - u64 ssram_base, pwrm_base; - u16 devid; + u64 ssram_base; =20 ssram_base =3D pci_resource_start(pcidev, 0); tmp_ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); @@ -99,11 +112,7 @@ pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, uns= igned int pmc_idx, u32 of ssram =3D no_free_ptr(tmp_ssram); } =20 - pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); - devid =3D readw(ssram + SSRAM_DEVID_OFFSET); - - pmc_ssram_telems[pmc_idx].devid =3D devid; - pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; + pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); =20 /* Find and register and PMC telemetry entries */ return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F14A3296BBA; Wed, 25 Mar 2026 01:48:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403314; cv=none; b=LF3nigkD6YbX38VfhJV5yT2cesVJ1abio9Q3OTxeJDKtz+yJONB4c/XStLRHNFFlXs4jRsTv/0lAGau1DfoUv/+NWbhJ12r3FciWKbHlbV8W09oNQINjWoc66BBHpUMPLYynEPh0xrgSbU6HTG+QoSZiZV/70pMvfkJfhH3jqoE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403314; c=relaxed/simple; bh=gmq8eVGTXbj2cwLbvfzFGPSYMeb8z2WsEpbuda+cbT4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=p94ut5GWLn3ieCJCsrulzZSKmSZhvsekgKKvhBAPDEL+k+u28S4snqKPn+9Ps1xqXpjqyNe1BwvHrMYMerPqQe5RQTXynq10n8yXb1GFAhhoW/pnvtj0cLbx3aYHxs7xPmaz5jztwL5E0sBQXAWuGqf5eqcziV+AtKe0w4piS70= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=BBBcokyH; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="BBBcokyH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403313; x=1805939313; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gmq8eVGTXbj2cwLbvfzFGPSYMeb8z2WsEpbuda+cbT4=; b=BBBcokyHnyyvzEIg2+WZs9dOxGVxao7X1ppCWE2/mdunW5QpuwBRzZBZ pvellidSml6uRnRlesSSAzk7F/nIBtBRV1OavD6vLOc2j334Ep/3b4w0O 1eV/0D1657yvMWPK8LQars0z+62xMMK9v3Nula0ZWVmhZADu6oaFLPraO vfSYRk9DHgNTMUvookhplMVyewvF8pqTld4ZUN8r2Kl5X2MVqzMYuPRqe yAH+NRdLAb3pIiShcHfkYGY0NTPV2zU0qjvvZFFnZnIezaO5CTIC2L9gh VDHLtIrvNHg6RX35dqu0pRt9m0S/ZOce7PxDzVSfkJ0x/sn6KmZGMci4i w==; X-CSE-ConnectionGUID: oKn01dSvReWkNZ/Ph22lyg== X-CSE-MsgGUID: hPY1IiMcTpmLLGUO7u98dg== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317520" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317520" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:32 -0700 X-CSE-ConnectionGUID: crLZAcXyRCmqx+4zepj0eg== X-CSE-MsgGUID: Hsh8plc+RUyp2WM34fs1YA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190794" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:31 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 12/17] platform/x86/intel/pmc/ssram: Add PCI platform data Date: Tue, 24 Mar 2026 18:48:14 -0700 Message-ID: <20260325014819.1283566-13-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add per-device platform data for SSRAM telemetry PCI IDs and route probe through a method selector driven by id->driver_data. This is a preparatory refactor for follow-on discovery methods while preserving current behavior: all supported IDs continue to use the PCI initialization path. Signed-off-by: David E. Box --- V2 changes: - Added missing include for dev_dbg() usage in probe .../platform/x86/intel/pmc/ssram_telemetry.c | 70 +++++++++++++++---- 1 file changed, 56 insertions(+), 14 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 779e84c724ac..6917a10cbc80 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -7,6 +7,7 @@ =20 #include #include +#include #include #include #include @@ -26,6 +27,18 @@ =20 DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_= T)) =20 +enum resource_method { + RES_METHOD_PCI, +}; + +struct ssram_type { + enum resource_method method; +}; + +static const struct ssram_type pci_main =3D { + .method =3D RES_METHOD_PCI, +}; + static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC]; static bool device_probed; =20 @@ -83,7 +96,7 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 s= sram_base, void __iomem } =20 static int -pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, unsigned int pmc_idx, = u32 offset) +pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev, unsigned int pmc_i= dx, u32 offset) { void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D NULL; void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D NULL; @@ -118,6 +131,20 @@ pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, un= signed int pmc_idx, u32 of return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); } =20 +static int pmc_ssram_telemetry_pci_init(struct pci_dev *pcidev) +{ + int ret; + + ret =3D pmc_ssram_telemetry_get_pmc_pci(pcidev, PMC_IDX_MAIN, 0); + if (ret) + return ret; + + pmc_ssram_telemetry_get_pmc_pci(pcidev, PMC_IDX_IOE, SSRAM_IOE_OFFSET); + pmc_ssram_telemetry_get_pmc_pci(pcidev, PMC_IDX_PCH, SSRAM_PCH_OFFSET); + + return ret; +} + /** * pmc_ssram_telemetry_get_pmc_info() - Get a PMC devid and base_addr info= rmation * @pmc_idx: Index of the PMC @@ -160,8 +187,18 @@ EXPORT_SYMBOL_GPL(pmc_ssram_telemetry_get_pmc_info); =20 static int pmc_ssram_telemetry_probe(struct pci_dev *pcidev, const struct = pci_device_id *id) { + const struct ssram_type *ssram_type; + enum resource_method method; int ret; =20 + ssram_type =3D (const struct ssram_type *)id->driver_data; + if (!ssram_type) { + dev_dbg(&pcidev->dev, "missing driver data\n"); + ret =3D -EINVAL; + goto probe_finish; + } + + method =3D ssram_type->method; =20 ret =3D pcim_enable_device(pcidev); if (ret) { @@ -169,12 +206,10 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *= pcidev, const struct pci_de goto probe_finish; } =20 - ret =3D pmc_ssram_telemetry_get_pmc(pcidev, PMC_IDX_MAIN, 0); - if (ret) - goto probe_finish; - - pmc_ssram_telemetry_get_pmc(pcidev, PMC_IDX_IOE, SSRAM_IOE_OFFSET); - pmc_ssram_telemetry_get_pmc(pcidev, PMC_IDX_PCH, SSRAM_PCH_OFFSET); + if (method =3D=3D RES_METHOD_PCI) + ret =3D pmc_ssram_telemetry_pci_init(pcidev); + else + ret =3D -EINVAL; =20 probe_finish: /* @@ -187,13 +222,20 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *= pcidev, const struct pci_de } =20 static const struct pci_device_id pmc_ssram_telemetry_pci_ids[] =3D { - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_MTL_SOCM) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCM) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_LNL_SOCM) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_PTL_PCDH) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_PTL_PCDP) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_WCL_PCDN) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_MTL_SOCM), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCS), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCM), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_LNL_SOCM), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_PTL_PCDH), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_PTL_PCDP), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_WCL_PCDN), + .driver_data =3D (kernel_ulong_t)&pci_main }, { } }; MODULE_DEVICE_TABLE(pci, pmc_ssram_telemetry_pci_ids); --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65C9029ACDD; Wed, 25 Mar 2026 01:48:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403315; cv=none; b=Va0ImGh36xQHjSsq2Ym1MhYbFRhaQGFWYPoyEa3kOw4oCrkcxZ5CRHh4nE9r2paiaRo3hofKrsWfSvTE0ee500PR9s0sDR9T/Dfz2xf0uTg7ZVRV7qNluuLLqsBDDXh07HJr3Vh2f+ZKEnyJ1Y0tmkf/d0MRrFvuSaMCwtHCMWk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403315; c=relaxed/simple; bh=7V3cMpy/T5CdDDTun+KHak8IaEqoIlJBsue1FgaOixI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=d6EQ+Jls10IeZS1eMkh9vjY/AOcuxzec6uAsAbjJPnVtw3siXI767/8eqMBkRUazzJENuI7JGh7cBshgXtl7xetPxT8OCUHrt6uw6BLlQC6Ca5MnWzcTizQ3bc9Lg/AM1e1BotJt9MTRcTy1HF+oUl0WpmGxPcWXm4vWpj4am1Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XpYURxaO; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XpYURxaO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403313; x=1805939313; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7V3cMpy/T5CdDDTun+KHak8IaEqoIlJBsue1FgaOixI=; b=XpYURxaOplm4f6XqQE4dUVKAPo7ZdyAjtgwvQCdQlylpZs1y2KOYOdz4 vsBN21YSIcnbQKo3DP/Ruye4g12O2knULk69BFfzP6SCc7IbTr5bPCvSz wAdhk5Gq4ONthQvmfUrDYREjQ1HNSaXKowJp+5U3OOF5FH+LZ3Mih3QgO bI0qpFcDBVVRNxR9Qi1+5jVQ8wPJak7nEnaJCFFX1LVcJnRXoORUoNBCB hR8d6FuMvsruHvQEqEov95W2f52AU+Th7w5CNFuTpbBGMHOD6rRUDYnF7 0txRyDmUGdHzyIY2JH+U8R/xkavf5AUguBa+FP2amehn+hupxgAr05DJY w==; X-CSE-ConnectionGUID: lD6wRe+4R4Wh1Yj7s+uFzQ== X-CSE-MsgGUID: B0LqKYNTR3SKOpfkRggaAA== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317525" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317525" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:33 -0700 X-CSE-ConnectionGUID: hvOU+cNZQ9qjGcVp1nhE6w== X-CSE-MsgGUID: omnewSckRdy0erGbvuziwQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190796" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:32 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 13/17] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe Date: Tue, 24 Mar 2026 18:48:15 -0700 Message-ID: <20260325014819.1283566-14-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Xi Pardee Previously, a single global 'device_probed' flag with memory barriers was used to prevent callers from reading PMC info before probe completion. The write barrier in probe ensured all data, devid and base_addr, was visible before signaling completion, and the read barrier in callers ensured they checked the flag before reading data. A following commit will make probe reentrant, requiring that a different synchronization flag be used since a single global flag cannot coordinate multiple concurrent probes. Switch to per-index devid publication. Each probe instance writes base_addr first, then a write barrier ensures visibility before devid is written as the completion signal. Callers check devid first, then use a read barrier before reading base_addr. This per-index approach allows multiple probes to work independently while maintaining the same memory ordering guarantees. Signed-off-by: Xi Pardee Signed-off-by: David E. Box --- V2 changes: - Expanded commit message to explain synchronization rationale - Remove unused probe_finish label associated with the old global flag .../platform/x86/intel/pmc/ssram_telemetry.c | 40 ++++++++----------- 1 file changed, 16 insertions(+), 24 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 6917a10cbc80..b329e0c0080b 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -40,7 +40,6 @@ static const struct ssram_type pci_main =3D { }; =20 static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC]; -static bool device_probed; =20 static inline u64 get_base(void __iomem *addr, u32 offset) { @@ -55,8 +54,13 @@ static void pmc_ssram_get_devid_pwrmbase(void __iomem *s= sram, unsigned int pmc_i pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); devid =3D readw(ssram + SSRAM_DEVID_OFFSET); =20 - pmc_ssram_telems[pmc_idx].devid =3D devid; pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; + /* + * Memory barrier is used to ensure the correct write order between base_= addr + * and devid. + */ + smp_wmb(); + pmc_ssram_telems[pmc_idx].devid =3D devid; } =20 static int @@ -154,32 +158,28 @@ static int pmc_ssram_telemetry_pci_init(struct pci_de= v *pcidev) * * 0 - Success * * -EAGAIN - Probe function has not finished yet. Try again. * * -EINVAL - Invalid pmc_idx - * * -ENODEV - PMC device is not available */ int pmc_ssram_telemetry_get_pmc_info(unsigned int pmc_idx, struct pmc_ssram_telemetry *pmc_ssram_telemetry) { + if (pmc_idx >=3D MAX_NUM_PMC) + return -EINVAL; + /* * PMCs are discovered in probe function. If this function is called befo= re - * probe function complete, the result would be invalid. Use device_probed - * variable to avoid this case. Return -EAGAIN to inform the consumer to = call + * probe function complete, the result would be invalid. Use devid to avo= id + * this case. Return -EAGAIN to inform the consumer to call * again later. */ - if (!device_probed) + if (!pmc_ssram_telems[pmc_idx].devid) return -EAGAIN; =20 + pmc_ssram_telemetry->devid =3D pmc_ssram_telems[pmc_idx].devid; /* * Memory barrier is used to ensure the correct read order between - * device_probed variable and PMC info. + * devid variable and base_addr. */ smp_rmb(); - if (pmc_idx >=3D MAX_NUM_PMC) - return -EINVAL; - - if (!pmc_ssram_telems[pmc_idx].devid) - return -ENODEV; - - pmc_ssram_telemetry->devid =3D pmc_ssram_telems[pmc_idx].devid; pmc_ssram_telemetry->base_addr =3D pmc_ssram_telems[pmc_idx].base_addr; return 0; } @@ -194,8 +194,7 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de ssram_type =3D (const struct ssram_type *)id->driver_data; if (!ssram_type) { dev_dbg(&pcidev->dev, "missing driver data\n"); - ret =3D -EINVAL; - goto probe_finish; + return -EINVAL; } =20 method =3D ssram_type->method; @@ -203,7 +202,7 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de ret =3D pcim_enable_device(pcidev); if (ret) { dev_dbg(&pcidev->dev, "failed to enable PMC SSRAM device\n"); - goto probe_finish; + return ret; } =20 if (method =3D=3D RES_METHOD_PCI) @@ -211,13 +210,6 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *p= cidev, const struct pci_de else ret =3D -EINVAL; =20 -probe_finish: - /* - * Memory barrier is used to ensure the correct write order between PMC i= nfo - * and device_probed variable. - */ - smp_wmb(); - device_probed =3D true; return ret; } =20 --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72BA12BEFEF; Wed, 25 Mar 2026 01:48:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403316; cv=none; b=JbWDGAaJPHz2NkeLepbunIOR+avyjn+ORdLlQ/WygYIQLNB8TJDiGQYiaJ9ta3x14WGS7zpAig6eknSEnHg9Ao9qbHVF1Ogje3Q68i6ifuN+sBelw4YDKkwZJn1KDHnpRErNO30mdCXI55kl55xzvoIE2msI54HCpJlzwMn1rGU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403316; c=relaxed/simple; bh=pEArcwsZYW3P0P26IVOxZ/ecMmII56u1mrbltB4oOLk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PnAVx0ONlOoA0cEOxU9LqG0xpf3UGvh9Y/dChYJ2zMt1ELZml9SRTW7P9WYBZjrKJfojd8GW+I1IdUdnPybkcl9FOO/PEC0VFLCggZTOuiF5D4uo3I+2v3+Dy9u63l0945KISnMZQEJqTUgNmrk1f8qDWepakHl3oG0E6oOhcEY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Dr3z2Ncf; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Dr3z2Ncf" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403314; x=1805939314; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pEArcwsZYW3P0P26IVOxZ/ecMmII56u1mrbltB4oOLk=; b=Dr3z2Ncfy4wDvqAtsg1IGlujHCAWNCSp5PI8nAJVHLeY1KheITO/9Rr5 aqJrMMwd1A7J5pA85u7bzvwfBUeN3z2T/En/HXMC88xJwMaCH6zT2LpfJ Hdf/9uOeDEboLjYvRNhsht50cQaKJZi2o/Y6taPy4m87ZuVO1zlgpKv3I SwAPPZURpuLDOLnK0pAxJOEIEFbcVUb4NEdtraXK4pU3KEBayCYnU/Del dsUO7N08hQjvHNLKq1Vi6tc7PN+6pto0Lh243l2/FTGbTEm61SEOhDG0F IGjSBW3k1DkRObAd+vAY+FRowLg9tOyj0oW/tJEEPazASyuijRFq4RSxf Q==; X-CSE-ConnectionGUID: fPlfQI8XQ8K+SmX0SQSZ1w== X-CSE-MsgGUID: F6SkhDsAQgCGKLDc8AL1Sw== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317528" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317528" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:33 -0700 X-CSE-ConnectionGUID: e9Loo5r7TQyZjD0ACPaSYA== X-CSE-MsgGUID: bu34OkDETs2kO5Nsnvb/wQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190798" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:33 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 14/17] platform/x86/intel/pmc/ssram_telemetry: Fix cleanup pattern for __free() variables Date: Tue, 24 Mar 2026 18:48:16 -0700 Message-ID: <20260325014819.1283566-15-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fix improper cleanup.h usage where __free() variables were initialized to NULL and then assigned later. Move ssram variable declarations into the if/else branches where they're actually assigned to follow the safer pattern recommended in cleanup.h. This change requires also moving the pmc_ssram_get_devid_pwrmbase() and add_pmt calls into both if/else branches to keep operations within the scope of the local ssram variables. Signed-off-by: David E. Box --- V2 changes: - New patch addressing Ilpo's review of cleanup.h patterns .../platform/x86/intel/pmc/ssram_telemetry.c | 25 +++++++++++-------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index b329e0c0080b..b1ba17f18ea5 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -102,12 +102,11 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u= 64 ssram_base, void __iomem static int pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev, unsigned int pmc_i= dx, u32 offset) { - void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D NULL; - void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D NULL; u64 ssram_base; =20 ssram_base =3D pci_resource_start(pcidev, 0); - tmp_ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); + void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D + ioremap(ssram_base, SSRAM_HDR_SIZE); if (!tmp_ssram) return -ENOMEM; =20 @@ -121,18 +120,24 @@ pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcide= v, unsigned int pmc_idx, u3 if (!ssram_base) return 0; =20 - ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); + void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D + ioremap(ssram_base, SSRAM_HDR_SIZE); if (!ssram) return -ENOMEM; =20 + pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); + + /* Find and register and PMC telemetry entries */ + return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); } else { - ssram =3D no_free_ptr(tmp_ssram); + void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D + no_free_ptr(tmp_ssram); + + pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); + + /* Find and register and PMC telemetry entries */ + return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); } - - pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); - - /* Find and register and PMC telemetry entries */ - return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); } =20 static int pmc_ssram_telemetry_pci_init(struct pci_dev *pcidev) --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3F2F2C21F1; Wed, 25 Mar 2026 01:48:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403316; cv=none; b=azEha+izDa7EVJGTVK9FswplvDcVu9t07n/FSUl0BvTjZPAD3evRU7vjyAHXu3p5QkmWOlbE5OJfh4jthWJdfNdeKy5/ukx9jaNF3fT1gv2bCHlHVIV9TgcmFR2joDEID3zyTyELKuDRG4SjjajqFIW7FgtGlNkNcYxvR76B/d8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403316; c=relaxed/simple; bh=6aPgdvEgCqfIZ05bSNSvS1ubF0SB1qWj9ZrtQ1X2tOc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YcPasxzJJSJFTIh7Nz881ajebIxjZcenX7Htql2Nt8A1V57pUitcfueMjoOEL2fdoKN0yGNXSjpKu8OOw/xye27kqrwvNq8nQggR5a62gbG27bZMPZ07Ed4MpLZI5IGlYjQYXbSye/r9GIyILPPK6hpDLvcRK7V3Ultx3sxOdao= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=i80l8xrZ; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="i80l8xrZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403314; x=1805939314; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6aPgdvEgCqfIZ05bSNSvS1ubF0SB1qWj9ZrtQ1X2tOc=; b=i80l8xrZPV3V5j/CZMEWuHRrD0Pd0KkkHyIKCyABaMYgJh1t8VVcUqn+ 4JzEqR0PxezilCUSPTbwGm49xmc4Qra3ban+Ml/uz7OoUKpo0j/1JmPBW t3VRHdhpJ5iI6qDiG2VPWkMKC9KUtIuybzFw7Dy7fsat8S1VALOgsxR3g mJ99VjvZE0YUIpy2lUnyOh474oWJSmPJZwX+D9jl8fY+gAfEj+e2dlMCh XJuRQsqzIGyLEPTAYyjHyekXu705eNhOw3eUzYUlmrz/XKJx4H81MwvxD +ue965ReXY9TET+qYDb39Soe6qbd7dkRxtuRzF+vuvpyIwVrybScqkdmU w==; X-CSE-ConnectionGUID: PRT2xnf7Stegjcx8Emz5/w== X-CSE-MsgGUID: Pvfd/A6xQ8e/Xh8xMk7diQ== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317531" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317531" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:34 -0700 X-CSE-ConnectionGUID: cihBMI2/SLGiYZslfTH6OQ== X-CSE-MsgGUID: 9MGNRHnHT0Ghu3iZRm+kZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190800" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:33 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 15/17] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding Date: Tue, 24 Mar 2026 18:48:17 -0700 Message-ID: <20260325014819.1283566-16-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Prepare the SSRAM telemetry driver for ACPI-based discovery by adding the common initialization path and selection framework needed for both PCI and ACPI resource discovery. At this stage, existing supported devices continue to use the PCI path. This change lays the groundwork for follow-on patches that wire platform IDs to the ACPI policy path. Signed-off-by: David E. Box Signed-off-by: Xi Pardee --- V2 changes: - Fixed cleanup patterns using __free() attributes - Addressed Ilpo's recommendations for safer cleanup.h patterns .../platform/x86/intel/pmc/ssram_telemetry.c | 70 +++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index b1ba17f18ea5..543f7d7c5049 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -5,6 +5,7 @@ * Copyright (c) 2023, Intel Corporation. */ =20 +#include #include #include #include @@ -29,14 +30,17 @@ DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *= , if (_T) iounmap(_T)) =20 enum resource_method { RES_METHOD_PCI, + RES_METHOD_ACPI, }; =20 struct ssram_type { enum resource_method method; + enum pmc_index p_index; }; =20 static const struct ssram_type pci_main =3D { .method =3D RES_METHOD_PCI, + .p_index =3D PMC_IDX_MAIN, }; =20 static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC]; @@ -154,6 +158,67 @@ static int pmc_ssram_telemetry_pci_init(struct pci_dev= *pcidev) return ret; } =20 +static int pmc_ssram_telemetry_get_pmc_acpi(struct pci_dev *pcidev, unsig= ned int pmc_idx) +{ + u64 ssram_base; + + ssram_base =3D pci_resource_start(pcidev, 0); + if (!ssram_base) + return -ENODEV; + + void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D + ioremap(ssram_base, SSRAM_HDR_SIZE); + if (!ssram) + return -ENOMEM; + + pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); + + return 0; +} + +static int pmc_ssram_telemetry_acpi_init(struct pci_dev *pcidev, + enum pmc_index index) +{ + struct acpi_buffer buf =3D { ACPI_ALLOCATE_BUFFER, NULL }; + acpi_handle handle =3D ACPI_HANDLE(&pcidev->dev); + struct intel_vsec_header header; + struct intel_vsec_header *headers[2] =3D { &header, NULL }; + struct intel_vsec_platform_info info =3D { }; + void *dsd_buf __free(pmc_acpi_free) =3D buf.pointer; + union acpi_object *dsd; + acpi_status status; + int ret; + + if (!handle) + return -ENODEV; + + status =3D acpi_evaluate_object(handle, "_DSD", NULL, &buf); + if (ACPI_FAILURE(status)) + return -ENODEV; + + dsd =3D pmc_find_telem_guid(buf.pointer); + if (!dsd) + return -ENODEV; + + u32 (*acpi_disc)[4] __free(kfree) =3D pmc_parse_telem_dsd(dsd, &header); + if (IS_ERR(acpi_disc)) + return PTR_ERR(acpi_disc); + + info.headers =3D headers; + info.caps =3D VSEC_CAP_TELEMETRY; + info.acpi_disc =3D acpi_disc; + info.src =3D INTEL_VSEC_DISC_ACPI; + + /* This is an ACPI companion device. PCI BAR will be used for base addr. = */ + info.base_addr =3D 0; + + ret =3D intel_vsec_register(&pcidev->dev, &info); + if (ret) + return ret; + + return pmc_ssram_telemetry_get_pmc_acpi(pcidev, index); +} + /** * pmc_ssram_telemetry_get_pmc_info() - Get a PMC devid and base_addr info= rmation * @pmc_idx: Index of the PMC @@ -194,6 +259,7 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de { const struct ssram_type *ssram_type; enum resource_method method; + enum pmc_index index; int ret; =20 ssram_type =3D (const struct ssram_type *)id->driver_data; @@ -203,6 +269,7 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de } =20 method =3D ssram_type->method; + index =3D ssram_type->p_index; =20 ret =3D pcim_enable_device(pcidev); if (ret) { @@ -212,6 +279,8 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de =20 if (method =3D=3D RES_METHOD_PCI) ret =3D pmc_ssram_telemetry_pci_init(pcidev); + else if (method =3D=3D RES_METHOD_ACPI) + ret =3D pmc_ssram_telemetry_acpi_init(pcidev, index); else ret =3D -EINVAL; =20 @@ -244,6 +313,7 @@ static struct pci_driver pmc_ssram_telemetry_driver =3D= { }; module_pci_driver(pmc_ssram_telemetry_driver); =20 +MODULE_IMPORT_NS("INTEL_PMC_CORE"); MODULE_IMPORT_NS("INTEL_VSEC"); MODULE_AUTHOR("Xi Pardee "); MODULE_DESCRIPTION("Intel PMC SSRAM Telemetry driver"); --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17A8C26FD93; Wed, 25 Mar 2026 01:48:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403316; cv=none; b=iOCszt30MKdp1x0zLo9xZkeYDihfVRgWF6k3z60OTaoyWuI8nZGfamS/zW+AYT4VPJeqx5VN3swULEoQvq1tr16V6pxwaWg5rxTmL8Uq6OuAI2+Y95U9PiEfS9iT0TnLTAbL3YZWoiSIaq5a8FcEqeRJlakYzP1I7VA1a8Uu2w8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403316; c=relaxed/simple; bh=+CsvZzERkjsscfYNWRClK0GnEBLzm8MEvu/3dbeaJto=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gFMnBFkP7/sbMUNEv4N7bPaiJtPepwzgRdKFEYleqjff+mjlV3EUJZO0eYxsNob96euxNKDPb36d9tH3Yfzqk27h1n74atEhla+XqTmbRp4BRMWZ/WzmmB49eSFuGRyTO1NoKVwh4tQv+6TD4m0cJMY7HinykHJaRf/dP0sgavM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=WN0SbHwL; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="WN0SbHwL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403315; x=1805939315; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+CsvZzERkjsscfYNWRClK0GnEBLzm8MEvu/3dbeaJto=; b=WN0SbHwLUC/LiZ23lfwxmFRE0IARVwdbd9v3Yh9UwjZ3GFyBL9r4a1Eu Xmeh3kxzMwpIPwXI/jtPwvzYTLnYz2p3tW/ZzXj+Ttl+GH0im2sPbd2En HIKTieQFB5lnsu+N8J6dlqRfEmyBj5AAwV1+N8wGm+E0zWf9MQQ3dAEpw LdJTfqVJVnrQYnwt0YmoAUIjFO2WrChgi0jkKiNQDkBO8pUnpnC+nABj3 9Shr9rDMebrB+ggVkfTv3+7LZ68HSQIONSMmcnLgAf0XKxJw7aatgfHzq m7HsH3OM4fnIqoZ6/ng4/ysmYELfcp+6AWMuAQp8YrmuTeRB+j5uHBPFz w==; X-CSE-ConnectionGUID: qHWoepT2Q9mlfGKUn6ARww== X-CSE-MsgGUID: gOuzK/0fS+WzXMEB6HldWA== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317535" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317535" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:35 -0700 X-CSE-ConnectionGUID: pZ2JGMFnSNKsslTNvpyt+g== X-CSE-MsgGUID: 2xlCpw9dT+SnNHcxD8A2AQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190805" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:34 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 16/17] platform/x86/intel/pmc/ssram: Make PMT registration optional Date: Tue, 24 Mar 2026 18:48:18 -0700 Message-ID: <20260325014819.1283566-17-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The SSRAM telemetry driver extracts essential PMC device ID and power management base address information that intel_pmc_core depends on for core functionality. If PMT registration failure prevents this critical data from being available, intel_pmc_core operation would break entirely. Therefore, PMT registration failures must not block access to this data. Change the behavior to log a warning when PMT registration fails but continue with successful driver initialization, ensuring the primary telemetry data remains accessible to dependent drivers. Signed-off-by: David E. Box --- V2 changes: - Update commit message for clarity - Also apply the PCI telemetry path drivers/platform/x86/intel/pmc/ssram_telemetry.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 543f7d7c5049..74a2f56881c1 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -107,6 +107,7 @@ static int pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev, unsigned int pmc_i= dx, u32 offset) { u64 ssram_base; + int ret; =20 ssram_base =3D pci_resource_start(pcidev, 0); void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D @@ -132,7 +133,9 @@ pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev,= unsigned int pmc_idx, u3 pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); =20 /* Find and register and PMC telemetry entries */ - return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); + ret =3D pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); + if (ret) + dev_warn(&pcidev->dev, "could not register PMT\n"); } else { void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D no_free_ptr(tmp_ssram); @@ -140,8 +143,12 @@ pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev= , unsigned int pmc_idx, u3 pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); =20 /* Find and register and PMC telemetry entries */ - return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); + ret =3D pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); + if (ret) + dev_warn(&pcidev->dev, "could not register PMT\n"); } + + return 0; } =20 static int pmc_ssram_telemetry_pci_init(struct pci_dev *pcidev) @@ -214,7 +221,7 @@ static int pmc_ssram_telemetry_acpi_init(struct pci_dev= *pcidev, =20 ret =3D intel_vsec_register(&pcidev->dev, &info); if (ret) - return ret; + dev_warn(&pcidev->dev, "could not register PMT\n"); =20 return pmc_ssram_telemetry_get_pmc_acpi(pcidev, index); } --=20 2.43.0 From nobody Fri Apr 3 02:56:36 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 54D7023ED60; Wed, 25 Mar 2026 01:49:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403347; cv=none; b=tMQqEMt3oUR56Yi/+jFp4H6hdn7z2NtxgUppirUIjCoHj/3gf+nINepOzNb+1EB9PMPPeH8Uzuiyw0BXQpvQv/3IpQhHi2hP5xBU86nUlZzJ4ouXk8mrukcShCQWYRoUvqxJwUoq8fqTQkRrw5LJdrc/xYZ68xKO4BFKr1OwK2I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774403347; c=relaxed/simple; bh=rNg9tfNQtbmOtDhT3jnHqDXTiehG5vPa6LTF4KCJ57U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=n5sF+MW+lB1sO86MMWlufPWBxXbKRtLiiOVIH3ZbGlKfM1d569/RxiYRrNnL0aOSvafgRGpx9cctVBKu4oEqj+vsEbqrotgIeVL5lLpbSy2V0z9BllooFGMt2w6e63bnke7gElI1YgG30DBTENC+v6md5/2snzmY7TpOhueCjCM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jRdeSg50; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jRdeSg50" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774403346; x=1805939346; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rNg9tfNQtbmOtDhT3jnHqDXTiehG5vPa6LTF4KCJ57U=; b=jRdeSg50XnDKDE8ZUSwp3BXFIysHFE8SczFvOBmVKYKKiTp0kTMwp8jx k1YYBvQAhs1n+qk7Xj1IApRe2Fb3dQmay8fAg1mvV1KAZglggvvMn+zXW hA6iV7NJ5dSlqpeHUeDWDRLG54G5El6UAl/Efe8GkYZKhTlyJCi9wX+px 7s6U6P6M4Gf85q6hflrAOpEp/tYRouObyE/eQ/UyFst6QCtTexa82njRD YOb0+gYnKILQADXTgYkiFGAxUSUWcBWV/BeUL2qmaoDckeUF9ZSYV+Fui qFfJiJWAzMHfH/djZGbDjrIFKzX3ybDE0z+6MazYCZ0JFAddvcxDHWEni A==; X-CSE-ConnectionGUID: U4kvL1iiRJCC1fWN0zDYYg== X-CSE-MsgGUID: sPW74PEyQyOe0PdK5jbd1w== X-IronPort-AV: E=McAfee;i="6800,10657,11739"; a="75317545" X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="75317545" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:49:06 -0700 X-CSE-ConnectionGUID: M50hhDTrSICs6joSIX+sjA== X-CSE-MsgGUID: iTZHI3dzQs+UcOoE0o2WkA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,139,1770624000"; d="scan'208";a="221190811" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 18:48:35 -0700 From: "David E. Box" To: irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com, david.e.box@linux.intel.com Cc: hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH V2 17/17] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery Date: Tue, 24 Mar 2026 18:48:19 -0700 Message-ID: <20260325014819.1283566-18-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260325014819.1283566-1-david.e.box@linux.intel.com> References: <20260325014819.1283566-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add Nova Lake S PMC device IDs to enable binding of the SSRAM telemetry driver on NVL platforms, and map them to the ACPI-based discovery policy. Signed-off-by: David E. Box --- V2 - No changes drivers/platform/x86/intel/pmc/core.h | 5 +++++ drivers/platform/x86/intel/pmc/ssram_telemetry.c | 16 ++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/i= ntel/pmc/core.h index 37ea1caf1817..c4c4a33f2e05 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -333,6 +333,11 @@ enum ppfear_regs { #define PMC_DEVID_MTL_IOEP 0x7ecf #define PMC_DEVID_MTL_IOEM 0x7ebf =20 +/* NVL */ +#define PMC_DEVID_NVL_PCDH 0xd37e +#define PMC_DEVID_NVL_PCDS 0xd47e +#define PMC_DEVID_NVL_PCHS 0x6e27 + extern const char *pmc_lpm_modes[]; =20 struct pmc_bit_map { diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 74a2f56881c1..848e259a89cf 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -43,6 +43,16 @@ static const struct ssram_type pci_main =3D { .p_index =3D PMC_IDX_MAIN, }; =20 +static const struct ssram_type acpi_main =3D { + .method =3D RES_METHOD_ACPI, + .p_index =3D PMC_IDX_MAIN, +}; + +static const struct ssram_type acpi_pch =3D { + .method =3D RES_METHOD_ACPI, + .p_index =3D PMC_IDX_PCH, +}; + static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC]; =20 static inline u64 get_base(void __iomem *addr, u32 offset) @@ -309,6 +319,12 @@ static const struct pci_device_id pmc_ssram_telemetry_= pci_ids[] =3D { .driver_data =3D (kernel_ulong_t)&pci_main }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_WCL_PCDN), .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_NVL_PCDH), + .driver_data =3D (kernel_ulong_t)&acpi_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_NVL_PCDS), + .driver_data =3D (kernel_ulong_t)&acpi_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_NVL_PCHS), + .driver_data =3D (kernel_ulong_t)&acpi_pch }, { } }; MODULE_DEVICE_TABLE(pci, pmc_ssram_telemetry_pci_ids); --=20 2.43.0