From nobody Fri Apr 3 03:00:57 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 49AEF3C7E08; Tue, 24 Mar 2026 22:58:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774393084; cv=none; b=t6iqHMx2bN0fejkF5+q+L0Y6weOh/79UlYemCTBdW/9TXxuFMjXd0Q1nbcO8wV3wHynI5xhGvuV5sEQu8xfYgCVfvLPqGLwt3ubGYIldhTMhBNmsJ+vn+dGVtz8c8GeX5xSeilwUNYRDl9lWi4qDU1vG3DPuluk1rJwrrmBJWps= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774393084; c=relaxed/simple; bh=lK8enCH9Mq/ykr9gHpVCWCtvGBLudclG3Jad4gdM9+o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rSQNL9NvmiSAF4rIn4bQsoj/4jJOLLctcf0IccnjvExTVUJugEesTF16jmkIN8yP6JztYZClNPsgkycrTmj7eGl4yAHBvqMhVvCXs0+cN5r9rfjPLTDjmXgZiEwVoCBDKZHXdazkZEwEvQ3gdaTpj9Pf9E2NfwvrWp6j96nW2jQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: sx4OHp5cQ82O3F0fKoVjmA== X-CSE-MsgGUID: ac/HC4SBRJmm2Cq/EZrs9A== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 25 Mar 2026 07:52:54 +0900 Received: from mind-2s.example.org (unknown [10.24.0.35]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 1C48D400B54B; Wed, 25 Mar 2026 07:52:50 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Fabrizio Castro , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Biju Das , Lad Prabhakar Subject: [PATCH 1/2] arm64: dts: renesas: r9a09g056: Remove wdt{0,2,3} nodes Date: Tue, 24 Mar 2026 22:52:34 +0000 Message-ID: <20260324225239.19136-2-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260324225239.19136-1-fabrizio.castro.jz@renesas.com> References: <20260324225239.19136-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/V2N SoC (a.k.a. r9a09g056) comes with 4 CA55 cores and 1 CM33 core. While the user manual doesn't explicitly specify which cores should have access to particular watchdogs, it turns out that (similarly to the Renesas RZ/V2H(P)) it only makes sense for Linux to use WDT1. Remove DT nodes wdt{0,2,3} from the RZ/V2N SoC specific dtsi to make it compliant with the original design intent. This change is harmless as there are no users for the nodes being stripped out of this device tree. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Lad Prabhakar --- arch/arm64/boot/dts/renesas/r9a09g056.dtsi | 30 ---------------------- 1 file changed, 30 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g056.dtsi index 9192c5bf7e59..40525470194e 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi @@ -599,16 +599,6 @@ ostm7: timer@12c03000 { status =3D "disabled"; }; =20 - wdt0: watchdog@11c00400 { - compatible =3D "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt"; - reg =3D <0 0x11c00400 0 0x400>; - clocks =3D <&cpg CPG_MOD 0x4b>, <&cpg CPG_MOD 0x4c>; - clock-names =3D "pclk", "oscclk"; - resets =3D <&cpg 0x75>; - power-domains =3D <&cpg>; - status =3D "disabled"; - }; - wdt1: watchdog@14400000 { compatible =3D "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt"; reg =3D <0 0x14400000 0 0x400>; @@ -619,26 +609,6 @@ wdt1: watchdog@14400000 { status =3D "disabled"; }; =20 - wdt2: watchdog@13000000 { - compatible =3D "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt"; - reg =3D <0 0x13000000 0 0x400>; - clocks =3D <&cpg CPG_MOD 0x4f>, <&cpg CPG_MOD 0x50>; - clock-names =3D "pclk", "oscclk"; - resets =3D <&cpg 0x77>; - power-domains =3D <&cpg>; - status =3D "disabled"; - }; - - wdt3: watchdog@13000400 { - compatible =3D "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt"; - reg =3D <0 0x13000400 0 0x400>; - clocks =3D <&cpg CPG_MOD 0x51>, <&cpg CPG_MOD 0x52>; - clock-names =3D "pclk", "oscclk"; - resets =3D <&cpg 0x78>; - power-domains =3D <&cpg>; - status =3D "disabled"; - }; - rtc: rtc@11c00800 { compatible =3D "renesas,r9a09g056-rtca3", "renesas,rz-rtca3"; reg =3D <0 0x11c00800 0 0x400>; --=20 2.43.0 From nobody Fri Apr 3 03:00:57 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5D8AA3C7E0A; Tue, 24 Mar 2026 22:58:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774393084; cv=none; b=SGNre0FUErDkLNpPw6mjULxZX80z+3HWRnR7clZkPSnF7RauO0j3uBewQk/1yL4pL8M+uIQY6i/dOkfjrJprjXEyakyw84LwZ2khuW/nlIeboAYWbCiEZiVLILzs2SY1ovRWoWn6HIvYrQvaKPnNYawfyLzQcJ50q1fV6a81ctw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774393084; c=relaxed/simple; bh=kDkMpF4f/zShZoQyS2bVy28n8MEDtIPPndBchULuPlk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iJed7pHPHyr61+QgkKlzwsmRbgU1Pa/A70oTY/QhooczLH9htM+CimFtkOfTp5A3fCkdSg7mqaiAe5WNB+zDkzhhbBTmWIU0FXX3i0MvqH2JdCjQz5eqS3qas87eLIi/EXxdeaDCBNqix0xLr1xko+rMgM1q37DrX9F/5uU4TF8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: Ew6y+YbdQC+GBjNUvfcnNA== X-CSE-MsgGUID: fmLzuA7PQN2jb+9HdRWPSw== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 25 Mar 2026 07:52:59 +0900 Received: from mind-2s.example.org (unknown [10.24.0.35]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 48D2E400B54B; Wed, 25 Mar 2026 07:52:55 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Fabrizio Castro , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Biju Das , Lad Prabhakar Subject: [PATCH 2/2] clk: renesas: r9a09g056: Remove entries for WDT{0,2,3} Date: Tue, 24 Mar 2026 22:52:35 +0000 Message-ID: <20260324225239.19136-3-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260324225239.19136-1-fabrizio.castro.jz@renesas.com> References: <20260324225239.19136-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/V2N SoC (a.k.a. r9a09g056) comes with 4 watchdogs. As it turns out, it only makes sense for Linux to have access to WDT1. Remove the clock and reset entries for WDT{0,2,3} to prevent interfering with the CM33 core. This change is harmless as only WDT1 is currently used in Linux, there are no users for the WDT{0,2,3} IPs. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Lad Prabhakar --- drivers/clk/renesas/r9a09g056-cpg.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/clk/renesas/r9a09g056-cpg.c b/drivers/clk/renesas/r9a0= 9g056-cpg.c index 549c882f9a18..2ff2935aeb0d 100644 --- a/drivers/clk/renesas/r9a09g056-cpg.c +++ b/drivers/clk/renesas/r9a09g056-cpg.c @@ -273,22 +273,10 @@ static const struct rzv2h_mod_clk r9a09g056_mod_clks[= ] __initconst =3D { BUS_MSTOP(11, BIT(15))), DEF_MOD("gtm_7_pclk", CLK_PLLCLN_DIV16, 4, 10, 2, 10, BUS_MSTOP(12, BIT(0))), - DEF_MOD("wdt_0_clkp", CLK_PLLCM33_DIV16, 4, 11, 2, 11, - BUS_MSTOP(3, BIT(10))), - DEF_MOD("wdt_0_clk_loco", CLK_QEXTAL, 4, 12, 2, 12, - BUS_MSTOP(3, BIT(10))), DEF_MOD("wdt_1_clkp", CLK_PLLCLN_DIV16, 4, 13, 2, 13, BUS_MSTOP(1, BIT(0))), DEF_MOD("wdt_1_clk_loco", CLK_QEXTAL, 4, 14, 2, 14, BUS_MSTOP(1, BIT(0))), - DEF_MOD("wdt_2_clkp", CLK_PLLCLN_DIV16, 4, 15, 2, 15, - BUS_MSTOP(5, BIT(12))), - DEF_MOD("wdt_2_clk_loco", CLK_QEXTAL, 5, 0, 2, 16, - BUS_MSTOP(5, BIT(12))), - DEF_MOD("wdt_3_clkp", CLK_PLLCLN_DIV16, 5, 1, 2, 17, - BUS_MSTOP(5, BIT(13))), - DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18, - BUS_MSTOP(5, BIT(13))), DEF_MOD("rtc_0_clk_rtc", CLK_PLLCM33_DIV16, 5, 3, 2, 19, BUS_MSTOP(3, BIT(11) | BIT(12))), DEF_MOD("rspi_0_pclk", CLK_PLLCLN_DIV8, 5, 4, 2, 20, @@ -571,10 +559,7 @@ static const struct rzv2h_reset r9a09g056_resets[] __i= nitconst =3D { DEF_RST(7, 2, 3, 3), /* GTM_5_PRESETZ */ DEF_RST(7, 3, 3, 4), /* GTM_6_PRESETZ */ DEF_RST(7, 4, 3, 5), /* GTM_7_PRESETZ */ - DEF_RST(7, 5, 3, 6), /* WDT_0_RESET */ DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */ - DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */ - DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */ DEF_RST(8, 1, 3, 18), /* RSCI0_PRESETN */ DEF_RST(8, 2, 3, 19), /* RSCI0_TRESETN */ DEF_RST(8, 3, 3, 20), /* RSCI1_PRESETN */ --=20 2.43.0