From nobody Fri Apr 3 04:38:34 2026 Received: from mail-dy1-f182.google.com (mail-dy1-f182.google.com [74.125.82.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E18EB3C73D7 for ; Tue, 24 Mar 2026 22:10:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.82.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774390242; cv=none; b=XMX4ROcUA6qpFP7fvaNHeigpek7P1HLQist3fM57QLTLtj1ib0oDqzk52jw7OCCBQ7kk2KVKerl21AxcSHybYg8DWu6PMnxvbQ2v2qfn3ENRVBJfONmRmefoEEL/YDCc7nsXbjkqDFsgHByer5tsuDU8S8dib4XsXLrjj8lzFzk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774390242; c=relaxed/simple; bh=NhrKwtUQcjJatCCx3ryK1/8R6kThqyiE2/zkMKgXxzY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Tsrg4PUVS2XDTSlH4QsZhIku7bofUOlnawYI2C7CjZwChefY7NhJHJ03qCgps8x9qHkXB0JvQHHMaI8iiCl23oT/7PwjsCDcvTZcSU/EtpzelFQnOJgcXfc+eGLCqo/bYhbj9k1H5u40dhEe9eWvHsFzSFbkRM0uqdq9sQWNQ8s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=m3JpMg9A; arc=none smtp.client-ip=74.125.82.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="m3JpMg9A" Received: by mail-dy1-f182.google.com with SMTP id 5a478bee46e88-2c156c4a9efso910531eec.1 for ; Tue, 24 Mar 2026 15:10:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1774390239; x=1774995039; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EKaNrhc05yAccaxhVc4sY8HFstQiIz5DevinHHD49W0=; b=m3JpMg9AvSZ0orlWTS3KX1stBzT0tSiu3w90y+1sIqztZV6gFC9g9EShkuQTlHmjgn YUkRVMRwkCzNeBlwE1Lx63NvBFUJovIqTNdhL7i/h+oHsfs744dTtnIzW9ujb/1vI4ip VwJdODsDUX/c+M7o0Sw9Bm2jWQcVL3NqnixDO6BMnajD4RRBsB5gkS6Y0ovN2F3DGNUl ZC2mqSmaGTTYyqF6BoSUZMHzLxHdVqugq4v5cOliGuod7OXSGXtZKbiI00PpWl6UGyWd BuMEpL/uZI61+OrbqL2NWWqrKnS7UQ6ozIkyQV/+l5SyVdEMgYlGpeWQwq4j2xvWms/c Wm2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774390239; x=1774995039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=EKaNrhc05yAccaxhVc4sY8HFstQiIz5DevinHHD49W0=; b=s29ESB4ekGeIq3j0nQLs07GS5FEk4AYtbDCvynvbn6utIbwcyYIwZBlheZZlW2zVvV EjAGD6o+tI1Cah5DQ689BzSN8xfittfJECcJWKe9MeggXghuGkfkG6iO7sW2fFSPNkAa ET7Kp5i7AQo7VXmxRcEu79E+PxNwm02auS7J0KZv64BbAaSIPmwtu6KQ41mp6Dy9mIzC LybQ9syI+j3YHuQ06EQsfEFusy32I6A9AW6cJy0wzvjvVrkRrc1b7cBP7FXEFO8S4zq6 vf55vrIJcxVUtp/75vQT0+CJ4T6NfnSOoJPCXrmogcpcU/Tn8JA8sqezCREfV25QTluG 0JmQ== X-Forwarded-Encrypted: i=1; AJvYcCXA3hPuIyhKWuxwv51R8O4/hE0qH6Zt1cYdMxyUyzXCwuaGYPyhBBXdE1heFu5u5zGsBMO28yYXSnXtm/I=@vger.kernel.org X-Gm-Message-State: AOJu0YxEkoiM4e8YlTGipuWZ0W/a84hkWf3RvlcdFD8Mur7tk93AlGDC BDyyXbXj2MeKkWmvpOb1OjPaQdBF+Y5rYicvb0qJD0KTLDYiPjH27Z67 X-Gm-Gg: ATEYQzyfWoFQW3waQSSeIgm65YijvJF3QmMX9tNcmP71HviOpoI2VrUDKL88HnulPUd +lpBjNcixWGMHI+Dw7UlMhXlWnXROEev/W2OVCBXOQPT6/NLN/LimcusBp4u5kJYsoftCVcpw9X S8WCS34AhFHuM4xnX+Ma7e9xsctJ9C+N+Ov+QtpAuQtVbBg9NC0TLoReRHUIjsY5jfT2DCA+qJ2 80X0MLwXAITkaFbXE3VEj7GVyX6SX2YImBTs7aWIEtvtp3cNurvwBotjRXHS6Lk4+VOm+U5DZoM CtZCphsdWiZLxF+HCASjq2ZfVeO8eRx/DLUcXnR8P4calagkBy5kmYGIG0AGZzWsyn9INnTZz0B k97RJH1lr67unyrvay48VCvidxXkS7+RZZlU8HIzNB5z2goksy9ld16Lp59lMXGnQqPAd/mSpWu 4aWWUP4aGs0DXL5oEMSeQF6ryqQ9w319qEcTTqazJ0aMtBzRosa4H6TKx1QhDX6kIHL43oLdLbr GMb X-Received: by 2002:a05:7300:730e:b0:2be:969:75f3 with SMTP id 5a478bee46e88-2c15d492cdcmr552309eec.34.1774390238924; Tue, 24 Mar 2026 15:10:38 -0700 (PDT) Received: from lappy (108-228-232-20.lightspeed.sndgca.sbcglobal.net. [108.228.232.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2c10b14c299sm16282832eec.6.2026.03.24.15.10.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Mar 2026 15:10:38 -0700 (PDT) From: "Derek J. Clark" To: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Hans de Goede Cc: Mark Pearson , Armin Wolf , Jonathan Corbet , Rong Zhang , Kurt Borja , "Derek J . Clark" , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 5/8] platform/x86: lenovo-wmi-other: Add missing CPU tunable attributes Date: Tue, 24 Mar 2026 22:10:29 +0000 Message-ID: <20260324221032.1333636-6-derekjohn.clark@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260324221032.1333636-1-derekjohn.clark@gmail.com> References: <20260324221032.1333636-1-derekjohn.clark@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use an enum for all device ID's and CPU attribute feature ID's, add missing CPU attributes. Reviewed-by: Mark Pearson Signed-off-by: Derek J. Clark --- v4: - Align type ID defines. - Align CPU feature enum values. - remove cpu_oc_stat from Documentation. v3: - Remove cpu_oc_stat. --- .../wmi/devices/lenovo-wmi-other.rst | 9 ++ drivers/platform/x86/lenovo/wmi-capdata.h | 5 +- drivers/platform/x86/lenovo/wmi-other.c | 101 +++++++++++++++++- 3 files changed, 109 insertions(+), 6 deletions(-) diff --git a/Documentation/wmi/devices/lenovo-wmi-other.rst b/Documentation= /wmi/devices/lenovo-wmi-other.rst index 01d471156738..82c17361e749 100644 --- a/Documentation/wmi/devices/lenovo-wmi-other.rst +++ b/Documentation/wmi/devices/lenovo-wmi-other.rst @@ -68,9 +68,18 @@ Each attribute has the following properties: - type =20 The following firmware-attributes are implemented: + - cpu_temp: CPU Thermal Load Limit + - ppt_cpu_cl: CPU Cross Loading Power Limit + - ppt_pl1_apu_spl: Platform Profile Tracking APU Sustained Power Limit - ppt_pl1_spl: Platform Profile Tracking Sustained Power Limit + - ppt_pl1_spl_cl: Platform Profile Tracking Cross Loading Sustained Power= Limit + - ppt_pl1_tau: Exceed Duration for Platform Profile Tracking Sustained Po= wer Limit - ppt_pl2_sppt: Platform Profile Tracking Slow Package Power Tracking + - ppt_pl2_sppt_cl: Platform Profile Tracking Cross Loading Slow Package T= racking - ppt_pl3_fppt: Platform Profile Tracking Fast Package Power Tracking + - ppt_pl3_fppt_cl: Platform Profile Tracking Cross Loading Fast Package P= ower Tracking + - ppt_pl4_ipl: Platform Profile Trakcing Instantaneous Power Limit + - ppt_pl4_ipl_cl: Platform Profile Tracking Cross Loading Instantaneous P= ower Limit =20 LENOVO_FAN_TEST_DATA ------------------------- diff --git a/drivers/platform/x86/lenovo/wmi-capdata.h b/drivers/platform/x= 86/lenovo/wmi-capdata.h index b5b6d0305b6a..a35c6d43d946 100644 --- a/drivers/platform/x86/lenovo/wmi-capdata.h +++ b/drivers/platform/x86/lenovo/wmi-capdata.h @@ -17,7 +17,10 @@ #define LWMI_ATTR_MODE_ID_MASK GENMASK(15, 8) #define LWMI_ATTR_TYPE_ID_MASK GENMASK(7, 0) =20 -#define LWMI_DEVICE_ID_FAN 0x04 +enum lwmi_device_id { + LWMI_DEVICE_ID_CPU =3D 0x01, + LWMI_DEVICE_ID_FAN =3D 0x04, +}; =20 #define LWMI_TYPE_ID_NONE 0x00 =20 diff --git a/drivers/platform/x86/lenovo/wmi-other.c b/drivers/platform/x86= /lenovo/wmi-other.c index dd98e7f930f5..68a03b383526 100644 --- a/drivers/platform/x86/lenovo/wmi-other.c +++ b/drivers/platform/x86/lenovo/wmi-other.c @@ -55,14 +55,21 @@ =20 #define LENOVO_OTHER_MODE_GUID "DC2A8805-3A8C-41BA-A6F7-092E0089CD3B" =20 -#define LWMI_DEVICE_ID_CPU 0x01 - -#define LWMI_FEATURE_ID_CPU_SPPT 0x01 -#define LWMI_FEATURE_ID_CPU_SPL 0x02 -#define LWMI_FEATURE_ID_CPU_FPPT 0x03 +enum lwmi_feature_id_cpu { + LWMI_FEATURE_ID_CPU_SPPT =3D 0x01, + LWMI_FEATURE_ID_CPU_SPL =3D 0x02, + LWMI_FEATURE_ID_CPU_FPPT =3D 0x03, + LWMI_FEATURE_ID_CPU_TEMP =3D 0x04, + LWMI_FEATURE_ID_CPU_APU =3D 0x05, + LWMI_FEATURE_ID_CPU_CL =3D 0x06, + LWMI_FEATURE_ID_CPU_TAU =3D 0x07, + LWMI_FEATURE_ID_CPU_IPL =3D 0x09, +}; =20 #define LWMI_FEATURE_ID_FAN_RPM 0x03 =20 +#define LWMI_TYPE_ID_CROSSLOAD 0x01 + #define LWMI_FEATURE_VALUE_GET 17 #define LWMI_FEATURE_VALUE_SET 18 =20 @@ -558,18 +565,72 @@ static struct tunable_attr_01 ppt_pl1_spl =3D { .type_id =3D LWMI_TYPE_ID_NONE, }; =20 +static struct tunable_attr_01 ppt_pl1_spl_cl =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_SPL, + .type_id =3D LWMI_TYPE_ID_CROSSLOAD, +}; + static struct tunable_attr_01 ppt_pl2_sppt =3D { .device_id =3D LWMI_DEVICE_ID_CPU, .feature_id =3D LWMI_FEATURE_ID_CPU_SPPT, .type_id =3D LWMI_TYPE_ID_NONE, }; =20 +static struct tunable_attr_01 ppt_pl2_sppt_cl =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_SPPT, + .type_id =3D LWMI_TYPE_ID_CROSSLOAD, +}; + static struct tunable_attr_01 ppt_pl3_fppt =3D { .device_id =3D LWMI_DEVICE_ID_CPU, .feature_id =3D LWMI_FEATURE_ID_CPU_FPPT, .type_id =3D LWMI_TYPE_ID_NONE, }; =20 +static struct tunable_attr_01 ppt_pl3_fppt_cl =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_FPPT, + .type_id =3D LWMI_TYPE_ID_CROSSLOAD, +}; + +static struct tunable_attr_01 cpu_temp =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_TEMP, + .type_id =3D LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 ppt_pl1_apu_spl =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_APU, + .type_id =3D LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 ppt_cpu_cl =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_CL, + .type_id =3D LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 ppt_pl1_tau =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_TAU, + .type_id =3D LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 ppt_pl4_ipl =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_IPL, + .type_id =3D LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 ppt_pl4_ipl_cl =3D { + .device_id =3D LWMI_DEVICE_ID_CPU, + .feature_id =3D LWMI_FEATURE_ID_CPU_IPL, + .type_id =3D LWMI_TYPE_ID_CROSSLOAD, +}; + struct capdata01_attr_group { const struct attribute_group *attr_group; struct tunable_attr_01 *tunable_attr; @@ -795,6 +856,8 @@ static ssize_t attr_current_value_store(struct kobject = *kobj, if (value < capdata.min_value || value > capdata.max_value) return -EINVAL; =20 + args.arg0 =3D lwmi_attr_id(tunable_attr->device_id, tunable_attr->feature= _id, + tunable_attr->cv_mode_id, tunable_attr->type_id); args.arg1 =3D value; =20 ret =3D lwmi_dev_evaluate_int(priv->wdev, 0x0, LWMI_FEATURE_VALUE_SET, @@ -999,17 +1062,45 @@ static bool lwmi_attr_01_is_supported(struct tunable= _attr_01 *tunable_attr) .name =3D _fsname, .attrs =3D _attrname##_attrs \ } =20 +LWMI_ATTR_GROUP_TUNABLE_CAP01(cpu_temp, "cpu_temp", + "Set the CPU thermal load limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_cpu_cl, "ppt_cpu_cl", + "Set the CPU cross loading power limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_apu_spl, "ppt_pl1_apu_spl", + "Set the APU sustained power limit"); LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_spl, "ppt_pl1_spl", "Set the CPU sustained power limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_spl_cl, "ppt_pl1_spl_cl", + "Set the CPU cross loading sustained power limit"); LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl2_sppt, "ppt_pl2_sppt", "Set the CPU slow package power tracking limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl2_sppt_cl, "ppt_pl2_sppt_cl", + "Set the CPU cross loading slow package power tracking limit"); LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl3_fppt, "ppt_pl3_fppt", "Set the CPU fast package power tracking limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl3_fppt_cl, "ppt_pl3_fppt_cl", + "Set the CPU cross loading fast package power tracking limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_tau, "ppt_pl1_tau", + "Set the CPU sustained power limit exceed duration"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl, "ppt_pl4_ipl", + "Set the CPU instantaneous power limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl_cl, "ppt_pl4_ipl_cl", + "Set the CPU cross loading instantaneous power limit"); + =20 static struct capdata01_attr_group cd01_attr_groups[] =3D { + { &cpu_temp_attr_group, &cpu_temp }, + { &ppt_cpu_cl_attr_group, &ppt_cpu_cl }, + { &ppt_pl1_apu_spl_attr_group, &ppt_pl1_apu_spl }, { &ppt_pl1_spl_attr_group, &ppt_pl1_spl }, + { &ppt_pl1_spl_cl_attr_group, &ppt_pl1_spl_cl }, + { &ppt_pl1_tau_attr_group, &ppt_pl1_tau }, { &ppt_pl2_sppt_attr_group, &ppt_pl2_sppt }, + { &ppt_pl2_sppt_cl_attr_group, &ppt_pl2_sppt_cl }, { &ppt_pl3_fppt_attr_group, &ppt_pl3_fppt }, + { &ppt_pl3_fppt_cl_attr_group, &ppt_pl3_fppt_cl }, + { &ppt_pl4_ipl_attr_group, &ppt_pl4_ipl }, + { &ppt_pl4_ipl_cl_attr_group, &ppt_pl4_ipl_cl }, {}, }; =20 --=20 2.53.0