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Tue, 24 Mar 2026 01:28:54 -0700 From: Kartik Rajput To: , , , , , , CC: Kartik Rajput Subject: [PATCH v2] soc/tegra: pmc: Add PMC support for Tegra410 Date: Tue, 24 Mar 2026 13:58:47 +0530 Message-ID: <20260324082847.550771-1-kkartik@nvidia.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB56:EE_|IA0PR12MB8982:EE_ X-MS-Office365-Filtering-Correlation-Id: ac58ebc9-8ce1-4831-93c0-08de897f6ac2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|1800799024|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: Zf3dAu2iwVSBA9f6v1MnIdGqYL5dv6VutP8GgYSkiu6desIG4WXQpTbs4X0MayLdRlHTZj7gFC5ugXStryPPkpxrJ2QZzWp2+Z66eer+PfJOCdj2VsP6oZ/pKVXAZ8uzDIAwvAAnJt6n+hWmz1r1RrPzAvHZNjBki4aej65H/0h6xYgocDUrt68NnhQU/kk/wH2aI9yabz/XoQZmfrjMlegZKhKklAuLhW0b4ZTRZGAzcHyCY8DN1vwmCJp43UHnhKd8SGqAIDvB11HXuRZtVcOWua/FFp+wupu7V5RQbVubMcutCZBcYAiRJF646MJPDZHkoJuwFqZH3NP0J1ANk/ST+1Z07QythPQnfw6w4a48mo1OVAB5KgR/Cr+VyFpV7/iDsTNsEiJYHsTc5CmTRud9yPpJkpkcDS5iEUMUtn5slmcPjnGDURXnfWjWlgZsWMUOVPtegCbK8kWnaSw4rltPBKp6K8x+mcT1npum8RfjE2KIWsQhsXEHKFvDkaHcw4BzgNO1WM5IfuktRbFIQ8v9krXYfCViCHsWrhhIOK2kEJEuN/7g2fk4FgWusiH6vZBAczFLA90c+EmAfjSPMn4USNs/HiNJBSCOVSs0JPowME5Wp8L0SmkY2HsrYof7AqeN/xbQD3zX9HhHbB0+4tsG01hGh8QJgU5a6xG4OLxZOXcl/mEgFttbqvrBYb5aMkKu40SUTuZmxe+QEVkkmyhiPSs3/8z00g0nlVAGcyFEHn71N5/r7aIUoXa+QstutFW8k3cW2JT+eRNmib3zww== X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700016)(1800799024)(18002099003)(56012099003);DIR:OUT;SFP:1101; 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charset="utf-8" Tegra410 uses PMC driver only to retrieve system reset reason using PMC sysfs. Tegra410 uses ACPI to probe PMC, unlike device-tree boot it does not use the early initialisation sequence. Add PMC support for Tegra410, which uses the PMC driver to retrieve the system reset reason via PMC sysfs. Signed-off-by: Kartik Rajput --- Changes in v2: * Updated commit message. --- drivers/soc/tegra/pmc.c | 128 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 128 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index a1a2966512d1..f17dcfd0aeae 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -11,6 +11,7 @@ =20 #define pr_fmt(fmt) "tegra-pmc: " fmt =20 +#include #include #include #include @@ -3095,12 +3096,30 @@ static void tegra_pmc_reset_suspend_mode(void *data) pmc->suspend_mode =3D TEGRA_SUSPEND_NOT_READY; } =20 +static int tegra_pmc_acpi_probe(struct platform_device *pdev) +{ + pmc->soc =3D device_get_match_data(&pdev->dev); + pmc->dev =3D &pdev->dev; + + pmc->base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(pmc->base)) + return PTR_ERR(pmc->base); + + tegra_pmc_reset_sysfs_init(pmc); + platform_set_drvdata(pdev, pmc); + + return 0; +} + static int tegra_pmc_probe(struct platform_device *pdev) { void __iomem *base; struct resource *res; int err; =20 + if (is_acpi_node(dev_fwnode(&pdev->dev))) + return tegra_pmc_acpi_probe(pdev); + /* * Early initialisation should have configured an initial * register mapping and setup the soc data pointer. If these @@ -4615,6 +4634,108 @@ static const struct tegra_pmc_soc tegra264_pmc_soc = =3D { .max_wake_vectors =3D 4, }; =20 +static const char * const tegra410_reset_sources[] =3D { + "SYS_RESET_N", /* 0x0 */ + "CSDC_RTC_XTAL", + "VREFRO_POWER_BAD", + "FMON_32K", + "FMON_OSC", + "POD_RTC", + "POD_IO", + "POD_PLUS_IO_SPLL", + "POD_PLUS_IO_VMON", /* 0x8 */ + "POD_PLUS_SOC", + "VMON_PLUS_UV", + "VMON_PLUS_OV", + "FUSECRC_FAULT", + "OSC_FAULT", + "BPMP_BOOT_FAULT", + "SCPM_BPMP_CORE_CLK", + "SCPM_PSC_SE_CLK", /* 0x10 */ + "VMON_SOC_MIN", + "VMON_SOC_MAX", + "NVJTAG_SEL_MONITOR", + "L0_RST_REQ_N", + "NV_THERM_FAULT", + "PSC_SW", + "POD_C2C_LPI_0", + "POD_C2C_LPI_1", /* 0x18 */ + "BPMP_FMON", + "FMON_SPLL_OUT", + "L1_RST_REQ_N", + "OCP_RECOVERY", + "AO_WDT_POR", + "BPMP_WDT_POR", + "RAS_WDT_POR", + "TOP_0_WDT_POR", /* 0x20 */ + "TOP_1_WDT_POR", + "TOP_2_WDT_POR", + "PSC_WDT_POR", + "OOBHUB_WDT_POR", + "MSS_SEQ_WDT_POR", + "SW_MAIN", + "L0L1_RST_OUT_N", + "HSM", /* 0x28 */ + "CSITE_SW", + "AO_WDT_DBG", + "BPMP_WDT_DBG", + "RAS_WDT_DBG", + "TOP_0_WDT_DBG", + "TOP_1_WDT_DBG", + "TOP_2_WDT_DBG", + "PSC_WDT_DBG", /* 0x30 */ + "TSC_0_WDT_DBG", + "TSC_1_WDT_DBG", + "OOBHUB_WDT_DBG", + "MSS_SEQ_WDT_DBG", + "L2_RST_REQ_N", + "L2_RST_OUT_N", + "SC7" +}; + +static const struct tegra_pmc_regs tegra410_pmc_regs =3D { + .rst_status =3D 0x8, + .rst_source_shift =3D 0x2, + .rst_source_mask =3D 0xfc, + .rst_level_shift =3D 0x0, + .rst_level_mask =3D 0x3, +}; + +static const struct tegra_pmc_soc tegra410_pmc_soc =3D { + .supports_core_domain =3D false, + .num_powergates =3D 0, + .powergates =3D NULL, + .num_cpu_powergates =3D 0, + .cpu_powergates =3D NULL, + .has_tsense_reset =3D false, + .has_gpu_clamps =3D false, + .needs_mbist_war =3D false, + .has_impl_33v_pwr =3D false, + .maybe_tz_only =3D false, + .num_io_pads =3D 0, + .io_pads =3D NULL, + .num_pin_descs =3D 0, + .pin_descs =3D NULL, + .regs =3D &tegra410_pmc_regs, + .init =3D NULL, + .setup_irq_polarity =3D NULL, + .set_wake_filters =3D NULL, + .irq_set_wake =3D NULL, + .irq_set_type =3D NULL, + .reset_sources =3D tegra410_reset_sources, + .num_reset_sources =3D ARRAY_SIZE(tegra410_reset_sources), + .reset_levels =3D tegra186_reset_levels, + .num_reset_levels =3D ARRAY_SIZE(tegra186_reset_levels), + .num_wake_events =3D 0, + .wake_events =3D NULL, + .max_wake_events =3D 0, + .max_wake_vectors =3D 0, + .pmc_clks_data =3D NULL, + .num_pmc_clks =3D 0, + .has_blink_output =3D false, + .has_single_mmio_aperture =3D false, +}; + static const struct of_device_id tegra_pmc_match[] =3D { { .compatible =3D "nvidia,tegra264-pmc", .data =3D &tegra264_pmc_soc }, { .compatible =3D "nvidia,tegra234-pmc", .data =3D &tegra234_pmc_soc }, @@ -4629,6 +4750,12 @@ static const struct of_device_id tegra_pmc_match[] = =3D { { } }; =20 +static const struct acpi_device_id tegra_pmc_acpi_match[] =3D { + { .id =3D "NVDA2016", .driver_data =3D (kernel_ulong_t)&tegra410_pmc_soc = }, + { } +}; +MODULE_DEVICE_TABLE(acpi, tegra_pmc_acpi_match); + static void tegra_pmc_sync_state(struct device *dev) { struct device_node *np, *child; @@ -4679,6 +4806,7 @@ static struct platform_driver tegra_pmc_driver =3D { .name =3D "tegra-pmc", .suppress_bind_attrs =3D true, .of_match_table =3D tegra_pmc_match, + .acpi_match_table =3D tegra_pmc_acpi_match, #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) .pm =3D &tegra_pmc_pm_ops, #endif --=20 2.43.0