From nobody Fri Apr 3 16:05:01 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 953DF1A6830; Tue, 24 Mar 2026 03:26:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774322797; cv=none; b=t+JrQYiudBQglNe0bfZz1efh0OuPZSebLBLkl5ePoYGdbkU+unosKA1kZMhP5LCPk7ZIwrNKPpxvx0W6cuBanuVLcG8l3VWGI0rVzkDRME/tmG3LudJNwLBzqV6HrCxCR3+l3QEA3w1r0INo27hkdTX4qKAu9Vzuogq8bK2t6OI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774322797; c=relaxed/simple; bh=1fbBx/MVVzzlRqk3iFpmxdUPyKrrAdMfveqckFM3W/c=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YYtpD8frmUgt5+Dwj06A1N0l/Zaj9ZEYTx82KGC0g4xx6VbfxqkOXt83huYFVkv7ltd+ayluOuR1IlwDFlt6ka3Jc/h64NpGrVH0gww7f/a7NnUx4RA0FTCkjNjxdzzZzpj4wZh7MaV4bxoKpd0Yr5tGOg8pS/iOOWY1vyvspkQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=FfCpYM5u; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="FfCpYM5u" X-UUID: 403c7bb2273111f1a02d4725871ece0b-20260324 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=sULUjpLWZ7wVszRxwC8FpqlNzXJ4qE9Ukq/gh4VHajw=; b=FfCpYM5ukpd/BeFhMg0+IuO+AYPR/yck0/HQozO9UnjfI+oCJ2dT87Y4VONvyYUe1Y8X2iWAR2wqE/eUEPgjO8aRmhQOrzxGNkpTS6fITW2o2n+7Zqcim+HczJoRNjcgzp43TzjQzV4rvCikTP4ew394dTPAImqkEhlgKlWI4gE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.12,REQID:68953e0d-a66c-4dbb-8444-4d2f4947bbcd,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:e7bac3a,CLOUDID:25f19e8e-6df4-4a3d-a7a4-fbdc42d669ce,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 403c7bb2273111f1a02d4725871ece0b-20260324 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 704520484; Tue, 24 Mar 2026 11:26:30 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Tue, 24 Mar 2026 11:26:29 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Tue, 24 Mar 2026 11:26:29 +0800 From: Meiker Gao To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno CC: Bayi Cheng , , , , , , , , , , Meiker Gao Subject: [PATCH 1/2] dt-bindings: spi: Fix clock-names definition Date: Tue, 24 Mar 2026 11:26:17 +0800 Message-ID: <20260324032624.1708029-2-ot_meiker.gao@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260324032624.1708029-1-ot_meiker.gao@mediatek.com> References: <20260324032624.1708029-1-ot_meiker.gao@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the device tree binding for the Mediatek MT8196 NOR controller to require that the 'clock-names' property contains exactly six entries, in the strict order: "spi", "sf", "axi", "axi_s", "bclk", "27m". Signed-off-by: Meiker Gao Change-Id: I0542d6d726f1af34ef76c1a58ba4e4b02ec45fe6 --- .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yam= l b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml index a453996c13f2..f605a36e753c 100644 --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml @@ -56,6 +56,10 @@ properties: design, so this is optional. - description: clock used for controller axi slave bus. this depends on hardware design, so it is optional. + - description: clock used for bclk. + this depends on hardware design, so it is optional. + - description: clock used for 27m. + this depends on hardware design, so it is optional. =20 clock-names: minItems: 2 @@ -64,6 +68,8 @@ properties: - const: sf - const: axi - const: axi_s + - const: bclk + - const: 27m =20 required: - compatible --=20 2.45.2 From nobody Fri Apr 3 16:05:01 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 51BD2399009; Tue, 24 Mar 2026 03:26:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774322800; cv=none; b=jgYNLrsscqaZDSBVynHuxmJAMjFbpM4pruiXRN/okkCJpKohww44sfcYWqtwNIPYQrPFJTBPnhronKdqNnXubyV37K6vZdmdQdvMxaeh2sdoxFQfaLw4iKNqawBvy56dOdoJwP2YA5aY5vQR1V3WkvwqtNVbkIoq/6iCGpA0is4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774322800; c=relaxed/simple; bh=RgazcpxgNV6UefChTRA7FT3xj6F0R4EVVWYK5UXURoE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=SpxSU8bbMJ90z/iwqcjhoZPhJ5XipMFCFAcmgsPd658HbJZ2Zswlnck8NOvxExk7DdxoL4K7mEEtXXuo5BPiYTYzVZleQQ7OykIRA0Ar5TSb2tunjtvHH63yDPMco1lGdVYFfWlljRG3PXeyU+26JXufTj5vCvVzmUL9T16ZjFc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=scr16/UR; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="scr16/UR" X-UUID: 412c8850273111f1a02d4725871ece0b-20260324 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=AxNLCKQ9ddz7+TDTiXJxhPHv6/rZ1vPdRVALXT4wAJk=; b=scr16/URaN+UQdkWCxUWsOAFaif1VrryuADEkNyEgDve8NjrHBrImhdNJ9DJEvOyFtnmBz8X//WFuVh+YlU/9muLi6OgRbhx3KVRGgwy1e9LxMevGyUqWhYAdGC/7LWZrPnUFTH9SPA7eElTAG+1CozpqyTkgZ5TJK81f6+UUjg=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.12,REQID:c7c38461-0367-4be8-b477-fbcddeec44b2,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:e7bac3a,CLOUDID:f3dd0ed5-060f-4ecc-9ee0-121eeeb4a682,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 412c8850273111f1a02d4725871ece0b-20260324 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1414971507; Tue, 24 Mar 2026 11:26:32 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS09N2.mediatek.inc (172.21.101.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Tue, 24 Mar 2026 11:26:31 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Tue, 24 Mar 2026 11:26:31 +0800 From: Meiker Gao To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno CC: Bayi Cheng , , , , , , , , , , Meiker Gao Subject: [PATCH 2/2] [v3] spi: spi-mtk-nor: Modify and optimization the SNFC. Date: Tue, 24 Mar 2026 11:26:18 +0800 Message-ID: <20260324032624.1708029-3-ot_meiker.gao@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260324032624.1708029-1-ot_meiker.gao@mediatek.com> References: <20260324032624.1708029-1-ot_meiker.gao@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Changes in v3: -this patch is a further optimization for version v2. Changes in v2: -Use clk_bulk_xxx related functions to enable/disable clocks. Changes in v1: -Add new function mtk_nor_parse_clk() to parse nor clock parameters. Signed-off-by: Meiker Gao Change-Id: Ifa13f9f08aebf6feb376ca98b0fd69f379037ff3 --- drivers/spi/spi-mtk-nor.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c index 702339a6c817..6d24932053e5 100644 --- a/drivers/spi/spi-mtk-nor.c +++ b/drivers/spi/spi-mtk-nor.c @@ -100,7 +100,6 @@ =20 #define CLK_TO_US(sp, clkcnt) DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000) =20 -#define MAX_CLOCK_CNT 6 =20 struct mtk_nor_caps { u8 dma_bits; @@ -119,8 +118,8 @@ struct mtk_nor { void __iomem *base; u8 *buffer; dma_addr_t buffer_dma; - struct clk_bulk_data clocks[MAX_CLOCK_CNT]; - int clock_cnt; + struct clk_bulk_data *clocks; + u8 clock_cnt; unsigned int spi_freq; bool wbuf_en; bool has_irq; @@ -733,19 +732,16 @@ static int mtk_nor_enable_clk(struct mtk_nor *sp) static int mtk_nor_parse_clk(struct device *dev, struct mtk_nor *sp) { struct device_node *np =3D dev->of_node; - int ret; const char *name; - int cnt,i; + int cnt,i,ret; =20 cnt =3D of_property_count_strings(np, "clock-names"); if (!cnt || (cnt =3D=3D -EINVAL)) { dev_err(dev, "Unable to find clocks\n"); - ret =3D -EINVAL; - goto out; + return -EINVAL; } else if (cnt < 0) { dev_err(dev, "Count clock strings failed, err %d\n", cnt); - ret =3D cnt; - goto out; + return cnt; } =20 sp->clock_cnt =3D cnt; @@ -760,9 +756,10 @@ static int mtk_nor_parse_clk(struct device *dev, struc= t mtk_nor *sp) } =20 ret =3D devm_clk_bulk_get(dev, sp->clock_cnt, sp->clocks); + if (ret) + return ret; =20 -out: - return ret; + return 0; } =20 static void mtk_nor_init(struct mtk_nor *sp) --=20 2.45.2