From nobody Fri Apr 3 17:50:41 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6F1E7081A for ; Tue, 24 Mar 2026 00:10:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311060; cv=none; b=gpFRwsCG1JA5KgDrJgmNWL+X3W4mQe19i7gDd9GxawXGSGc5w4VhpALHxCGMsaofMOkDt6T7L40WyWCZB4qsOWSZwmr+8R8dA5H3REDdugs7RuESnVmgK4AX7Mzy7HQSBYnglsNSqiYITZ5iL8FsBfA193v8JC0plWGR4YfoLqA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311060; c=relaxed/simple; bh=ve60Hat4fjDGd6a0MMY2a+1ZxOsOvrbkOAK4ZWhT+wM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RVQoPEqzG0wZLuJQLteFjwOZ47ZfvGWQ0OqO2zfrMK2mwW3HbiS+vqITHK3tNwVuJl7MkRrwBFttwAbn39RvXCrO+q4I3CxFbVOpVhcGT/uASDtDdKJxgZT6znMqu7xdV11t6SajbBmIRbF7CEbpUgqlX6Nrm6qzzPXV92xMS7E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=TXIl4gjM; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=SwUbG/Tf; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="TXIl4gjM"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="SwUbG/Tf" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NHqu1m618693 for ; Tue, 24 Mar 2026 00:10:58 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= CsLnVUkiBBNLZ7fR/kaHQdxLUTQ7WZot6+FHpylt1ow=; b=TXIl4gjMgU3py3l7 mEwMztvdpvvfSzamSKkNm5FydLFJtIvB6faC/2WC8fZ5wQ3+ztU+onfogHfmEf6G cpenWMEG2DTKSOVm3wrfcsgrzBcgfvG203mRk+YLXTGTxO4U6BEFpxW6PZb6TsTU XcLvHq9ba5p1M2JcH3aK0RhlRoTjOVJxa7/851G37XRGfjFxmvVheUwSUu9fn1/t SVLqjePbN3FAYFRG4U9Ykso/QAZWAUJmEfqUrj/fUU+0EnXfGe0shvKux83mSZv9 Tc87rSxUDAm+42kCSshgejRdag5hwoX85zQzLfPvt8o8xzCr6LKreHnzaM+LWr90 +y8uKQ== Received: from mail-qt1-f198.google.com (mail-qt1-f198.google.com [209.85.160.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d31jgk7te-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:10:58 +0000 (GMT) Received: by mail-qt1-f198.google.com with SMTP id d75a77b69052e-50b31cff27fso8221751cf.3 for ; Mon, 23 Mar 2026 17:10:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311057; x=1774915857; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=CsLnVUkiBBNLZ7fR/kaHQdxLUTQ7WZot6+FHpylt1ow=; b=SwUbG/TfL/rskNEj05GlSNOkC9CghsNeNvLKW5XONq1W2fHGY6tPqdgXIM6TS3V4QP kergu8TeNNn44xQ5zoePaYs1bm/u/UZnTfvP3Xud7QPRfWrBfGaMPBYPOJFQulDQbS8W r61ocsHO8lEh8Mc/1FgWhdNloE+3dxHjBZN0bF4oPvsT81sVJVIn6tuobUcwxXofMV0O s60bLoP5XwRoplWkhkDjNkj8dnFwDlahCCu353P0BVQsOhxEhoSFqf/V9oMt9lrVb88v iV9W3Zc7OZhIA85vyad02gFi1J6QlYiNCT30IkKU/2OAkAk8jjYRiFF30vwTGjNwrj9u P6JQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311057; x=1774915857; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=CsLnVUkiBBNLZ7fR/kaHQdxLUTQ7WZot6+FHpylt1ow=; b=Hwqr7q9oFEhtwB/6FxxFSWxwSi5TZLYaht8TKDJWO1b+GnvcT9MC1GCcx/fRv3rUhk Ovd475lDI06k6MOXjpvlMmDuI4yErsP+kESKVmuz7LLwkPjxY5oIHSGExBW4DPu0tUQY oIvTJVheE/geUO2CQ9aIB7AAMB9QHJ4VoScEtLBlBRGzzWBHt9F8V6LI9wNI07yzCYvM h2JbJFbZEa44j+tG8ODBjDZZcUzqF5jbtaNVyKoBeQf8EPlY98k6pJj80wwzm49FHOFY pyclnJfkKpFuvyeOP1bShWFcC2BQcb9Fs+N2jDhdTbmAHWUMGdVxjC/U9s5BjcdfuHnM LnWQ== X-Forwarded-Encrypted: i=1; AJvYcCVnosIX5jdENbkt6MVJqaUVyrLTFM8MPmqAFlNoA/2X9p7WsuFGR4OVyFr6MstmuDcsLXV7xuWSFyNP0nE=@vger.kernel.org X-Gm-Message-State: AOJu0YwmuszfRg0p/88ODNJ+emHOokQLtZgL8y4tbf9/NzkNwl3zxVM0 CAySksU9i4a9o05rTLG8fNw8JJWuFJrGmx84+2G7hH2OwlT5+TqxWiWAcpRPOaNruPS4AAQurLm bUThrfKpNkijPRHoGs8RYkYZ3wNZwe3tvflXTh/WpMkvLDF+/hjT00xYniOFvhcpDYus= X-Gm-Gg: ATEYQzx6lAtXcoSNN30S/6Vd4uxzuDBtn7zeQrn5OCXzUvYNAtKcRZae0hdcPtTN+5h pk/hbhziYu1W/9c91IYLmq+7MGpnO4g4Hni1bMk+AKUm5tXyNTVKLxrJupgTePtCVYit7vgWY1v +WJ13Bidq22kzSTMLofqaTc68IxklVOBElfqgPO6FK41x0d08eOLQBCUzB2twWAX/XJpaJLffIi 47iQDAI8mTomCjBdFIC9TvPIDUVL0Tah1uYtDJykiOx7P/vw7Qk6SxNpX8COdE5urt3b3jg30ml Xae9lu5KYrHMlDnYh7Vj9vQssl5x0E/0jsmEZ9hNNu87Rlzyvz/67hKVBSwpa77OLMJ/Emnyfy1 d8l1wZQhPb7qMsH9VkV8wKdOMvxMPhKADxxSbDJ60TIcisFfM2BndL1DZ7sjwuorn9wI8Fj9hsQ SNIxl3scxFgtgtxgGHDYnCoz/zlb9M5iGX5UE= X-Received: by 2002:ac8:580a:0:b0:50b:3ff3:f489 with SMTP id d75a77b69052e-50b3ff3f5ddmr204223801cf.34.1774311057241; Mon, 23 Mar 2026 17:10:57 -0700 (PDT) X-Received: by 2002:ac8:580a:0:b0:50b:3ff3:f489 with SMTP id d75a77b69052e-50b3ff3f5ddmr204223451cf.34.1774311056745; Mon, 23 Mar 2026 17:10:56 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.10.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:10:55 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:37 +0200 Subject: [PATCH v2 1/9] dt-bindings: interconnect: qcom,msm8974: drop bus clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-1-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1735; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=ve60Hat4fjDGd6a0MMY2a+1ZxOsOvrbkOAK4ZWhT+wM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpwdaGRap0iSPvKR6JSr/xjyzH+jJGmbWjfWsVS dwH+EadxRmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCacHWhgAKCRCLPIo+Aiko 1QaNB/4/5/jNDRGwUjDlVM8PaEGhw9u3STuu1Pq+JLvRYT/EPsUyKnqKARk4oBruWFwvlpDWVFf 82cqfnQEtgdGgVKCcA1fd7UWkIy6Ts3+u7YXN7iR1v60kD5wqMVMWiu+vAmA+6i2qYs4WRJ8LGn pWUhM9GfyBehiB8zibsSh163wb1I/j7xV8IzdDVm+qHW/4oFxYSCJNxO0wlSkNFoV+AIQnt+Ex1 rIm9r+EbgtnAk8pIcmQlbGlv+ar0sc8M6/q4yOY75dG0NJrnrErGMSu3gOfIhUycYfPnSth8Ukp r0wZi3T5LYi7/7U5gRD5TiF604+lRiFiJEE0kBO1sSr7eapD X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: YsnYwbc7zlqquLFLf-inzP49QzTfQV9c X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfX1pvGCKM30mbF BRfXoq5mqwEWBSWDSbDJHady9/k4YMNBu069hYE3Y4TAWEs6/Lcp2GIg999mg29T46Yca7kvQS+ Q9VcRq0Kgoxq6InwnJEdA6PjIkvRXv6ePMlG+cDSaj0V1XXNbnN/LrSOeaqv6oN+qPm9rfJ5IG8 R0w0Gyj018DpB5Ll/BIDv/FJkDXC17EtPLDmrBMtlc01rD0KUlLYJX7B2iIC5C0ZL9jeup77xbk yLczXVqwbJj6g/Q7fzeFtOodl3izg0ZNhk8VZnBDQS/LtVdprZdzTVj+EEX9ciZCExvGx4Iny9O LJbjWTgo7WpHtgLeHutm0E956ES+EOyqV7XpUUdi5pcMqTlXoZU8CcdaWljPgflfajZAtZidgzO 5BYr1ey7j5Eh1x9eiU0wX9muPrten8v92RXqyd5KX0faEf+w0IEUfyrhgyy9T+PLl+p1680YVyw 6irAUk8UYxE8A/SOxfg== X-Authority-Analysis: v=2.4 cv=CMInnBrD c=1 sm=1 tr=0 ts=69c1d692 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=xO2zaiYFPJaqVjnw6b0A:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-ORIG-GUID: YsnYwbc7zlqquLFLf-inzP49QzTfQV9c X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 malwarescore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 phishscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 Remove the wrong internal RPM bus clock representation that we've been carrying for years. They are an internal part of the interconnect fabric. They are not exported by any device and are not supposed to be used. Signed-off-by: Dmitry Baryshkov Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- .../bindings/interconnect/qcom,msm8974.yaml | 21 ++++++++++++++---= ---- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8974.ya= ml b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml index 95ce25ce1f7d..89a694501d8c 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml @@ -32,22 +32,32 @@ properties: clock-names: items: - const: bus - - const: bus_a =20 clocks: items: - description: Bus Clock - - description: Bus A Clock =20 required: - compatible - reg - '#interconnect-cells' - - clock-names - - clocks =20 additionalProperties: false =20 +allOf: + - if: + properties: + compatible: + const: qcom,msm8974-mmssnoc + then: + required: + - clocks + - clock-names + else: + properties: + clocks: false + clock-names: false + examples: - | #include @@ -56,7 +66,4 @@ examples: reg =3D <0xfc380000 0x6a000>; compatible =3D "qcom,msm8974-bimc"; #interconnect-cells =3D <1>; - clock-names =3D "bus", "bus_a"; - clocks =3D <&rpmcc RPM_SMD_BIMC_CLK>, - <&rpmcc RPM_SMD_BIMC_A_CLK>; }; --=20 2.47.3 From nobody Fri Apr 3 17:50:41 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AFF26156677 for ; Tue, 24 Mar 2026 00:11:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311063; cv=none; b=Wja2yXy5xYjTkOhmCHS0SOHwjya87RSQAXGiDuR11kT43q/uWkAhp+rZ6PYXu+nP7Mm5gtRPeKEJyBeGQ7nJMWyuSvq9oWgRwOHzIe5tbY5LAE7swhGZzZCWv1ZMYb8TzsvoL8eGRSDd1Vsrw996JjZozKy4VlnfMgIq0w1dlGU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311063; c=relaxed/simple; bh=yVthNPm3DjOsdKVYIVqko1MZL9hhEvKfRIuyqdTPA9I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mLWBcOX76Bm4+F0k+/mqcSRm9skAS9VS1magTspAZTY6qVn4nK7FQqojoCJVfosjf4X/jL5PqHEMsKx5tkeJnvmi/w2b31BJTNRDC1Z2aZraXw54Ta7hTq0EzMacJ85HQ3rUygjdJDqpSRNsI/WsMNz6pqqRe/S2CIszvSHmCLA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=LvCZIZhg; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=E52EFUtq; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="LvCZIZhg"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="E52EFUtq" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NHqiix2681190 for ; Tue, 24 Mar 2026 00:11:01 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= hhwgxNDk8Z3SvSduo334zellR1VN2y2e+x1xd/K7O78=; b=LvCZIZhggnhmaqOm 3vol9ed7M89SX2dADkVSkgrrXQnZz88d4fXjwaQbZxuihlxWw0WYM6SuiALIkiI7 lvKBLCY3eg3Q6Q9q8nya84TBdwuYas/FHXKJBji2VuxekDduKaUFoETzYTwSgctc i88h2bgLW9Dl1e4GKCdlXCfxdiTB72aiJ8jzV7U6qDqAocRXW9sGtKWVrjHolqbp vK/k2Z/wkBHrOOvgtYnVtnU1Ht9r7+gWB7hap2c+/BBqlmihVcCfNL8cS0Wz+as8 NpY9It7R8KJ0p6KhUEy3uXgUcvSOG8wG7EYk9c4VIF3X3g2tfMG6XG/Dqtns0HU4 zKPcjg== Received: from mail-qt1-f198.google.com (mail-qt1-f198.google.com [209.85.160.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d31p7b6dy-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:11:01 +0000 (GMT) Received: by mail-qt1-f198.google.com with SMTP id d75a77b69052e-50b6f869676so19226921cf.2 for ; Mon, 23 Mar 2026 17:11:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311061; x=1774915861; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hhwgxNDk8Z3SvSduo334zellR1VN2y2e+x1xd/K7O78=; b=E52EFUtqZjSp2A3rmTEp46oHV2ZMYobCPQEaTpG4gHURIM9RjCqpBz77hmhTFEv2UY /QnBT76YVU5ZkI5L+vEFzZ54gAnrw01SbGos4BkZZiNUg8Z1P55ppOC81fpTlclUowil Efy4jtHPt+me99bKe+TKTT6fQIZWrrnzUdNHKsJeRAiF+b6FExIp4KcdBuPsAdL3Imnj ITQq+//WUqrO0rHcHiOBAgOIgu4w76Jae6slO767diQ5sUZRnu/TX+wLbbLj70sDVvOj Cofr8c1gk0XA7Wd2mVHYXUxP3UZjtfN4ui7GtOY/CbPj9KSkZhOgbxncIRAoMvypsdJn D+Ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311061; x=1774915861; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=hhwgxNDk8Z3SvSduo334zellR1VN2y2e+x1xd/K7O78=; b=gQzmNCMbUUHP8J+G4Skeyo2+sWjxaCJaYuWGwq5FZHKEy8gB2Zpxvjd8k7CXRu9RpE xpK59S3isH0+2HtT1Lyb+Z3ddPlJVJ+/BosF1rJ/h+0ghvbnlSDVF7uBLCi9XdzrU4gb N+0mQtMpRAjMow6krwnpq2duZtrl563Dw5B7XppGdNzPsQSHdidBlGIVJuRXm5P4kQc3 ZwZJ+b2u3xzkmLDZalsDmi2FuGoegvfPSPJKG7QKw3xI6nlbqHbCt+QT1cvskoJq1z+V a+a/7sBKtQ1MLenHEAOpAz6nwmsfwdK210CDBOrcEbixeaJ7fpbSdLx4Z01OImdkyVB9 1SBw== X-Forwarded-Encrypted: i=1; AJvYcCVkcFxkgBuIrSbo2dONm26IG+4AVYhU6hNsAoVcADlPXsKnUv7xcaTKtE51e41Ze0ltz+cm03MqQfTb55k=@vger.kernel.org X-Gm-Message-State: AOJu0YyxS28WNpKgT6gO9n1JuU7uZHNmnNZ+kHWcQ4MRgkFSEJ71+J4z SYyt6b53Fl5UVyAC90IJCHsICPI+9lZAB9yMI/zLSNWJSIkJJ54/lQ0IhkytQ0TOuAbO4zuLSVS /9A/QsOWUdnLE292tJBF5x2CHjmQdTYl1er7zk3cnYGboZv3AQGj4/kQumW6nzGWPHT8= X-Gm-Gg: ATEYQzxm8yeC6/B39opsx92tF/9WHySjOfN4BmVkrt5SUPQVGJFqfAkpl9/M2E4Bhto rku3CFllevf7lVof+GhUNm/wU/1xljgv10J88XzRRfV5Iuc3GsTea5Xo4JsSnyJXJA0UxQnzaO/ p3AsRwrM+DuSOsu5RXBBtVhd5R0xP/8FrrrpkPK1/fgX0DrGzNC/c7xL500yJW2PYQnfjU6iKjJ GJUWEWYMauZl9Rxjl1U6vSJjOopqoXLAyb5pDE1owbaEud4ZCjtItUOwb7fDxM0CEakMSzQUCab o875hrrgka4+PXS1OLaQSiHQaxN/kvSEH3FDS1rZ5u2hmFMgHTP16rj3F+rH9k7bzyp3HgoO0CE 6L8FQq1/3oANmAhAVLyGIbnYIIMynpGOPEf0eLCi0FsRRHdLindOJWXio1V0GC5GmIjtqZQmcel DYEIdEinDDzFcXrXmo40z6K+TQMvMrLPmtOAs= X-Received: by 2002:a05:622a:1450:b0:501:3b93:bb37 with SMTP id d75a77b69052e-50b3753b6a3mr213724911cf.39.1774311061101; Mon, 23 Mar 2026 17:11:01 -0700 (PDT) X-Received: by 2002:a05:622a:1450:b0:501:3b93:bb37 with SMTP id d75a77b69052e-50b3753b6a3mr213724641cf.39.1774311060686; Mon, 23 Mar 2026 17:11:00 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.10.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:10:58 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:38 +0200 Subject: [PATCH v2 2/9] dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-common Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-2-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1211; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=yVthNPm3DjOsdKVYIVqko1MZL9hhEvKfRIuyqdTPA9I=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpwdaGm6tKbN/QjmKWueJ3FdR4wKXZ15RBvv8Tf 7pGjkdBhI+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCacHWhgAKCRCLPIo+Aiko 1Rm6B/45NBZzSff6ONSMtyDvDUOEj+cTeJXB48EL/w+crDAX6/nsVQCovh0//B8Qv+7OM9hXf6i lwSacIrnxswnpOJeY5s7c1Ato50PCQiJhmbs0gu/rLLrwMHXCA65BndO8Ta08PLTaUlQFRa4wvp if34r4qhJWfrK+ABKB8R9FLY2LLMIjFF/3IzdmDhlPyPeBCM9oHpJ4320PPMJ8BAJIq1Z9DLxdI w1eVL3GyUBV+1VCJPnKuG8pBhQvpCxJLejVojKFYl96eURN8ooLe4+rJ3C/NOEZ+jzKICCVXifI QaEClwX6W2WieVUeItA2OiARZ6uAse4opLAWiinLASDrb5de X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=RMC+3oi+ c=1 sm=1 tr=0 ts=69c1d695 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=wtXhX3L6yvnwcyBavz0A:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-ORIG-GUID: ueXJkblN1wwmFVKtKEc4LNXtLfkz8dpv X-Proofpoint-GUID: ueXJkblN1wwmFVKtKEc4LNXtLfkz8dpv X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfX5mQ/OKQ0S8i+ jSR2uPbFXyjn5EUxer/0z2I41xflSPebAcE5U+X8bCONjYUljr68c7QljuFENVwigkHzm5MtFr1 iOHbuwb42FegclTfyiY9zDi6UYMSqBtlNju1Ig1bCpU0nf6yaQtdrGtgt9Uuj/z3KJaiBl+e9xQ EHzmeGLH8OcUu6LzMWfiNpFLnBFKoT4egXdOkQLDoS/mMU0yqgQssy9Tj0/VjII1A13g21QCqTY +6hW4W02RrZFrhz4Ey2fkBQEyU4/AB3teokRtQ3miM8+nSq4v1nyJfQk1PyJYMXvWiDvyuha70u WiugZzq5LY5pYDXzdd+eK+wp5fzrhvajPomrsXVXQZ3SjItYWkHGNd7LfoI33TDybApnSR1Xw+v 8HSPuHnjWvT08mFlUn+UilFRhDj4cRHiAcoYSrzaw4OwNq1MmjlRdkpSU4lSMqdBXU1/BxCYhHY 0UgBzDQ2/1EpqcQjWiw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 phishscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 spamscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 Use qcom,rpm-common schema to declare interconnects property instead describing it again. In future this will allow the platform to switch to the two-cell interconnects, adding the tag to the specification. Signed-off-by: Dmitry Baryshkov Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml | 7 ++---= -- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8974.ya= ml b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml index 89a694501d8c..b35f6dd11c71 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml @@ -26,9 +26,6 @@ properties: - qcom,msm8974-pnoc - qcom,msm8974-snoc =20 - '#interconnect-cells': - const: 1 - clock-names: items: - const: bus @@ -40,11 +37,11 @@ properties: required: - compatible - reg - - '#interconnect-cells' =20 -additionalProperties: false +unevaluatedProperties: false =20 allOf: + - $ref: qcom,rpm-common.yaml# - if: properties: compatible: --=20 2.47.3 From nobody Fri Apr 3 17:50:41 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A39D519D065 for ; Tue, 24 Mar 2026 00:11:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311067; cv=none; b=Yw//ShZLAdnPf6TlDVptjReOdZ3h7lPD9lAybRkgtwQLwOp6o1lGfE7+SKvjxK73hWNVeRm7HXoO+qasrMsLNuTUFgZlvwI2OcDzczmwAzBN6d3InkZCU+9nOtGfKN/REmEuc9xEJj8nKiRn8YUM1r+DvVOyEZksRPyd70Av9vI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311067; c=relaxed/simple; bh=yWGYHMvMuQOoFgMW09hmb437wfgDJSFA0so4gDay7xI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Dq0VrYFSkGls5siMUrVMjX03RU8Y5K5ogehD6deDivaTX8l16kMLFDgvfeigczXfAaHAK0/tYYl8tPiAwR42/m+LFDfj5nHq4cFOF8r9ulXu4Rs8mYcVsLRhk6NwrDYVqAu+Gy3U4unuA2Ur1EBxr3Cl6UYs6A3LASfFzqd5iV8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ZdylqIVr; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=CX3vENIC; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ZdylqIVr"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="CX3vENIC" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NHqv5G618719 for ; Tue, 24 Mar 2026 00:11:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= WgxylbfbI/Yb32tDq9tOK0ZiL/pL/XntVxHahWXIwAc=; b=ZdylqIVrRNxYRz26 hafDO07Uaae4shkVr+AdA6eryoDi3hN4bwaA65TW8IajnWC/4hhkGCBgZoDxryEa e+YhMyjBkDlX9zaEn54nbMCoEBhiWcDO+ya8lxkCH7hmfhGafpaex8SN+eOk3CgZ Z7rKy7ZqRuQu6JXZyfBisNaX2CAOr5b6yR1rXhreCKzOS2xmf4iRrBC14XEFydmL Ma6oj8JFmoErFWa3ph3dFR5N4i6j0EODsSFVZpTmELLPqrXz2VFbEvmujFhRhTzB aENDtLIrV+Mthuq84lFhFMB2ICCIL7JTS9DG7lsaCXbRU7G7vfo+QETURxxb2vmZ g557xA== Received: from mail-qt1-f198.google.com (mail-qt1-f198.google.com [209.85.160.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d31jgk7tx-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:11:05 +0000 (GMT) Received: by mail-qt1-f198.google.com with SMTP id d75a77b69052e-50b4987c698so250064761cf.0 for ; Mon, 23 Mar 2026 17:11:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311064; x=1774915864; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=WgxylbfbI/Yb32tDq9tOK0ZiL/pL/XntVxHahWXIwAc=; b=CX3vENICMh2V2iy871ozGy+WIdGR/60QaktIyWAk1Fl96+eKB8eL8+x6k26TVOIHu5 /pI/GLO8IntGCa7gy2E5JU72gnjpEo1mX4kULAyFhtuE2Mw3DPmpAbLr3IOXUKoYyzku /YMUkolhHmQyRvgmx7ZTPahE6QuHRD9VL41SI8LqNvxj8gcKWGy7aFNbcFy8su8iABz5 q8Ato5WeX+4DiEZG00keXBVK9dlHQ+35judD/HSq6iSfOO/5QK5kbBLOw8j/EqHr7IdF sHioxsrg2N202bTpG8JDyUo2jBIFKNERjSD9uzCaBQhwve0eE9oiQfcuPbDlrSoRKChq Bguw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311064; x=1774915864; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=WgxylbfbI/Yb32tDq9tOK0ZiL/pL/XntVxHahWXIwAc=; b=DjrEFoagNkhub7HaiLEUdglxe0EetuoLJsJy9W5F56SP3CfhcV8oY8qrdBX5aE6zqy 0up5rAZ/Jfs1XGxZdggTsJn1NznMNpEXQV0hR3AwDg88IAFjhBHa8qMG6lcbfyetLHOR hyMQXRDHJeGHDPePcEi+cYVpY6RZigBF4qZnGbXCrIRdO6kId7Y6vNbYDe5g513oIXpv buZC3D3BlYPLwZDIh0BF0eAx0LShcnD9urZAp5N0Szd0q7ddYARFLZqW2fzk2rEEv/nJ tK2pUZCW3DvT/obdR9VjsKRfPLQGGj5vkKhRfj7jK9cn7g7USbuMebz3rgVQ3oBEw/nk XgZQ== X-Forwarded-Encrypted: i=1; AJvYcCVc5FrPHu/CpcP1SIWFNJpHSxJptrXb2esIzh90/5cRtvr6Z6qU0FIhggM73GgQVWYwg4OC5sZKtBb+eVg=@vger.kernel.org X-Gm-Message-State: AOJu0YzbNWRGoOfHmvvf68m87aKE7gpNvWrcTpepeQnOXeblG0rG5HLL o44br9pf+7jlIYnBWKVnsa9wouMxZcxExXgLPFyFDVVLuVBc37O09S3cJSV7RWC7rCmQiwPt/Qy ku+KYTtWu4sq90inHmAqry/uJUGXvYdkBswAix+EH6VaR2eOW/5H75gvKtTEspDZyKOk= X-Gm-Gg: ATEYQzwW1YEGQBc7sePSg4UfWXktq6ZF/xi4x26qHSFa54dDXN8RjYJsWbZ/Y4LI80M sTejbFVOm2Tjx1MoAvCVEbJ3XhXR9PQ+V7l5MsHzud2j/o2hBVwlkk1BglaN94y3r1s3EprNIk8 GIhJ49XqpclMA77WZuVfgcvWqGMVBM6B0gealHU1Gon2JlQ1s0r3G7m+Q71TNmAA5IjWO3n6llm a7kkGEL2oFVgL+E7eClVpf1TemzL98xOtmqGbk7b3XLFSgAg5E+7gIKPQax7xmvgQ2fuVqS8pIa U5y0GTfj7UkKFh6NnPEwElz60+hRn6Yu64CwHZfaRVBTwI8FJmIml2BM42dSI55legWXq2aBse0 AnrQDPQRfJawWTnpSGaYJW1cb39MARg2wBoSqfKWuGdSzGODUHUJXxYkUAArkFUMRdZ7VpxVtO6 UHUpYdcdNxv/V+oKfmcqZHZ0oxxa11XTTRJYQ= X-Received: by 2002:ac8:584f:0:b0:50b:328b:cd41 with SMTP id d75a77b69052e-50b6ee5c052mr21002111cf.20.1774311064070; Mon, 23 Mar 2026 17:11:04 -0700 (PDT) X-Received: by 2002:ac8:584f:0:b0:50b:328b:cd41 with SMTP id d75a77b69052e-50b6ee5c052mr21001701cf.20.1774311063413; Mon, 23 Mar 2026 17:11:03 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.11.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:11:02 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:39 +0200 Subject: [PATCH v2 3/9] interconnect: qcom: drop unused is_on flag Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-3-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1136; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=yWGYHMvMuQOoFgMW09hmb437wfgDJSFA0so4gDay7xI=; b=kA0DAAoBizyKPgIpKNUByyZiAGnB1oahCW2r4LK535qVvTz8S3JBzO/RFA5ilVxiMBx0KZkkW IkBMwQAAQoAHRYhBExwhJVcsmNW8LiVf4s8ij4CKSjVBQJpwdaGAAoJEIs8ij4CKSjVQd8H/Rht xJkIJ1HHj5QdKUIqAhUDI/+EMbEIafva1ilOAhlKYfntQV2xkxPur3yHO12q5F1C+VYANPV0Rz+ Y7kv5Ji16T+OzgnxSVJgclSSRuo6OlzB4tyRPv2+nNYlCDFvM7lyRy5psPMulvUAQfWhxCA4+r2 FIa81M+66A1quO3Vy4xDY8Iy9BPlTvZqM67vhV2LYwG1mK7wYB4hAp5FwUl7GXYa5Gn1xlxYYJu uVP3aLnwxIs+ZJV7UgiKiaaAaqNJC7qs21+cxN784Q4bmlltO0RaiEpf+4S9kSBCdAEpDQyoWke 7iSXTdKOdm1jFOldo3cu3hALUSV9SXjL5G+qfJU= X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: y0Fv-RQJ4SUO-xnhLeJuOYuUZVmyNnkY X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfX8N4CXCt5gkTt m917dU5x4neem9Rptw6tMPaUhl5Ib+iRwwFMl+vbCTthZr9qrDNcPjVoT7OFfHZYKAQIalkpXWK 59x46md7j5wroSGvU9Rw/XnYjTksI1PIn5DEMi5nIZZt3811eqtfKXa/cNe7UfDE0cpxER33sUQ u0Y10JN4xgz66R7qeCoIaTfttg++yLikQH2yd7bw/UjDY0NvsyV7s1+K+dydQTPDWhMun3913EC IGLSkeGdfFA7Y6kmeiyBkGzZoUkUKS6lRoVYQ5cG+PPbQJK7u3iq+pX1mLjK41X0VzDcemUUMcI 9gSVnMneNNFgl2zlOQJUUEuw2qH8VchDgUeTQGDdNn/E1CZDVyE7P3wGoEUxXuGSgB4nVcD7kbm JQWaAaxtFo3a6p1REZwb1BhK8IrJyxaPzKn6QEgzjKakzGk8yAAR5nktEyB1fI/2Bhwv3ovq032 rtTTomBHTaTBJzVxHdw== X-Authority-Analysis: v=2.4 cv=CMInnBrD c=1 sm=1 tr=0 ts=69c1d699 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=snkofG2PpA7MSmzZjVYA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-ORIG-GUID: y0Fv-RQJ4SUO-xnhLeJuOYuUZVmyNnkY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 malwarescore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 phishscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 The commit 2e2113c8a64f ("interconnect: qcom: rpm: Handle interface clocks") has added the is_on flag to the qcom_icc_provider, but failed to actually utilize it. Drop the flag. Fixes: 2e2113c8a64f ("interconnect: qcom: rpm: Handle interface clocks") Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- drivers/interconnect/qcom/icc-rpm.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qco= m/icc-rpm.h index f4883d43eae4..3366531f66fc 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -51,7 +51,6 @@ struct rpm_clk_resource { * @bus_clk: a pointer to a HLOS-owned bus clock * @intf_clks: a clk_bulk_data array of interface clocks * @keep_alive: whether to always keep a minimum vote on the bus clocks - * @is_on: whether the bus is powered on */ struct qcom_icc_provider { struct icc_provider provider; @@ -66,7 +65,6 @@ struct qcom_icc_provider { struct clk *bus_clk; struct clk_bulk_data *intf_clks; bool keep_alive; - bool is_on; }; =20 /** --=20 2.47.3 From nobody Fri Apr 3 17:50:41 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01F971A681B for ; Tue, 24 Mar 2026 00:11:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311071; cv=none; b=AMGwSH7tDNYsHvdUe0xEZZmkp6+dUb9bg46fKTNLlaHfFOd2YK5srJeny80MLbHvdZsffItizZ5mHG6xRWEtnElKVrY9FCujgNqXQ4kZFZVMBh6PaYLTFXhn3AKFJ/6HnmLCQs/55u2v/eB3o37qb5ZS1nIdqsICvRQVgcVN4EQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311071; c=relaxed/simple; bh=ozckWw8+tIOW7mP4eABTKY6sc1w7ANmcnxLtEjsHZKg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u3DJZ65YMo1zva0uRZ3mtS8S4jxNyGvXLviOFXQ8jrzjCcHrWj0ZqnjLFsL++XLLGqFjQ4h3JEWmtF2w5w6eDbYCDmRP5QKNyVcHDzuq0UbbmYHmasOp2klXDgmNfYeeHuOHBtaRJ3JwCDhLLw5Cph8MY85lwN++FR1Yqye5AZA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ThwdjKXB; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=XCJp2ijR; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ThwdjKXB"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="XCJp2ijR" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NHqrDi2681731 for ; Tue, 24 Mar 2026 00:11:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= BQNTikIJkmJ6qFsbEmCD83zmmN8XeAHJf1MCNwZkoic=; b=ThwdjKXBIH/GM6v2 +C4NShoWWmvh9MpwK8l4xrvr7GK3xfW00Ygs1ZcTXEB2g+/k+zeWyoao7lAUcxgq nlNBa2QlAZSAZnyiBp0rEd23/SaCBlwUjYOgcGIXZHdve2KBCvJZ/irnLtod9e4R op5xPPxkOHgfBN97JvvhQEfEG+89PxT7pXzKyS7X4omDTThhF0MB9XukfeRVUngS VkQFBg8fEfqh5PJHv87shVBDIzHx/r5FDJgdaY8zKB9hpxzsL7xr5vMfW1+eTzdM BK1Un54UdRnSu7vhv/PXxSAlh3xCthKYf/vcl+ZWOPOXXzcsX5dtcOtGHPuu2SZZ qY6djQ== Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d31p7b6eh-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:11:09 +0000 (GMT) Received: by mail-qt1-f199.google.com with SMTP id d75a77b69052e-5090bc4823cso176089331cf.3 for ; Mon, 23 Mar 2026 17:11:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311068; x=1774915868; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=BQNTikIJkmJ6qFsbEmCD83zmmN8XeAHJf1MCNwZkoic=; b=XCJp2ijRDYBvEr+BG2Hp88dY5SerPrH/IjL0E/aaLCWa7X1juCfuBqd9dHWsB/Kr4d dIOx/8LMz75ivNLq5PI+bJS2As50wbTvtxojTsm8kDbxj1MvNwnF5LREDBmxlyi8K4gF paypQlwHloPCu5WaqLt6mLvD1oLCySgXS2jjFgKc2Ca5n+W91EXjQTbKk3mPLYtB4y5Q uJJqaB5xHNz1VGDMwnW/LuZl65S8ET4taPaXKe42bbibfGoNmsV+a36uxFfnjdYg5FHC uASlPsVY+yqHTIghxA6TqqFg+3OBsFD5CyOVkmwvxolG67D4tucVgOacBDTH0PB7+muy m31g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311068; x=1774915868; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=BQNTikIJkmJ6qFsbEmCD83zmmN8XeAHJf1MCNwZkoic=; b=QMchCaPX9c+ouXW1EITdfhKcIHLkOrcj/6BqfJ030551O0vKdbwWn6g1Xlnrl/7t4C zDZgKVx1KehRS7I12CLasIm6wg+HxDeIBjW05g/bhZmVwjpUKoKGhZL//DTmDCZoWxj1 YqJ761EWdQFgxmANU1Ffrx4gZVoU4JybKt47lsPIGBinMJlDgldKEYY/W80m4Ya0lwPJ i1mYk32GFTS+RR/SHFAHn2CfTnvXGdDcBPRWdOqKen7PjHgj/MwHYydYhMAVeF1olnEh f78bfAiE0n/brhUxFcq7jSWEBouZCj6dUwvBWWR5EOCWzDbvIXVhmAkYE49a7EqrgGV+ LNBw== X-Forwarded-Encrypted: i=1; AJvYcCUX6M5B5tUZHxyfgZFgw/8zJIRTz2+nPcD+356XOxvBBlcUfAricvpZ5Oh6aizk/lwxYF6jjXZB5cqxkkM=@vger.kernel.org X-Gm-Message-State: AOJu0YwuRa3bcc2TbNI79IRaO057SxUVifWIciNM66in8w1pkW69pT/y id7uskbhtzvymHyoQqdOIO/wyREa7eL+PxzKPxZt2g5qCh+RoAiX0wly9PyPMsbEkc1uvX/CSW4 VzUCsrifbrQc5Ynn1ejI+5Op22gr0z6qqekpL0914xodHa8UxCHUsc1Uzk9f7dDB1LFA7X0svVb o= X-Gm-Gg: ATEYQzy7ENZQfMtZS5kYDzqUg9XTykFN8fVxCQ6QCnJsLnVogLsxtIDIOkvqHn0+lxY pHXoUG0OXpgCn/2jW2ZMyX7USIHDHDtt0uqBGbchGInBMabv/U85IS/E9X9YydO3NyfgmA+Ury8 bG3bjAxA4vynnYKcajg+EH0BiaEwdu8L5RaML59AwSmDHpQ0ZbRbrYWckA/lcfAdH1Q8GmNd32z ePFjsEmOpMuQPrGgVMpM91dWZGTmD01gqBWH1ibeVPH/xiqyN9NrM9wSTQ7Sw6K/HK2oHd2y7Eg nUBkGh7PWb/PcgxkMz0Koq1N2fgh7WC5nCVW1OJs9tgvsKSBssIjqqbAqXOdtZSW5/zSioFPF5G URVv6Rd6AAYfrzO6Bgl38OS3p3qmcj3qWbN10r0G1a4AU4KI9r+NjQLaoiWMldvjvOJ4tPvCrrB DEVC4xG5F2w24Twtaoz0tAp7yB5lVMhZl/iq0= X-Received: by 2002:a05:622a:52:b0:50b:37d5:67a4 with SMTP id d75a77b69052e-50b37d57012mr217685011cf.27.1774311068112; Mon, 23 Mar 2026 17:11:08 -0700 (PDT) X-Received: by 2002:a05:622a:52:b0:50b:37d5:67a4 with SMTP id d75a77b69052e-50b37d57012mr217684641cf.27.1774311067603; Mon, 23 Mar 2026 17:11:07 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.11.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:11:05 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:40 +0200 Subject: [PATCH v2 4/9] interconnect: qcom: icc-rpm: allow overwriting get_bw callback Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-4-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1384; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=ozckWw8+tIOW7mP4eABTKY6sc1w7ANmcnxLtEjsHZKg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpwdaH77+a++fkvnb2TtgevMk5sQdGw4+5k7KMF Nc4XWzaAOiJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCacHWhwAKCRCLPIo+Aiko 1WJHB/9wSxBxhVz1fPRLOcC/xcSgPP5OUjSpZNUqcIoNgsFYJJVUpapM9V9tq81MBYE78b70QkO zAntNoKcp9Sykwx/wZx2LxbFM0uOlk2nIRsqreqTZgkcR4Q+ODtym8bdR7l2E98eLT/c5Ahpiql sBubAL6kzWhVxDd66Hs4zeaEfv5Hi4jPgLyXiXLCaHkFBhpNfg39vhat44hcV0O1peBL1r/6EIo VDQvlJveKlkr8GcS7U7pthywqWS2k9XEe95+6QGj4nLTqwfTX9aejWB4BIktOdbuadA5VTB8NyI b4eyt75resKVvjidTc2MedmJLjaz6tIIBxhYQZOutPWFFYox X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=RMC+3oi+ c=1 sm=1 tr=0 ts=69c1d69d cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=6pvQaZlX7ZpTHHZizXIA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-ORIG-GUID: otgOtRthP_-LvZg-3SpfwxJP221OPnK8 X-Proofpoint-GUID: otgOtRthP_-LvZg-3SpfwxJP221OPnK8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfX4yaQfXbvSMNL pk4jNxrzOj0uOzV5tV6BUMuOwO1jb2xXVgmKGNukVX1gvcqiuyDW5jRo7WRDQyuH6G692dCzR73 sqtFqaZm3tNcWziyAswvnlgkY4Nhdte8vY72flRhLNdkWsx/+XucwP3B5cWRD5pyg5jKC5bak0s Np/EY5NsBDyr5rjr62ffHD4Z1IZC0/z0AwRCoy/dopYXGAWBxkO1jrF0AcFbGDrxUdaX2Zsyypc q/GYbJdlGp4+do5RblIgG9ArhWJ/HgJrLqLJIDpDibmUCl6uTiKz3dMIszPYuNyiV7tNPNPa1K6 HBBIViUGdEX35rdBEQhObz0Zg4ZdHvrZipXtirKWE+kztA+DQDTgEPUL/Xwi0Ua6net5r+kqd/g FkfjU84G7uqKK6bqEDfAQO/Z2r8eI/cCxpNyYaWwbHEqKjWSde4N63LCq7IXWtf0FzbD44ssSpX j9kYv5xKoLC5pYfPqKA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 phishscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 spamscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 MSM8974 requires a separate get_bw callback, since on that platform increasing the clock rate for some of the NoCs during boot may lead to hangs. For the details see commit 9caf2d956cfa ("interconnect: qcom: msm8974: Don't boost the NoC rate during boot"). Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- drivers/interconnect/qcom/icc-rpm.c | 1 + drivers/interconnect/qcom/icc-rpm.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qco= m/icc-rpm.c index ea1042d38128..aec2f84cd56f 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -553,6 +553,7 @@ int qnoc_probe(struct platform_device *pdev) provider->aggregate =3D qcom_icc_bw_aggregate; provider->xlate_extended =3D qcom_icc_xlate_extended; provider->data =3D data; + provider->get_bw =3D desc->get_bw; =20 icc_provider_init(provider); =20 diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qco= m/icc-rpm.h index 3366531f66fc..cbf0a365839d 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -135,6 +135,7 @@ struct qcom_icc_desc { unsigned int qos_offset; u16 ab_coeff; u16 ib_coeff; + int (*get_bw)(struct icc_node *node, u32 *avg, u32 *peak); }; =20 /* Valid for all bus types */ --=20 2.47.3 From nobody Fri Apr 3 17:50:41 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DABDC1A3164 for ; Tue, 24 Mar 2026 00:11:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311076; cv=none; b=mCI+D7psG3orz4osDU8+SLoUy+dh3U/0jbK169DF9yz9Vmqx/si2WKgWfoJ6ixJ3F63MqpnGi7kkw9Oz+u8wrY6BnFkemdYZvnjVKfm0qnzDduQiElTDPyTru9O7oLjQ0I5fo+d1x6EGp2H59NGJhlYq0IM/jD3SPiEanpUIvpw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311076; c=relaxed/simple; bh=Sy6oJd+KnyyD9Vs4BTyOzyQv0pft+AOfiX1PY1GJ5ag=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jYqm5xVC4DXNcsMV55ceoe56y1wDmZ00aP2ol2cDUr6PLr8MveCNF3fTnc1TQAf2jk/yK8ianyz09Y1oMYSRheHZssT9/I5LydSPbxrdppEv2cktvGfy5UZjcbcYHHIECuqUZ5VILD7KzawjTQEcRWVS8Svz4CTAUgW2JniDQ3k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=krqEIf61; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=FncjK4VG; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="krqEIf61"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="FncjK4VG" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NHqh2R3934736 for ; Tue, 24 Mar 2026 00:11:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= V8hgelKstStZWzF6wWy9g8MQYVLkYeFx+q9MUtvosxg=; b=krqEIf61AAWJpPYK CUQSiNy8MHr1jvi9QO0nwhWS8IDmx6Txk0Ol+SNuILomF/bGOvXctBgW0PvzR4Lb dut4gs06FnksGEomNCpEn6hjgqlvuYIlDLmyOnuolzc8hy9M+6OEWqSjad1RrAEs hl8ntbVH7X1kTY4IfuZ3ZBilMjIzEGZOtob7JeG3IdY4zMPCTJ5WQ1cbi4vXpZjI vAVIaQPh9lHjldgMGgR6Ewpn4BSaP7AowWRDUC3DK/Hs4ewJ0FeN2hsmDUxRy7RW WtsFoSJn5P35xEU3d0Hh+ArO2XwL33qFVqIeB5yKewyRdczFNCygHrnKEKgpo1yX uUTsiQ== Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d37a0htxd-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:11:13 +0000 (GMT) Received: by mail-qt1-f199.google.com with SMTP id d75a77b69052e-5090e08dcfcso42994591cf.0 for ; Mon, 23 Mar 2026 17:11:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311072; x=1774915872; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=V8hgelKstStZWzF6wWy9g8MQYVLkYeFx+q9MUtvosxg=; b=FncjK4VGX15iPtW0HhDxTOaMY6DpnXP/2YKj91UIy76SeYloJQZmjttlexDcY3f6L2 N1aAWJEP3j42jj7pshoCZ0zUs6m6wyKgwxDz8ojzhx1S1J07gTF3sbaptPW5Y+yJ00OR A1gFGsw1fFpLZ8OXdK0FS9gjDQySPe9hLirpMHGKDAGE6i2MB6qQ6nnR4KjVGLmmLuw+ yEXpBsLBITjh2354KA9st953JldBzjIhZ/mizfAoKAfkMrnVn0iPVEMKGEozz4NESAhO TOIahuZN6jEnpAPBNY33tk0OQcqS7w6qKjt+sr0B03bNt/wic+oisxp5Ler5ZtgMZZH3 A72w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311072; x=1774915872; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=V8hgelKstStZWzF6wWy9g8MQYVLkYeFx+q9MUtvosxg=; b=TKwqaXVk/QmwJjdY+G//b/pCQUdbE8LqdJKBIGas9E36Lrs0W6skMc355pSph/Q2kM qkFEDrimUos8WvyLcXBacrgwRSIPdzZDf9RsbQol3kZx9WmZp06THaIO0kP0dAUKDJGJ PiP5RzPN1Pyik6U6emjKVkuYE0wy75UJMyUk3bbag6W9OsaCGIUz5uBFip9wZyvKzwC9 17N6jhfGzWEr/DICdSkIskCiZH0oDI7e8MLhxzR2tsMvMIqqEqYLayLMjc97qRJLKsem LrnzkY22s9gg5FJ7H6bc1Nsi9H+3RqTHWLcilrChLA9syv5jFRlx+HoLX5gJhG2u98mc hNgw== X-Forwarded-Encrypted: i=1; AJvYcCWBB/z8c7VqAT7YZRBiijMxoMgG9DObGjXWTnWc5cMqzJ/sCFDbIFd+9RCzPDKxGxdaRkzjOmA3IHgeJ+o=@vger.kernel.org X-Gm-Message-State: AOJu0Yw35y8OsnNE07CYBiWvG39rXgyhpYgoUquEoOlyLvkblBIAN/8K VL7oNyGIQ+1WmLVSph/e3yEqf6oRBawE6DBeXLt5iYCguW8u70BjrTGgzIKc4P1uJZ32hzPNYh0 c015y6HokDQxTggQlULMD4wEw+6pcKiBebIyBPomrrW8WvB2qGNyCGuq52NawiGqcVBw= X-Gm-Gg: ATEYQzzFbn4Btak/3kJTD8HgFL+kS9FJxHJYeGwyzwRYApvsTk8cJ3kMPmPAoqhEa6h eVIq6KAzYl0JAUZaPSF4HVIryHofvpJRxCoKfhIULexi4z2v4vFe4cBbBGoKFH3Xip8M7wEv/UC lVXtFKpapUWVK13FYaJEpuAll36Dk/+wgHUcnkb093HpKXv3CIGlIHXyv8CoqJnL+C2dfj5+4c5 uWBz4cL9cgvqUTEJ+VgVcmPk6Lctxg2ux4A9FdLG8Gd4jxtXLYA8l1KAC3qHunW1S05wxF5azZ5 hBhrsyUJYIxF9Y/u3qP63mD4yX6EvoG1pQSSkZUpdhCEzBNptFRCadJ7hUvQeVnjsBQO3POGHQ0 21eeaSnI4TLKIp5LvIahWsc+6izJB/fy8jy1dhc4oOtxDjVnFoobQmSoOmLCzLGRIiGKsy9YcOI i/HYFgNfP0Y2zN88rEEn+8wrsoLJzlev0csmo= X-Received: by 2002:a05:622a:1899:b0:50b:506d:736b with SMTP id d75a77b69052e-50b506d8652mr131634801cf.47.1774311072075; Mon, 23 Mar 2026 17:11:12 -0700 (PDT) X-Received: by 2002:a05:622a:1899:b0:50b:506d:736b with SMTP id d75a77b69052e-50b506d8652mr131634421cf.47.1774311071657; Mon, 23 Mar 2026 17:11:11 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.11.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:11:09 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:41 +0200 Subject: [PATCH v2 5/9] interconnect: qcom: define OCMEM bus resource Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-5-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Brian Masney , Konrad Dybcio X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1703; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=Sy6oJd+KnyyD9Vs4BTyOzyQv0pft+AOfiX1PY1GJ5ag=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpwdaHqbmoZNiGrolPxRsj2zZrjenjJSqnqdP9W ztUxMdNDFSJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCacHWhwAKCRCLPIo+Aiko 1TgoCACUvtdtzarbR8m2arr844FyuGwCqDMhs/aEAswvKDxAPOPUNSBezvQ6LBXJchB4ZaXQ1XC sEww9INa5Gif2fkZBmfIJsU/5HIjRetYUoy1nzlIb+c1GY0yFOKelaFV/wCKK0dn/D2XlE/djfb KXKwwlWu6H/1Z9bosM39Gp39zMQp7UMIEy1/sQCjmanOzoCBM294MasCUcGJXrLPkcGxYyj/i8F oa9vi8S5hgmnUO0xSTUo2hvFs56IsdKTsSo0ZKD9X+qM/sSBSKD0YIm38KLunHi71yXZ2v+cUB3 d+zQo9XggIbX2gmL3wJblpQ/pgcCPE6HL4DcCIqONjMyAKnk X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=GIIF0+NK c=1 sm=1 tr=0 ts=69c1d6a1 cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=20KFwNOVAAAA:8 a=EUspDBNiAAAA:8 a=zOyvSeg7rOUdy7vhyckA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfX9BnSux+C8Ofp bef5dfWiSFQu3BbVteciTO7lc3hvWTc831KyDwGhlgIdkOSTeSalHRt9cdLLhPgcbj2hBwOa0np 1dMfUJYq3nH1JECS0lBRgCUa2bxCMVyLba2OMMyYs+9uNpgSGBoEugnBP59LmQpUF+Ena4ObiLb uUkCs3UB8iksQLckqmf39uyBk9hgs3HnpGQAve8Ep+ElUg/PTMfBJudBb+vSAlraV8/x1zhnjw9 x/BoPcb6Ipsgm5gsF78mPRHKuD/UNiiFNf2c8ZjVl7CxN04sqt+ZP4Vb9qdC4xUZp/SBM6dg6wo D1DrwWjqFaGwg2butG/9H95iW2rTjrG71uwcw2R36dWuR5m+SvgbaL4FFyUaI+YK1V4gdxT/QXl vKeizIhnP+uwCRND6HRZeVC/pG2zdMYyCJ3iJ6+y9LUvfqGbsWOlW7tWQsRCS8P2BAZAcA5NNnQ gcS4nejy3BP+qFqg6Ig== X-Proofpoint-GUID: SYoRx-Ntuy0at3uqHfNztaMxwsFSoYTD X-Proofpoint-ORIG-GUID: SYoRx-Ntuy0at3uqHfNztaMxwsFSoYTD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 malwarescore=0 priorityscore=1501 phishscore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 Some of the platforms (MSM8974, MSM8x26) require voting on the OCMEM clock. Add new resource for that clock. Reviewed-by: Brian Masney Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- drivers/interconnect/qcom/icc-rpm-clocks.c | 6 ++++++ drivers/interconnect/qcom/icc-rpm.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm-clocks.c b/drivers/interconn= ect/qcom/icc-rpm-clocks.c index ac1677de7dfd..69846e26f46a 100644 --- a/drivers/interconnect/qcom/icc-rpm-clocks.c +++ b/drivers/interconnect/qcom/icc-rpm-clocks.c @@ -31,6 +31,12 @@ const struct rpm_clk_resource mem_1_clk =3D { }; EXPORT_SYMBOL_GPL(mem_1_clk); =20 +const struct rpm_clk_resource gpu_mem_2_clk =3D { + .resource_type =3D QCOM_SMD_RPM_MEM_CLK, + .clock_id =3D 2, +}; +EXPORT_SYMBOL_GPL(gpu_mem_2_clk); + const struct rpm_clk_resource bus_0_clk =3D { .resource_type =3D QCOM_SMD_RPM_BUS_CLK, .clock_id =3D 0, diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qco= m/icc-rpm.h index cbf0a365839d..ad554c63967b 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -151,6 +151,7 @@ extern const struct rpm_clk_resource bimc_clk; extern const struct rpm_clk_resource bus_0_clk; extern const struct rpm_clk_resource bus_1_clk; extern const struct rpm_clk_resource bus_2_clk; +extern const struct rpm_clk_resource gpu_mem_2_clk; extern const struct rpm_clk_resource mem_1_clk; extern const struct rpm_clk_resource mmaxi_0_clk; extern const struct rpm_clk_resource mmaxi_1_clk; --=20 2.47.3 From nobody Fri Apr 3 17:50:41 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA26D202997 for ; Tue, 24 Mar 2026 00:11:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311080; cv=none; b=dujuS/ZKnZrW5WvESpfRvexVWUl8ZohG6xaq6EF24fJxL/mBLi2kK+Y0NYz5TV5UzEJhQJEgKbYAi3RYcxwpB+nCrV6X31SWSbj3A5dwiCsSA4n0Upfk3k8ZkC3EqkOGuYohG+jwyP50X8cE0yYL57cXsGSlnxScqsPGy/mVqzI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311080; c=relaxed/simple; bh=8a6RAWnpQyKLw+qq2wEoeMrOdQrrg1+uqpvE2+exeXU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=boawm1pEJpnADmyUE/XuewupCIvmd+vGes30GuYPHLhHFBRhWNLlRMqD/MfPgFK2sQa+KCEicMOzOkjS4ljfVQZhsnCH5+7ns66UWJTm4O8LodnhNyxexrlmHsznbzPNLQBPfa8fJ/UdponFZvV+w8acDsG+bZL2UGKFDOX0NrY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=JYzkLm57; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=dDDSliVr; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="JYzkLm57"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="dDDSliVr" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NIZVUm1910729 for ; Tue, 24 Mar 2026 00:11:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= CuNcwWzSJZ9Jk+gtOFKvHK8967Npp+PD7mT24N4najw=; b=JYzkLm57Pe+x4wqO 7UvzB2j96NrwiN3O9jQBXcTv+TbMwjfhiN+UUVTL9oJFJmbR/nHJP/wfqhdpAcXi Vtn3JU7pOcaRTrGBp3H/iECHKMhmJPmjNtAVNoz/AmcjPiqB9fd8mKVBnLdHyj5M PL8PvQMe4/Ad+UVpYjNQtk1UjexDB9Lm7G018cUsIHDgzizctBO8a7FSb06pCBc5 HBofLsnPGHCsFdd9jD/PrJJWveZ9lHAmmKaYvyz2rOgW/aV5P398U8HwOyH2npUx G+Y/9uVpPtvlVL3VsLHZncC8pNegYyPvpO73PjRSjSzAsJVhaODX2itpBuj4vrFE 7CDPQQ== Received: from mail-qt1-f200.google.com (mail-qt1-f200.google.com [209.85.160.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d3awyrwv3-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:11:16 +0000 (GMT) Received: by mail-qt1-f200.google.com with SMTP id d75a77b69052e-5093b92f327so351976751cf.1 for ; Mon, 23 Mar 2026 17:11:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311076; x=1774915876; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=CuNcwWzSJZ9Jk+gtOFKvHK8967Npp+PD7mT24N4najw=; b=dDDSliVrm8gg1BPu/wScXhJnHrBeHGyfdhhI/HIWNC3Dzkl0HnA+iBsfOo3wthemag HPXtPP3Ei4JMo+xAIH0FSc41KZvXpv4FUmrE4lq9aCnwS99SM3ezlc00+XJI8J8SxSH9 CjUqFtKHyJxQkU2ARTqL1iIvygyEUxc2OvpI2AkRxeyHjPoEbibASiyptHN5m2eddU5u UwzYhLjKpBF+bLoXgWeG4KiMkDcriMPJR2LAw7rD6y5XHhVwJBESHprZOzgvnyjcF6a7 hOJztT87Zwz2hYAz6oNYohUxjM2+IcoAgRlr2EVghQDezevs/ztzWyCombUTP00zIp67 z7CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311076; x=1774915876; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=CuNcwWzSJZ9Jk+gtOFKvHK8967Npp+PD7mT24N4najw=; b=MpbtPNRVS2sYrpLfpqs9ME9/rF40LEZ/QZRdjEh0I8FMUWFvdULrF+hQklG7LsgPK3 zPcA7p6rdwXVevLfND0884YRe2M/7tQg7N0oTeYgDeMsMtJnVzkp8Kta240Yod4xUq6e CfIT/F+kTGyr4RcO8SiOo8n2bnceV1xjAHyU+HnvnovoCqxrjUOTRxIEbAnc0GRY4fpO ybiuPHzQ1OYgJWIS3gkRRbvTOOkqQDXvW8FTwsyD8sfp8a4ydcye9wREpoJ+iIfhzAR4 jB8zlSS+8cmEJSWS/FdDmdLOVN9DsoLzPDBfh/HxAG9YOQwIU+UkS9ybQL3n1R33kI0h ZBDA== X-Forwarded-Encrypted: i=1; AJvYcCWXOgpAcFbFSBaLNWs4i8anxfXBU4mgUd5lV2HcVhgZkim+5dX8CS2YJGxoWI7DlrJdkntIjylue6mZ3ZU=@vger.kernel.org X-Gm-Message-State: AOJu0YwBO5G8IMWL0hrCB+Ns7HJhDlEbSsMopFvutpsIjBSgDHxTFr51 C7vTHWwJ3IQQeW69HZR/SgLTkJu1YX78oIK2PVZbRU++Q9vOh/EblFa0XdHvYpywY+3v66GR8pJ xqUMC/p068UcbEBl5mMsbF1MP26T6/oJ5mjVHYomeWtvLfIhDfKy5qWNBVPhdi6E37E4= X-Gm-Gg: ATEYQzxFcq57VFCatBonwX6tHbY2w9pq8MvVR+S44tNIklyk1Q89DUhsKsDpD4f3MPJ aEKVShI7CFgW1NHy8Y9iS2B+Fy78I0m+5wQkQ1FqkhP0d8jw2Na0L3LlqwUmZJ4wFzQz6ofHsle SwAFVDOJRMazzngHwJ28PpmqGXSOR2WlQ2onWYEYAn2KcGHJOB6JhB21l9sPcSHGUbI2Y+BIw3M aSJTcI/ERauXN2M9k19QmInibvvFfvbC+RZxer1LSd1XQE9o8N2rmk4iIp32J01YkZq3gy6RZo2 c5QdtsWYJo7UDXhfIIcCBCRn+pgkUvB5jFm+ShV1VzRd+zs3KHXk220VFTxkMM3pS3LyyQE0THK aPWyCtDofBEQNCgFhLgSCptykykhSCL//3gR4T8qrt38WulaOxoZ1uNORJVQOytEhc21e5zXGEs IbwhCiO0AjXUaqJcXJxLWAxw7d3m8xhheAnds= X-Received: by 2002:a05:622a:2686:b0:509:4faa:f3d4 with SMTP id d75a77b69052e-50b373f5e0amr149282681cf.3.1774311075708; Mon, 23 Mar 2026 17:11:15 -0700 (PDT) X-Received: by 2002:a05:622a:2686:b0:509:4faa:f3d4 with SMTP id d75a77b69052e-50b373f5e0amr149282421cf.3.1774311075239; Mon, 23 Mar 2026 17:11:15 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.11.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:11:12 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:42 +0200 Subject: [PATCH v2 6/9] interconnect: qcom: let platforms declare their bugginess Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-6-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Brian Masney , Konrad Dybcio X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4066; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=8a6RAWnpQyKLw+qq2wEoeMrOdQrrg1+uqpvE2+exeXU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpwdaHp7qz6SG/DOiLvdooiKKlYIUeJE2ZSuPSV +Tnah9NV52JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCacHWhwAKCRCLPIo+Aiko 1ZVZCACU7k5s3Gj9S0OczGq4VebeWmPfpG1WesCjjw+x8OheSTobHg1hHr43X1rkLkkzZbMz8Qa IsEod2PWl6I76+CQ3hWdI50Sbae+HLmvAW3dhLm/TfydM2S6jB9X/FdzkgueLZDe8l7pxHcTJF7 w1/P/6aobIE+BgJYvMZ3XrcY7cA640YTiDNXR685dkJkbbaAq9R8UPsc6OsqUboXFOxG59aHl2X XpZZGZRoPX0qgeJyQggTS0GjX+YDd3DJYo8ubuPkqL5iXscC2sN+gc8yl/Gf8OQrpER2tbaA5+u fgYuo+Z4yW2CmFPLsyCIiXbZY+lksK3J3GPQCSEGXu5PpwM/ X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfX57PZLqQJESrA aSscZaGcvMmbeK1t2OX1tireNDttTtZKUkIp6lqPDBLBKvCnC432WbuUg7rtmc+GcU9ufEaWinJ GH1aUG2w6R/R1ol/GpWu4Hk5d6g9mE45uWlI652D4h1axTSXZgLsK6rLVk2m5oNsidWYJnEgDM2 jH9FjEyy145D/zj5+l/dyPhAZGAp5yn1x6UitSIq0zOge/PObK5Ro4LKivFcz0BZjXNyRzS4fHs 7Ti96jUB9acpvPIwWa7ZFgaWyYLOeUqQn2dgYfjfE+nBNBLRGzQiw+O2serlfKPaB+VXC+myi3S MTI2CYwT4g1aGhPWJYz0NUYOMNOU/NwQ31E5O0OQWuxBzK7Bq/78UwhG71EyLMl+GWbvc+3qlaL kbRS/jMETQENJIgQbMIelaBvHU/+9Cg2At1+NQCI4vJYlofTDeh71zDkOeEbKdM69Cbz8Op5bwO 5siovJZFrTa7t/enHnA== X-Proofpoint-ORIG-GUID: ZHqsxzm1ESZz6GH4j77meZUjkXnUn_6Z X-Authority-Analysis: v=2.4 cv=KuhAGGWN c=1 sm=1 tr=0 ts=69c1d6a4 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=20KFwNOVAAAA:8 a=EUspDBNiAAAA:8 a=PYMLbkgk4Fc5e-Gbr9wA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-GUID: ZHqsxzm1ESZz6GH4j77meZUjkXnUn_6Z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 phishscore=0 priorityscore=1501 impostorscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 On MSM8974 programming some of the RPM resources results in the "resource does not exist" messages from the firmware. This occurs even with the downstream bus driver, which happily ignores the errors. My assumption is that these resources existed in the earlier firmware revisions but were later switched to be programmed differently (for the later platforms corresponding nodes use qos.ap_owned, which prevents those resources from being programmed. In preparation for conversion of the MSM8974 driver (which doesn't have QoS code yet) to the main icc-rpm set of helpers, let the driver declare that those -ENXIO errors must be ignored (for now). Later, when the QoS programming is sorted out (and more interconnects are added to the DT), this quirk might be removed. Reviewed-by: Brian Masney Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- drivers/interconnect/qcom/icc-rpm.c | 17 ++++++++++------- drivers/interconnect/qcom/icc-rpm.h | 3 +++ 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qco= m/icc-rpm.c index aec2f84cd56f..23a1d116e79a 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -204,7 +204,7 @@ static int qcom_icc_qos_set(struct icc_node *node) } } =20 -static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 *bw) +static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 *bw, bool ignore= _enxio) { int ret, rpm_ctx =3D 0; u64 bw_bps; @@ -222,8 +222,9 @@ static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u= 64 *bw) bw_bps); if (ret) { pr_err("qcom_icc_rpm_smd_send mas %d error %d\n", - qn->mas_rpm_id, ret); - return ret; + qn->mas_rpm_id, ret); + if (ret !=3D -ENXIO || !ignore_enxio) + return ret; } } =20 @@ -234,8 +235,9 @@ static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u= 64 *bw) bw_bps); if (ret) { pr_err("qcom_icc_rpm_smd_send slv %d error %d\n", - qn->slv_rpm_id, ret); - return ret; + qn->slv_rpm_id, ret); + if (ret !=3D -ENXIO || !ignore_enxio) + return ret; } } } @@ -361,12 +363,12 @@ static int qcom_icc_set(struct icc_node *src, struct = icc_node *dst) active_rate =3D agg_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE]; sleep_rate =3D agg_clk_rate[QCOM_SMD_RPM_SLEEP_STATE]; =20 - ret =3D qcom_icc_rpm_set(src_qn, src_qn->sum_avg); + ret =3D qcom_icc_rpm_set(src_qn, src_qn->sum_avg, qp->ignore_enxio); if (ret) return ret; =20 if (dst_qn) { - ret =3D qcom_icc_rpm_set(dst_qn, dst_qn->sum_avg); + ret =3D qcom_icc_rpm_set(dst_qn, dst_qn->sum_avg, qp->ignore_enxio); if (ret) return ret; } @@ -509,6 +511,7 @@ int qnoc_probe(struct platform_device *pdev) for (i =3D 0; i < cd_num; i++) qp->intf_clks[i].id =3D cds[i]; =20 + qp->ignore_enxio =3D desc->ignore_enxio; qp->keep_alive =3D desc->keep_alive; qp->type =3D desc->type; qp->qos_offset =3D desc->qos_offset; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qco= m/icc-rpm.h index ad554c63967b..7d1cb2efa9ee 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -51,6 +51,7 @@ struct rpm_clk_resource { * @bus_clk: a pointer to a HLOS-owned bus clock * @intf_clks: a clk_bulk_data array of interface clocks * @keep_alive: whether to always keep a minimum vote on the bus clocks + * @ignore_enxio: whether to ignore ENXIO errors (for MSM8974) */ struct qcom_icc_provider { struct icc_provider provider; @@ -65,6 +66,7 @@ struct qcom_icc_provider { struct clk *bus_clk; struct clk_bulk_data *intf_clks; bool keep_alive; + bool ignore_enxio; }; =20 /** @@ -136,6 +138,7 @@ struct qcom_icc_desc { u16 ab_coeff; u16 ib_coeff; int (*get_bw)(struct icc_node *node, u32 *avg, u32 *peak); + bool ignore_enxio; }; =20 /* Valid for all bus types */ --=20 2.47.3 From nobody Fri Apr 3 17:50:41 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70AA221ABBB for ; Tue, 24 Mar 2026 00:11:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311084; cv=none; b=sPrFnrgDo1ly3ZKU0kJPWuQlxCeshntewjpGhfGKA5Wnny48y63m5PzpkxR1SpaZZyaOvZs6vB7v3xZ5g7dxrBjaNigvxdl0K8+wb4oSCh6l89GS0zWr9pUpc4+QndKkSjFp0Fqb2WML+t0VATEgSpNxap+Fz6iNEuF1M8pNWlE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311084; c=relaxed/simple; bh=ZWpPVJTyGZX5XAzeSYalFLMhBrxegI70Mcl/cCNi2FY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SwF/cH44lhFmV66Ial5FBIpZ+4Z5X4hYrG0NdweRhSurWnfxAmVTvX/ncrG3hSjdXykm1CKtkW3qoam1WXxrxo/7VwfKNBKNWAsVm2BYhR9+w+yUAK8WcP1ZY+kul8S4cGfxgZ+19tMwJg3NGBUGhKpR4F+XvrWx3u5CTTWPB3w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=INN3nadb; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=MNZA8HQZ; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="INN3nadb"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="MNZA8HQZ" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NHqh2g3934726 for ; Tue, 24 Mar 2026 00:11:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= zhWKmPyos8mU3XZ1HkzNAW8a4RA/QyofgRQ7BpX4XV0=; b=INN3nadbUSDSPE2A /7JbS9NpFT72limzNsLUt3RHi1c9cnIJSVRoQ16TYgpKuKgtHvB7IXtP1EQFvttt UkKhUtIISKUGTrDChUwHgw2iYpC28IxWIEzJ/pBcea+ur8s5ELM5CTsDCJTrpvem MyccZH2syleEG/5ALEG635M5ULybWnJnbfFjaKMDAulPD1HhVkLggomMFv2NJTAa kzLwFxXT9R2DYr9zfSWb92w4rHRJnYNe1R3guwhG78t2YMpY75+EUV5+VtX0QxIP ii1U132RUF7uyMqso+24jMVeT2RyC2fBLjdd172E0w0MvCkuGAK5Qo1bavEN/c25 Zx98kg== Received: from mail-qt1-f198.google.com (mail-qt1-f198.google.com [209.85.160.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d37a0hty2-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:11:21 +0000 (GMT) Received: by mail-qt1-f198.google.com with SMTP id d75a77b69052e-50b4ca7e7c2so37987811cf.3 for ; Mon, 23 Mar 2026 17:11:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311080; x=1774915880; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=zhWKmPyos8mU3XZ1HkzNAW8a4RA/QyofgRQ7BpX4XV0=; b=MNZA8HQZuIkZ/nQ1EdnbzXTaAyvbwxWMCDGnXz3uR4rgMbYsiYnQIA8BeFeDGji5bg IyH/Vzg1obaiS8alKGUNhjOdrVdH35G8ZP58GECyE81CUCHNYGsNWM6XzD5cZmy5+clI dGOyQdBObUAXlaye4A3/F1G8gGT347KS68kv7jSpruOw+b3p+ilf5iTWA+3fTlPnJbFs xJb8oCDsffCT66/1PV7y7czT0CU+TmKG7UGL0fwWjmGV1Cz9j6YLp0MRVH2oxzPnx/Qv s4UbKQM7QECeUaj2STeH8zPrSTnD7ZM0hoeJ1ueqcowGZsmPCt6+75A+EOMtilJnigMB 0WtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311080; x=1774915880; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=zhWKmPyos8mU3XZ1HkzNAW8a4RA/QyofgRQ7BpX4XV0=; b=U2lxz+AUuzjv+fhYjeqGYHZ0DD1cBee34xvvPI9QKFTk/bx1busb4GAN6IvacblgeI qkFfZsQ9cWRVJXT4EKsfIur0/0Nz1ToQKT0Zjsdxwjwp0vjPp1PvJHNc2HXj07kd4PDZ v7hNG2r6T6WHkECJtZ/fYxizkOU3anygGICw5smPqtm/xldZPyhJplUmCC3QG/R7AOtC 0SLUWjIQVE4/gO1tKuHour5dJQeh0zH4jYj5QessQN75QhqWO6Ec3Whkj5tbmofXmB0A GH+HGY0C55KhWRFeEDahct7m+BXnTrEtiJ/Hxkyp3d+Mxvdqs90MEw/jYxuZDfO2rj3e 9P0g== X-Forwarded-Encrypted: i=1; AJvYcCV07+MkR2reW/Y2EiYCfX1z3T18FtivgRRqjRvVP6VC1/kTxh+Ev+tdAWFFG2i94HqVXMoLSQ5SSUv4KmA=@vger.kernel.org X-Gm-Message-State: AOJu0YxCarJ74WMq6IMdaByljchE6WrWnbPGzyhS99m4mln5ZmgUgAir dmBXWMIKpA3Ft2tQmZpVhwDcFIm6MCAgAPl0xa+ehPeEczngvIiFDoHKXaChmpyjyiaHChWRUeB C9a8V86+SxitBXthzsiqpCikOdTFevZu/A8DqAvofVsQ03mJJZFQdbJzonE4MuCCkv1E= X-Gm-Gg: ATEYQzwpNwG5xuOytY6bgVcMCjXrYVqHI+4XHzKENgpGKcZtKya3pm2fxj6aye6GcFC /BsrJrWzn/tEl7NReheHgLSs+PdqbT/owZTejCWpZ3WqkebEoEYN5wNBbs6TviWR5L6TnAHk/F7 OLLYTH2mKnPvGuLKhUxNnzTu0xZ0rtWGMxrZVMWZFKtVKZ+QV10bj9fen6kZIPs2r17MHffKGdd an/S6HRlkq7VvcX4xU/eB/6eyCyIBCWEIpV/TMKmKfaeuMcsV8yRR1SZdAoSmuJwInm0UhD6Y/H RkAi9dN7lfBMuzU1iQUTZjOoihIye6HAfKrN77vEGZ5qVzKM2Fp2X4OKI3N2Uj4nRUCwD8dwxV9 M5SnP50TCJvuC5MjOIThI03kkQEWqJHD9CULWK4afl6GmA+699QkNnwphJPj33xUFaWJLLq0Aaj tF7QM+O86POY4Ys5qefIwGdDSQRUD6NHsq5eA= X-Received: by 2002:ac8:5816:0:b0:50b:51f7:c660 with SMTP id d75a77b69052e-50b51f7d5c4mr123019821cf.61.1774311080102; Mon, 23 Mar 2026 17:11:20 -0700 (PDT) X-Received: by 2002:ac8:5816:0:b0:50b:51f7:c660 with SMTP id d75a77b69052e-50b51f7d5c4mr123019611cf.61.1774311079591; Mon, 23 Mar 2026 17:11:19 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.11.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:11:16 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:43 +0200 Subject: [PATCH v2 7/9] interconnect: qcom: msm8974: switch to the main icc-rpm driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-7-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=15014; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=ZWpPVJTyGZX5XAzeSYalFLMhBrxegI70Mcl/cCNi2FY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpwdaI3lTenV7zncKDJm5AR0B0kfk6aJMyW0Vb/ yQWMs4Fy5SJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCacHWiAAKCRCLPIo+Aiko 1XVTB/0bDTHNacN143azpIqnrc8H16+x78i0XMXOnVRK/m3N9u4qotwmloqY4Dm40hjy5wzZDFI QY0NjM7Ki/uQySWN1ezJHjluYO40hzY342N5RYF1LJ7Tq60Nfw/wl5R+ixX68AsupAb5yhTS6RU X38EGKu+lX/Jup7624+0LoRUukCVKrfazS+1COcJtxECJF7XFJ0ghzZ9QMdPWBrPUQoTnWatJGo NwNDLPz6ScREQv6kUwv4MchYRBbrFWV+CkpdnNfVDWANJU+utm4PRpBYVNkTHI8GPWgEAQCTY/B BbF9Ei4e22zG2PpoUxsu+8l/TopIU3sEm5dHOFTfn1de/yM5 X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=GIIF0+NK c=1 sm=1 tr=0 ts=69c1d6a9 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=vNxNlsk0RTatv9OKPSEA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfX/vZKZRqcUEos xo4lTraZRmdDF9DZhJteElIVJebJ5aXTon6C5+IEt/Lbvs8LxtMMyJPankJe8RHN/7Pwoa2M/30 rU3RfNBfUbKmIhCiYhQrFEqCJ1z1WKHakgFeb2vjpGcXdFCZc9ZmXclV5nWJ7G/H56xaQdSJAyj J7IxnnMQ4K9UQBc8h3UZOV/7j25mjf5qziBsTmkndHes1MkBKtz/TL/7gwQ7K7M7Hib85/vACJA dXXRy5l3VUzKN/BLYq02vQwB5u6IIGqH1d1Omc2xAZfp4vvBfNwBs606eGTEx8m2hS+ClwXzHwo fgfGI8JBVDKgvvxGCm8ml/PQR7Jw4E0kbEcFj36LIkMOBBdvMnp3j2sqbr3enEsWf0wx3xrEnTE MrVSlmjXWR4VmkSJeBmPFM7XXFf+S3y7xQvpe7zSPrebotQWtclFIxpE0DeGBbBrg6GFVkSAGAF Nge+x3RjSwBuoFOakOA== X-Proofpoint-GUID: ESwC3uK0QcQqUmEjmfkRa3WOqh7CO57b X-Proofpoint-ORIG-GUID: ESwC3uK0QcQqUmEjmfkRa3WOqh7CO57b X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 malwarescore=0 priorityscore=1501 phishscore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 In preparation to restoring the ability of MSM8974 driver to work with the modern kernels, switch the driver to the main icc-rpm set of helper code. As platform-specific workarounds, set the get_bw callback (returning 0) to prevent initial setup from programming INT_MAX into the RPM (which otherwise might hang the platform) and tell RPM programming code to ignore -ENXIO errors from the firmware (until the QoS programming is sorted out). Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- drivers/interconnect/qcom/msm8974.c | 304 +++++---------------------------= ---- 1 file changed, 43 insertions(+), 261 deletions(-) diff --git a/drivers/interconnect/qcom/msm8974.c b/drivers/interconnect/qco= m/msm8974.c index 3239edc37f02..144f225ec885 100644 --- a/drivers/interconnect/qcom/msm8974.c +++ b/drivers/interconnect/qcom/msm8974.c @@ -173,65 +173,27 @@ enum { MSM8974_SNOC_SLV_QDSS_STM, }; =20 -#define to_msm8974_icc_provider(_provider) \ - container_of(_provider, struct msm8974_icc_provider, provider) - -static const struct clk_bulk_data msm8974_icc_bus_clocks[] =3D { - { .id =3D "bus" }, - { .id =3D "bus_a" }, -}; - -/** - * struct msm8974_icc_provider - Qualcomm specific interconnect provider - * @provider: generic interconnect provider - * @bus_clks: the clk_bulk_data table of bus clocks - * @num_clks: the total number of clk_bulk_data entries - */ -struct msm8974_icc_provider { - struct icc_provider provider; - struct clk_bulk_data *bus_clks; - int num_clks; -}; - -#define MSM8974_ICC_MAX_LINKS 3 - -/** - * struct msm8974_icc_node - Qualcomm specific interconnect nodes - * @name: the node name used in debugfs - * @id: a unique node identifier - * @links: an array of nodes where we can go next while traversing - * @num_links: the total number of @links - * @buswidth: width of the interconnect between a node and the bus (bytes) - * @mas_rpm_id: RPM ID for devices that are bus masters - * @slv_rpm_id: RPM ID for devices that are bus slaves - * @rate: current bus clock rate in Hz - */ -struct msm8974_icc_node { - unsigned char *name; - u16 id; - u16 links[MSM8974_ICC_MAX_LINKS]; - u16 num_links; - u16 buswidth; - int mas_rpm_id; - int slv_rpm_id; - u64 rate; -}; +static int msm8974_get_bw(struct icc_node *node, u32 *avg, u32 *peak) +{ + *avg =3D 0; + *peak =3D 0; =20 -struct msm8974_icc_desc { - struct msm8974_icc_node * const *nodes; - size_t num_nodes; + return 0; }; =20 #define DEFINE_QNODE(_name, _id, _buswidth, _mas_rpm_id, _slv_rpm_id, \ ...) \ - static struct msm8974_icc_node _name =3D { \ + static const u16 _name ## _links[] =3D { \ + __VA_ARGS__ \ + }; \ + static struct qcom_icc_node _name =3D { \ .name =3D #_name, \ .id =3D _id, \ .buswidth =3D _buswidth, \ .mas_rpm_id =3D _mas_rpm_id, \ .slv_rpm_id =3D _slv_rpm_id, \ - .num_links =3D COUNT_ARGS(__VA_ARGS__), \ - .links =3D { __VA_ARGS__ }, \ + .num_links =3D ARRAY_SIZE(_name ## _links), \ + .links =3D _name ## _links, \ } =20 DEFINE_QNODE(mas_ampss_m0, MSM8974_BIMC_MAS_AMPSS_M0, 8, 0, -1); @@ -242,7 +204,7 @@ DEFINE_QNODE(bimc_to_snoc, MSM8974_BIMC_TO_SNOC, 8, 3, = 2, MSM8974_SNOC_TO_BIMC, DEFINE_QNODE(slv_ebi_ch0, MSM8974_BIMC_SLV_EBI_CH0, 8, -1, 0); DEFINE_QNODE(slv_ampss_l2, MSM8974_BIMC_SLV_AMPSS_L2, 8, -1, 1); =20 -static struct msm8974_icc_node * const msm8974_bimc_nodes[] =3D { +static struct qcom_icc_node * const msm8974_bimc_nodes[] =3D { [BIMC_MAS_AMPSS_M0] =3D &mas_ampss_m0, [BIMC_MAS_AMPSS_M1] =3D &mas_ampss_m1, [BIMC_MAS_MSS_PROC] =3D &mas_mss_proc, @@ -252,9 +214,12 @@ static struct msm8974_icc_node * const msm8974_bimc_no= des[] =3D { [BIMC_SLV_AMPSS_L2] =3D &slv_ampss_l2, }; =20 -static const struct msm8974_icc_desc msm8974_bimc =3D { +static const struct qcom_icc_desc msm8974_bimc =3D { .nodes =3D msm8974_bimc_nodes, .num_nodes =3D ARRAY_SIZE(msm8974_bimc_nodes), + .bus_clk_desc =3D &bimc_clk, + .get_bw =3D msm8974_get_bw, + .ignore_enxio =3D true, }; =20 DEFINE_QNODE(mas_rpm_inst, MSM8974_CNOC_MAS_RPM_INST, 8, 45, -1); @@ -295,7 +260,7 @@ DEFINE_QNODE(slv_ebi1_phy_cfg, MSM8974_CNOC_SLV_EBI1_PH= Y_CFG, 8, -1, 73); DEFINE_QNODE(slv_rpm, MSM8974_CNOC_SLV_RPM, 8, -1, 74); DEFINE_QNODE(slv_service_cnoc, MSM8974_CNOC_SLV_SERVICE_CNOC, 8, -1, 76); =20 -static struct msm8974_icc_node * const msm8974_cnoc_nodes[] =3D { +static struct qcom_icc_node * const msm8974_cnoc_nodes[] =3D { [CNOC_MAS_RPM_INST] =3D &mas_rpm_inst, [CNOC_MAS_RPM_DATA] =3D &mas_rpm_data, [CNOC_MAS_RPM_SYS] =3D &mas_rpm_sys, @@ -335,9 +300,12 @@ static struct msm8974_icc_node * const msm8974_cnoc_no= des[] =3D { [CNOC_SLV_SERVICE_CNOC] =3D &slv_service_cnoc, }; =20 -static const struct msm8974_icc_desc msm8974_cnoc =3D { +static const struct qcom_icc_desc msm8974_cnoc =3D { .nodes =3D msm8974_cnoc_nodes, .num_nodes =3D ARRAY_SIZE(msm8974_cnoc_nodes), + .bus_clk_desc =3D &bus_2_clk, + .get_bw =3D msm8974_get_bw, + .ignore_enxio =3D true, }; =20 DEFINE_QNODE(mas_graphics_3d, MSM8974_MNOC_MAS_GRAPHICS_3D, 16, 6, -1, MSM= 8974_MNOC_TO_BIMC); @@ -363,7 +331,7 @@ DEFINE_QNODE(slv_mnoc_mpu_cfg, MSM8974_MNOC_SLV_MNOC_MP= U_CFG, 16, -1, 14); DEFINE_QNODE(slv_onoc_mpu_cfg, MSM8974_MNOC_SLV_ONOC_MPU_CFG, 16, -1, 15); DEFINE_QNODE(slv_service_mnoc, MSM8974_MNOC_SLV_SERVICE_MNOC, 16, -1, 17); =20 -static struct msm8974_icc_node * const msm8974_mnoc_nodes[] =3D { +static struct qcom_icc_node * const msm8974_mnoc_nodes[] =3D { [MNOC_MAS_GRAPHICS_3D] =3D &mas_graphics_3d, [MNOC_MAS_JPEG] =3D &mas_jpeg, [MNOC_MAS_MDP_PORT0] =3D &mas_mdp_port0, @@ -388,9 +356,11 @@ static struct msm8974_icc_node * const msm8974_mnoc_no= des[] =3D { [MNOC_SLV_SERVICE_MNOC] =3D &slv_service_mnoc, }; =20 -static const struct msm8974_icc_desc msm8974_mnoc =3D { +static const struct qcom_icc_desc msm8974_mnoc =3D { .nodes =3D msm8974_mnoc_nodes, .num_nodes =3D ARRAY_SIZE(msm8974_mnoc_nodes), + .get_bw =3D msm8974_get_bw, + .ignore_enxio =3D true, }; =20 DEFINE_QNODE(ocmem_noc_to_ocmem_vnoc, MSM8974_OCMEM_NOC_TO_OCMEM_VNOC, 16,= 54, 78, MSM8974_OCMEM_SLV_OCMEM); @@ -408,7 +378,7 @@ DEFINE_QNODE(ocmem_vnoc_to_onoc, MSM8974_OCMEM_VNOC_TO_= OCMEM_NOC, 16, 56, 79, MS DEFINE_QNODE(ocmem_vnoc_to_snoc, MSM8974_OCMEM_VNOC_TO_SNOC, 8, 57, 80); DEFINE_QNODE(mas_v_ocmem_gfx3d, MSM8974_OCMEM_VNOC_MAS_GFX3D, 8, 55, -1, M= SM8974_OCMEM_VNOC_TO_OCMEM_NOC); =20 -static struct msm8974_icc_node * const msm8974_onoc_nodes[] =3D { +static struct qcom_icc_node * const msm8974_onoc_nodes[] =3D { [OCMEM_NOC_TO_OCMEM_VNOC] =3D &ocmem_noc_to_ocmem_vnoc, [OCMEM_MAS_JPEG_OCMEM] =3D &mas_jpeg_ocmem, [OCMEM_MAS_MDP_OCMEM] =3D &mas_mdp_ocmem, @@ -423,9 +393,12 @@ static struct msm8974_icc_node * const msm8974_onoc_no= des[] =3D { [OCMEM_SLV_OCMEM] =3D &slv_ocmem, }; =20 -static const struct msm8974_icc_desc msm8974_onoc =3D { +static const struct qcom_icc_desc msm8974_onoc =3D { .nodes =3D msm8974_onoc_nodes, .num_nodes =3D ARRAY_SIZE(msm8974_onoc_nodes), + .bus_clk_desc =3D &gpu_mem_2_clk, + .get_bw =3D msm8974_get_bw, + .ignore_enxio =3D true, }; =20 DEFINE_QNODE(mas_pnoc_cfg, MSM8974_PNOC_MAS_PNOC_CFG, 8, 43, -1); @@ -456,7 +429,7 @@ DEFINE_QNODE(slv_pnoc_mpu_cfg, MSM8974_PNOC_SLV_PNOC_MP= U_CFG, 8, -1, 43); DEFINE_QNODE(slv_prng, MSM8974_PNOC_SLV_PRNG, 8, -1, 44, MSM8974_PNOC_TO_S= NOC); DEFINE_QNODE(slv_service_pnoc, MSM8974_PNOC_SLV_SERVICE_PNOC, 8, -1, 46); =20 -static struct msm8974_icc_node * const msm8974_pnoc_nodes[] =3D { +static struct qcom_icc_node * const msm8974_pnoc_nodes[] =3D { [PNOC_MAS_PNOC_CFG] =3D &mas_pnoc_cfg, [PNOC_MAS_SDCC_1] =3D &mas_sdcc_1, [PNOC_MAS_SDCC_3] =3D &mas_sdcc_3, @@ -486,9 +459,13 @@ static struct msm8974_icc_node * const msm8974_pnoc_no= des[] =3D { [PNOC_SLV_SERVICE_PNOC] =3D &slv_service_pnoc, }; =20 -static const struct msm8974_icc_desc msm8974_pnoc =3D { +static const struct qcom_icc_desc msm8974_pnoc =3D { .nodes =3D msm8974_pnoc_nodes, .num_nodes =3D ARRAY_SIZE(msm8974_pnoc_nodes), + .bus_clk_desc =3D &bus_0_clk, + .get_bw =3D msm8974_get_bw, + .keep_alive =3D true, + .ignore_enxio =3D true, }; =20 DEFINE_QNODE(mas_lpass_ahb, MSM8974_SNOC_MAS_LPASS_AHB, 8, 18, -1); @@ -516,7 +493,7 @@ DEFINE_QNODE(slv_snoc_ocmem, MSM8974_SNOC_SLV_SNOC_OCME= M, 8, -1, 27); DEFINE_QNODE(slv_service_snoc, MSM8974_SNOC_SLV_SERVICE_SNOC, 8, -1, 29); DEFINE_QNODE(slv_qdss_stm, MSM8974_SNOC_SLV_QDSS_STM, 8, -1, 30); =20 -static struct msm8974_icc_node * const msm8974_snoc_nodes[] =3D { +static struct qcom_icc_node * const msm8974_snoc_nodes[] =3D { [SNOC_MAS_LPASS_AHB] =3D &mas_lpass_ahb, [SNOC_MAS_QDSS_BAM] =3D &mas_qdss_bam, [SNOC_MAS_SNOC_CFG] =3D &mas_snoc_cfg, @@ -543,209 +520,14 @@ static struct msm8974_icc_node * const msm8974_snoc_= nodes[] =3D { [SNOC_SLV_QDSS_STM] =3D &slv_qdss_stm, }; =20 -static const struct msm8974_icc_desc msm8974_snoc =3D { +static const struct qcom_icc_desc msm8974_snoc =3D { .nodes =3D msm8974_snoc_nodes, .num_nodes =3D ARRAY_SIZE(msm8974_snoc_nodes), + .bus_clk_desc =3D &bus_1_clk, + .get_bw =3D msm8974_get_bw, + .ignore_enxio =3D true, }; =20 -static void msm8974_icc_rpm_smd_send(struct device *dev, int rsc_type, - char *name, int id, u64 val) -{ - int ret; - - if (id =3D=3D -1) - return; - - /* - * Setting the bandwidth requests for some nodes fails and this same - * behavior occurs on the downstream MSM 3.4 kernel sources based on - * errors like this in that kernel: - * - * msm_rpm_get_error_from_ack(): RPM NACK Unsupported resource - * AXI: msm_bus_rpm_req(): RPM: Ack failed - * AXI: msm_bus_rpm_commit_arb(): RPM: Req fail: mas:32, bw:240000000 - * - * Since there's no publicly available documentation for this hardware, - * and the bandwidth for some nodes in the path can be set properly, - * let's not return an error. - */ - ret =3D qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE, rsc_type, id, - val); - if (ret) - dev_dbg(dev, "Cannot set bandwidth for node %s (%d): %d\n", - name, id, ret); -} - -static int msm8974_icc_set(struct icc_node *src, struct icc_node *dst) -{ - struct msm8974_icc_node *src_qn, *dst_qn; - struct msm8974_icc_provider *qp; - u64 sum_bw, max_peak_bw, rate; - u32 agg_avg =3D 0, agg_peak =3D 0; - struct icc_provider *provider; - struct icc_node *n; - int ret, i; - - src_qn =3D src->data; - dst_qn =3D dst->data; - provider =3D src->provider; - qp =3D to_msm8974_icc_provider(provider); - - list_for_each_entry(n, &provider->nodes, node_list) - provider->aggregate(n, 0, n->avg_bw, n->peak_bw, - &agg_avg, &agg_peak); - - sum_bw =3D icc_units_to_bps(agg_avg); - max_peak_bw =3D icc_units_to_bps(agg_peak); - - /* Set bandwidth on source node */ - msm8974_icc_rpm_smd_send(provider->dev, RPM_BUS_MASTER_REQ, - src_qn->name, src_qn->mas_rpm_id, sum_bw); - - msm8974_icc_rpm_smd_send(provider->dev, RPM_BUS_SLAVE_REQ, - src_qn->name, src_qn->slv_rpm_id, sum_bw); - - /* Set bandwidth on destination node */ - msm8974_icc_rpm_smd_send(provider->dev, RPM_BUS_MASTER_REQ, - dst_qn->name, dst_qn->mas_rpm_id, sum_bw); - - msm8974_icc_rpm_smd_send(provider->dev, RPM_BUS_SLAVE_REQ, - dst_qn->name, dst_qn->slv_rpm_id, sum_bw); - - rate =3D max(sum_bw, max_peak_bw); - - do_div(rate, src_qn->buswidth); - - rate =3D min_t(u32, rate, INT_MAX); - - if (src_qn->rate =3D=3D rate) - return 0; - - for (i =3D 0; i < qp->num_clks; i++) { - ret =3D clk_set_rate(qp->bus_clks[i].clk, rate); - if (ret) { - dev_err(provider->dev, "%s clk_set_rate error: %d\n", - qp->bus_clks[i].id, ret); - ret =3D 0; - } - } - - src_qn->rate =3D rate; - - return 0; -} - -static int msm8974_get_bw(struct icc_node *node, u32 *avg, u32 *peak) -{ - *avg =3D 0; - *peak =3D 0; - - return 0; -} - -static int msm8974_icc_probe(struct platform_device *pdev) -{ - const struct msm8974_icc_desc *desc; - struct msm8974_icc_node * const *qnodes; - struct msm8974_icc_provider *qp; - struct device *dev =3D &pdev->dev; - struct icc_onecell_data *data; - struct icc_provider *provider; - struct icc_node *node; - size_t num_nodes, i; - int ret; - - /* wait for the RPM proxy */ - if (!qcom_icc_rpm_smd_available()) - return -EPROBE_DEFER; - - desc =3D of_device_get_match_data(dev); - if (!desc) - return -EINVAL; - - qnodes =3D desc->nodes; - num_nodes =3D desc->num_nodes; - - qp =3D devm_kzalloc(dev, sizeof(*qp), GFP_KERNEL); - if (!qp) - return -ENOMEM; - - data =3D devm_kzalloc(dev, struct_size(data, nodes, num_nodes), - GFP_KERNEL); - if (!data) - return -ENOMEM; - data->num_nodes =3D num_nodes; - - qp->bus_clks =3D devm_kmemdup(dev, msm8974_icc_bus_clocks, - sizeof(msm8974_icc_bus_clocks), GFP_KERNEL); - if (!qp->bus_clks) - return -ENOMEM; - - qp->num_clks =3D ARRAY_SIZE(msm8974_icc_bus_clocks); - ret =3D devm_clk_bulk_get(dev, qp->num_clks, qp->bus_clks); - if (ret) - return ret; - - ret =3D clk_bulk_prepare_enable(qp->num_clks, qp->bus_clks); - if (ret) - return ret; - - provider =3D &qp->provider; - provider->dev =3D dev; - provider->set =3D msm8974_icc_set; - provider->aggregate =3D icc_std_aggregate; - provider->xlate =3D of_icc_xlate_onecell; - provider->data =3D data; - provider->get_bw =3D msm8974_get_bw; - - icc_provider_init(provider); - - for (i =3D 0; i < num_nodes; i++) { - size_t j; - - node =3D icc_node_create(qnodes[i]->id); - if (IS_ERR(node)) { - ret =3D PTR_ERR(node); - goto err_remove_nodes; - } - - node->name =3D qnodes[i]->name; - node->data =3D qnodes[i]; - icc_node_add(node, provider); - - dev_dbg(dev, "registered node %s\n", node->name); - - /* populate links */ - for (j =3D 0; j < qnodes[i]->num_links; j++) - icc_link_create(node, qnodes[i]->links[j]); - - data->nodes[i] =3D node; - } - - ret =3D icc_provider_register(provider); - if (ret) - goto err_remove_nodes; - - platform_set_drvdata(pdev, qp); - - return 0; - -err_remove_nodes: - icc_nodes_remove(provider); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); - - return ret; -} - -static void msm8974_icc_remove(struct platform_device *pdev) -{ - struct msm8974_icc_provider *qp =3D platform_get_drvdata(pdev); - - icc_provider_deregister(&qp->provider); - icc_nodes_remove(&qp->provider); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); -} - static const struct of_device_id msm8974_noc_of_match[] =3D { { .compatible =3D "qcom,msm8974-bimc", .data =3D &msm8974_bimc}, { .compatible =3D "qcom,msm8974-cnoc", .data =3D &msm8974_cnoc}, @@ -758,8 +540,8 @@ static const struct of_device_id msm8974_noc_of_match[]= =3D { MODULE_DEVICE_TABLE(of, msm8974_noc_of_match); =20 static struct platform_driver msm8974_noc_driver =3D { - .probe =3D msm8974_icc_probe, - .remove =3D msm8974_icc_remove, + .probe =3D qnoc_probe, + .remove =3D qnoc_remove, .driver =3D { .name =3D "qnoc-msm8974", .of_match_table =3D msm8974_noc_of_match, --=20 2.47.3 From nobody Fri Apr 3 17:50:41 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1FA97234984 for ; Tue, 24 Mar 2026 00:11:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311094; cv=none; b=gorl5lxCrJzx1V+8qupc3vzqoQkYXrVn8g5zlBU0BXNMteMTxbOuRAxS/LcnfJAAzV+ukN+1aUShOEFQNagaUm9HklqvTrOv3VkkNP7ZIq/QIHQ3w9ajHwxwmKxFaTwuLkyR2qyi5+LK6MqvQ/BoXVSMDswzcglC4fREPKNaf0Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311094; c=relaxed/simple; bh=thTbKT7zb2LhTfmvVHxYz+k6KtCKwik28ydRspB/nvU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CjjwpjKBvhl452gbvJlv7EpPgyDvz5R5ni20vnVU5W99HjQh2x9qlATrwgHB6qsjfjO51AJcPyzY49luLkcB9rojxyTnNgehnMlvJ8agSxxSVpOoGmzAzLr7Jp4e5JO9psxqUfBVKCwwvjddjnyE01VSX1q7OF3zGBy6oUsIj3A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=W+lHq+PP; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=QHzDio5G; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="W+lHq+PP"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="QHzDio5G" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NHqdmU3170748 for ; Tue, 24 Mar 2026 00:11:26 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= hhddJ5kzAwXmgYNZiN6SZ9YORt+zj9k6BZUbI0WSf7c=; b=W+lHq+PPTc8C3Cy5 UJigw8jXEaVrAmLvcErw6PTsCSzhf49VA1ccyId0Ytnc9qpPLgveTzkSfAfQV29s M+rtU0fdjt739jaZDC9YEaE0qe1DW6NiR4fSk6uP8tHAykujUQ977pKEYU7/O7xE 1OHD18z8qBaDBNsiLf4YnmLaRwmPwcyXaFscz/g6FF3A4jHlK59HNw+ArpFWMK2Y OkVGeCv6iLdglZD/9Rsa21Fw535/Uoixl+Dg4soBYn3/xrxOv2ZMb6bir+wbosxl VNUaA8nyJefkkIKSHTQPwKffdJ5R6s23mMSBnud+AFoBZJqq7L4smgJVHIzXWfA5 1QCgoA== Received: from mail-qt1-f197.google.com (mail-qt1-f197.google.com [209.85.160.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d35r226t0-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:11:25 +0000 (GMT) Received: by mail-qt1-f197.google.com with SMTP id d75a77b69052e-5093b92f327so351986351cf.1 for ; Mon, 23 Mar 2026 17:11:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311085; x=1774915885; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hhddJ5kzAwXmgYNZiN6SZ9YORt+zj9k6BZUbI0WSf7c=; b=QHzDio5GAlmeQIWSUTu0ssr2vQTEut7y534tFyoceyXWLEqxAQ+Cd4FpQIM4Y5vb3M 4y8r7ADGvSNjK+hRtYe2LpREYb3i67jXB1K0gmMNuA/RGFtrkixGIBLmBbGnfmh3FziQ 6L/wQXtow7tnBwYQ7PcfcZsCoSBao92xgTSUHArS3RrqWOuYoRcCvaDrrWiuwKvHzwv/ udgE9gkvS+rckf0VcFm3JsbijNiTJFK635hwMEPlZVGQp+gOwlCtmjjKQjGVODSKF4eC IuHnIIEm3kZDgv3HoCniFT+bt8YHWwrM/PtPrjxh0+9boDrLC01TGlD5chQ0k9l77D4Y JvPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311085; x=1774915885; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=hhddJ5kzAwXmgYNZiN6SZ9YORt+zj9k6BZUbI0WSf7c=; b=aWiBcN3miLwZtOFjaBMbXEJ/MTe9oD5qQ29mI3byqArGirqUfR3V0c9a5ACxQ3Mpt7 rNsJ9ocV5cRc33TzWvwHb0OuofAaNJtfYxu0iHkcB54kbGIhx8xmNbfk2qFLqnqYvcBo lxX6Zdaw/97oaM0pf/UGHm6SJ2BZSNX1BtsHGvlHNoEgFPWENegrR4eWI5FvMDshWHrL vU/14BxTq0Y105bW4UoMejzZp4rLup0yo3E2SZwwC1HxF9/2KBYKQ+Y/iHxxD/+W6Ebu ETE31/34v+2e6fd9aYpnKwXV1II6tduBzNN5d6j6pll9j8YWfemYtPvL4N59rJAGYkJ4 7OBA== X-Forwarded-Encrypted: i=1; AJvYcCVQ9RswIknSlqzR9n/qiRQhtWmj1Z5EOkrPlki9nUnXLTVQHf5OdkmOLm/7NXq/8tvlfgwK7zjOa8+xo1U=@vger.kernel.org X-Gm-Message-State: AOJu0Yz8QuDaSgNdun9bW3GfqHbmu0oMXmSdd87/eIX5/TacAzSgk7uE BYMTmI6+0p+skVtd/08BBd0FS2AQukwkbsgrwFu2kZRiQ00OOfv/LwpvvzQaOgxwVd1LmYAZmcr MNlWQ6/0QSjic6DcPN8QTIV1czDbP8n4BjjJ1BoZ5lkZ5uxVyJrRK/YwGju7iulxswJ8= X-Gm-Gg: ATEYQzzkO3HYjMxZlDZ92QKKtDtds3ayEcxErVIIizTaoZfP/PpcooOuSzK7vu7Mcwh zJY+9kiJxanBIG+ge7Sd8vBpdcpy5H14tBJiZUIB1aveJtKqZGYzojw8s8LPoFfo8gi4O/4cpH8 VvqGyjYJ5Qvm+N2QS0i5tTb8ETBaTx7x2r2XEFPGRw6iEbiM5QDZGHsGj9SOS/v1h4nqxFg5BUe Hu2kU+IQnGdZbqrQHiNhv3kShfwEK39Y/7Oxuc+iiWmdcGnm0niRmchp/CA09Bn/VnPvcemJbpi w45xuuiRZ3YJjyqKZ/fAM3VbGcMVb4azzuO58c/1d+6VChXjn35Dso6jJw5KK04ua43qGZMLZBf 7jOb266ozeC5sx5RJMCzYqIGiaVQDpI8wiC8MKzRVGdIcOcbhSbiSqLU6Y7jY2R7WAavD1O5IQ4 RBOYmG/nZdc3VsOq9lcXLSg0YfBg60/8VSlUA= X-Received: by 2002:a05:622a:4a07:b0:509:2053:ab60 with SMTP id d75a77b69052e-50b3753db18mr213490511cf.47.1774311084538; Mon, 23 Mar 2026 17:11:24 -0700 (PDT) X-Received: by 2002:a05:622a:4a07:b0:509:2053:ab60 with SMTP id d75a77b69052e-50b3753db18mr213490171cf.47.1774311083916; Mon, 23 Mar 2026 17:11:23 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.11.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:11:21 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:44 +0200 Subject: [PATCH v2 8/9] interconnect: qcom: msm8974: expand DEFINE_QNODE macros Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-8-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=39625; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=thTbKT7zb2LhTfmvVHxYz+k6KtCKwik28ydRspB/nvU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpwdaIYM5vAsl7jmE5EbmoMnOGCTZYnEEIDdYZQ wMijuzvEJWJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCacHWiAAKCRCLPIo+Aiko 1VviCACSnS4v4ftw36RVz+61g4LA9ULPrZSeNh3SSwuziB5iiexMAzk/XF8GmFugtZXs5N8QHi3 Gb+Q+p2huu4wF4qRlG5y7W3XTKS1WoYKLTNrX5mqj/i0v9Vtb5QXN3DDCYyx2Byk9Z+4X0H1/lJ lv4atvxZ2kFVufln2YYTILl4iXeLkgPoybeQod931oF+vwL3yu92/Bko3nW/S5r8OaxBae4zlM8 PjNk0Pun15rMfojBWUyuYtWowZnx+HOUrn6CR0LInu8IOG5RlevsQm4G1Z92KeFLS1WqXttxqBH SGDkhEaoLBQurDXKRjc1l7JnOgemybVyg3u7+tr1K5CFCFHn X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=VvUuwu2n c=1 sm=1 tr=0 ts=69c1d6ad cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=gU3Gd9FrbIblE3rB6ncA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-GUID: EQHw-pzRa04MgqI46wuQ5wmrV-iL-uao X-Proofpoint-ORIG-GUID: EQHw-pzRa04MgqI46wuQ5wmrV-iL-uao X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfXyONzfmtIwxcb HmNXHSCRtesESKtAHSkUyz+88HhDffKI7DqmC8uYhH3TPg6/8VcA6tDVT6woX1uRT1YI1oGdaVa LcBhhe8Gf1vT01k08udmn0PkZYdoE5jWfKmV63/kbrEwll918MFzhBWSy1WtskTaVc/dNrUQUsc RQGeDCG1cuKFrvJrQgdGRQcc7U18Aay/2PWogQdc9l0/3DF83WW3Imq8So4uyKZy5cbjaJST7Lu IokEYtn/VHnrwxY0vKQRPYCT4NBK5DrHVZ8ENnD/LAA3UIDDQcJ8FWUcgt0EkM0GURPYgC1G+KT o/pszR1FmrRrRCsl0Z85/5/DfT5ylwcSKB9GY+6FPocB15hG6z2/5RZiNhEvZTe1tGLkd+9OfB5 G9k+pi4mnkAVRQZSjWoqVxFT2jJQSeJ33DKgHQCuaQpeJjzCkgAL0HLA9sx2Vjrlw9Oy+1x/v5d lbJNlBpZ84nqUr+3aXw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 spamscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 The rest of Qualcomm Interconnect drivers have stopped using DEFINE_QNODE long ago for the sake of readability. Stop using it inside the msm8974 interconnect driver too. Acked-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- drivers/interconnect/qcom/msm8974.c | 1335 +++++++++++++++++++++++++++++++= ---- 1 file changed, 1191 insertions(+), 144 deletions(-) diff --git a/drivers/interconnect/qcom/msm8974.c b/drivers/interconnect/qco= m/msm8974.c index 144f225ec885..c020c61126ca 100644 --- a/drivers/interconnect/qcom/msm8974.c +++ b/drivers/interconnect/qcom/msm8974.c @@ -181,28 +181,75 @@ static int msm8974_get_bw(struct icc_node *node, u32 = *avg, u32 *peak) return 0; }; =20 -#define DEFINE_QNODE(_name, _id, _buswidth, _mas_rpm_id, _slv_rpm_id, \ - ...) \ - static const u16 _name ## _links[] =3D { \ - __VA_ARGS__ \ - }; \ - static struct qcom_icc_node _name =3D { \ - .name =3D #_name, \ - .id =3D _id, \ - .buswidth =3D _buswidth, \ - .mas_rpm_id =3D _mas_rpm_id, \ - .slv_rpm_id =3D _slv_rpm_id, \ - .num_links =3D ARRAY_SIZE(_name ## _links), \ - .links =3D _name ## _links, \ - } - -DEFINE_QNODE(mas_ampss_m0, MSM8974_BIMC_MAS_AMPSS_M0, 8, 0, -1); -DEFINE_QNODE(mas_ampss_m1, MSM8974_BIMC_MAS_AMPSS_M1, 8, 0, -1); -DEFINE_QNODE(mas_mss_proc, MSM8974_BIMC_MAS_MSS_PROC, 8, 1, -1); -DEFINE_QNODE(bimc_to_mnoc, MSM8974_BIMC_TO_MNOC, 8, 2, -1, MSM8974_BIMC_SL= V_EBI_CH0); -DEFINE_QNODE(bimc_to_snoc, MSM8974_BIMC_TO_SNOC, 8, 3, 2, MSM8974_SNOC_TO_= BIMC, MSM8974_BIMC_SLV_EBI_CH0, MSM8974_BIMC_MAS_AMPSS_M0); -DEFINE_QNODE(slv_ebi_ch0, MSM8974_BIMC_SLV_EBI_CH0, 8, -1, 0); -DEFINE_QNODE(slv_ampss_l2, MSM8974_BIMC_SLV_AMPSS_L2, 8, -1, 1); +static struct qcom_icc_node mas_ampss_m0 =3D { + .name =3D "mas_ampss_m0", + .id =3D MSM8974_BIMC_MAS_AMPSS_M0, + .buswidth =3D 8, + .mas_rpm_id =3D 0, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_ampss_m1 =3D { + .name =3D "mas_ampss_m1", + .id =3D MSM8974_BIMC_MAS_AMPSS_M1, + .buswidth =3D 8, + .mas_rpm_id =3D 0, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_mss_proc =3D { + .name =3D "mas_mss_proc", + .id =3D MSM8974_BIMC_MAS_MSS_PROC, + .buswidth =3D 8, + .mas_rpm_id =3D 1, + .slv_rpm_id =3D -1, +}; + +static const u16 bimc_to_mnoc_links[] =3D { + MSM8974_BIMC_SLV_EBI_CH0 +}; + +static struct qcom_icc_node bimc_to_mnoc =3D { + .name =3D "bimc_to_mnoc", + .id =3D MSM8974_BIMC_TO_MNOC, + .buswidth =3D 8, + .mas_rpm_id =3D 2, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(bimc_to_mnoc_links), + .links =3D bimc_to_mnoc_links, +}; + +static const u16 bimc_to_snoc_links[] =3D { + MSM8974_SNOC_TO_BIMC, + MSM8974_BIMC_SLV_EBI_CH0, + MSM8974_BIMC_MAS_AMPSS_M0 +}; + +static struct qcom_icc_node bimc_to_snoc =3D { + .name =3D "bimc_to_snoc", + .id =3D MSM8974_BIMC_TO_SNOC, + .buswidth =3D 8, + .mas_rpm_id =3D 3, + .slv_rpm_id =3D 2, + .num_links =3D ARRAY_SIZE(bimc_to_snoc_links), + .links =3D bimc_to_snoc_links, +}; + +static struct qcom_icc_node slv_ebi_ch0 =3D { + .name =3D "slv_ebi_ch0", + .id =3D MSM8974_BIMC_SLV_EBI_CH0, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 0, +}; + +static struct qcom_icc_node slv_ampss_l2 =3D { + .name =3D "slv_ampss_l2", + .id =3D MSM8974_BIMC_SLV_AMPSS_L2, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 1, +}; =20 static struct qcom_icc_node * const msm8974_bimc_nodes[] =3D { [BIMC_MAS_AMPSS_M0] =3D &mas_ampss_m0, @@ -222,43 +269,301 @@ static const struct qcom_icc_desc msm8974_bimc =3D { .ignore_enxio =3D true, }; =20 -DEFINE_QNODE(mas_rpm_inst, MSM8974_CNOC_MAS_RPM_INST, 8, 45, -1); -DEFINE_QNODE(mas_rpm_data, MSM8974_CNOC_MAS_RPM_DATA, 8, 46, -1); -DEFINE_QNODE(mas_rpm_sys, MSM8974_CNOC_MAS_RPM_SYS, 8, 47, -1); -DEFINE_QNODE(mas_dehr, MSM8974_CNOC_MAS_DEHR, 8, 48, -1); -DEFINE_QNODE(mas_qdss_dap, MSM8974_CNOC_MAS_QDSS_DAP, 8, 49, -1); -DEFINE_QNODE(mas_spdm, MSM8974_CNOC_MAS_SPDM, 8, 50, -1); -DEFINE_QNODE(mas_tic, MSM8974_CNOC_MAS_TIC, 8, 51, -1); -DEFINE_QNODE(slv_clk_ctl, MSM8974_CNOC_SLV_CLK_CTL, 8, -1, 47); -DEFINE_QNODE(slv_cnoc_mss, MSM8974_CNOC_SLV_CNOC_MSS, 8, -1, 48); -DEFINE_QNODE(slv_security, MSM8974_CNOC_SLV_SECURITY, 8, -1, 49); -DEFINE_QNODE(slv_tcsr, MSM8974_CNOC_SLV_TCSR, 8, -1, 50); -DEFINE_QNODE(slv_tlmm, MSM8974_CNOC_SLV_TLMM, 8, -1, 51); -DEFINE_QNODE(slv_crypto_0_cfg, MSM8974_CNOC_SLV_CRYPTO_0_CFG, 8, -1, 52); -DEFINE_QNODE(slv_crypto_1_cfg, MSM8974_CNOC_SLV_CRYPTO_1_CFG, 8, -1, 53); -DEFINE_QNODE(slv_imem_cfg, MSM8974_CNOC_SLV_IMEM_CFG, 8, -1, 54); -DEFINE_QNODE(slv_message_ram, MSM8974_CNOC_SLV_MESSAGE_RAM, 8, -1, 55); -DEFINE_QNODE(slv_bimc_cfg, MSM8974_CNOC_SLV_BIMC_CFG, 8, -1, 56); -DEFINE_QNODE(slv_boot_rom, MSM8974_CNOC_SLV_BOOT_ROM, 8, -1, 57); -DEFINE_QNODE(slv_pmic_arb, MSM8974_CNOC_SLV_PMIC_ARB, 8, -1, 59); -DEFINE_QNODE(slv_spdm_wrapper, MSM8974_CNOC_SLV_SPDM_WRAPPER, 8, -1, 60); -DEFINE_QNODE(slv_dehr_cfg, MSM8974_CNOC_SLV_DEHR_CFG, 8, -1, 61); -DEFINE_QNODE(slv_mpm, MSM8974_CNOC_SLV_MPM, 8, -1, 62); -DEFINE_QNODE(slv_qdss_cfg, MSM8974_CNOC_SLV_QDSS_CFG, 8, -1, 63); -DEFINE_QNODE(slv_rbcpr_cfg, MSM8974_CNOC_SLV_RBCPR_CFG, 8, -1, 64); -DEFINE_QNODE(slv_rbcpr_qdss_apu_cfg, MSM8974_CNOC_SLV_RBCPR_QDSS_APU_CFG, = 8, -1, 65); -DEFINE_QNODE(cnoc_to_snoc, MSM8974_CNOC_TO_SNOC, 8, 52, 75); -DEFINE_QNODE(slv_cnoc_onoc_cfg, MSM8974_CNOC_SLV_CNOC_ONOC_CFG, 8, -1, 68); -DEFINE_QNODE(slv_cnoc_mnoc_mmss_cfg, MSM8974_CNOC_SLV_CNOC_MNOC_MMSS_CFG, = 8, -1, 58); -DEFINE_QNODE(slv_cnoc_mnoc_cfg, MSM8974_CNOC_SLV_CNOC_MNOC_CFG, 8, -1, 66); -DEFINE_QNODE(slv_pnoc_cfg, MSM8974_CNOC_SLV_PNOC_CFG, 8, -1, 69); -DEFINE_QNODE(slv_snoc_mpu_cfg, MSM8974_CNOC_SLV_SNOC_MPU_CFG, 8, -1, 67); -DEFINE_QNODE(slv_snoc_cfg, MSM8974_CNOC_SLV_SNOC_CFG, 8, -1, 70); -DEFINE_QNODE(slv_ebi1_dll_cfg, MSM8974_CNOC_SLV_EBI1_DLL_CFG, 8, -1, 71); -DEFINE_QNODE(slv_phy_apu_cfg, MSM8974_CNOC_SLV_PHY_APU_CFG, 8, -1, 72); -DEFINE_QNODE(slv_ebi1_phy_cfg, MSM8974_CNOC_SLV_EBI1_PHY_CFG, 8, -1, 73); -DEFINE_QNODE(slv_rpm, MSM8974_CNOC_SLV_RPM, 8, -1, 74); -DEFINE_QNODE(slv_service_cnoc, MSM8974_CNOC_SLV_SERVICE_CNOC, 8, -1, 76); +static struct qcom_icc_node mas_rpm_inst =3D { + .name =3D "mas_rpm_inst", + .id =3D MSM8974_CNOC_MAS_RPM_INST, + .buswidth =3D 8, + .mas_rpm_id =3D 45, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_rpm_data =3D { + .name =3D "mas_rpm_data", + .id =3D MSM8974_CNOC_MAS_RPM_DATA, + .buswidth =3D 8, + .mas_rpm_id =3D 46, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_rpm_sys =3D { + .name =3D "mas_rpm_sys", + .id =3D MSM8974_CNOC_MAS_RPM_SYS, + .buswidth =3D 8, + .mas_rpm_id =3D 47, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_dehr =3D { + .name =3D "mas_dehr", + .id =3D MSM8974_CNOC_MAS_DEHR, + .buswidth =3D 8, + .mas_rpm_id =3D 48, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_qdss_dap =3D { + .name =3D "mas_qdss_dap", + .id =3D MSM8974_CNOC_MAS_QDSS_DAP, + .buswidth =3D 8, + .mas_rpm_id =3D 49, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_spdm =3D { + .name =3D "mas_spdm", + .id =3D MSM8974_CNOC_MAS_SPDM, + .buswidth =3D 8, + .mas_rpm_id =3D 50, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_tic =3D { + .name =3D "mas_tic", + .id =3D MSM8974_CNOC_MAS_TIC, + .buswidth =3D 8, + .mas_rpm_id =3D 51, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node slv_clk_ctl =3D { + .name =3D "slv_clk_ctl", + .id =3D MSM8974_CNOC_SLV_CLK_CTL, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 47, +}; + +static struct qcom_icc_node slv_cnoc_mss =3D { + .name =3D "slv_cnoc_mss", + .id =3D MSM8974_CNOC_SLV_CNOC_MSS, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 48, +}; + +static struct qcom_icc_node slv_security =3D { + .name =3D "slv_security", + .id =3D MSM8974_CNOC_SLV_SECURITY, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 49, +}; + +static struct qcom_icc_node slv_tcsr =3D { + .name =3D "slv_tcsr", + .id =3D MSM8974_CNOC_SLV_TCSR, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 50, +}; + +static struct qcom_icc_node slv_tlmm =3D { + .name =3D "slv_tlmm", + .id =3D MSM8974_CNOC_SLV_TLMM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 51, +}; + +static struct qcom_icc_node slv_crypto_0_cfg =3D { + .name =3D "slv_crypto_0_cfg", + .id =3D MSM8974_CNOC_SLV_CRYPTO_0_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 52, +}; + +static struct qcom_icc_node slv_crypto_1_cfg =3D { + .name =3D "slv_crypto_1_cfg", + .id =3D MSM8974_CNOC_SLV_CRYPTO_1_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 53, +}; + +static struct qcom_icc_node slv_imem_cfg =3D { + .name =3D "slv_imem_cfg", + .id =3D MSM8974_CNOC_SLV_IMEM_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 54, +}; + +static struct qcom_icc_node slv_message_ram =3D { + .name =3D "slv_message_ram", + .id =3D MSM8974_CNOC_SLV_MESSAGE_RAM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 55, +}; + +static struct qcom_icc_node slv_bimc_cfg =3D { + .name =3D "slv_bimc_cfg", + .id =3D MSM8974_CNOC_SLV_BIMC_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 56, +}; + +static struct qcom_icc_node slv_boot_rom =3D { + .name =3D "slv_boot_rom", + .id =3D MSM8974_CNOC_SLV_BOOT_ROM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 57, +}; + +static struct qcom_icc_node slv_pmic_arb =3D { + .name =3D "slv_pmic_arb", + .id =3D MSM8974_CNOC_SLV_PMIC_ARB, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 59, +}; + +static struct qcom_icc_node slv_spdm_wrapper =3D { + .name =3D "slv_spdm_wrapper", + .id =3D MSM8974_CNOC_SLV_SPDM_WRAPPER, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 60, +}; + +static struct qcom_icc_node slv_dehr_cfg =3D { + .name =3D "slv_dehr_cfg", + .id =3D MSM8974_CNOC_SLV_DEHR_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 61, +}; + +static struct qcom_icc_node slv_mpm =3D { + .name =3D "slv_mpm", + .id =3D MSM8974_CNOC_SLV_MPM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 62, +}; + +static struct qcom_icc_node slv_qdss_cfg =3D { + .name =3D "slv_qdss_cfg", + .id =3D MSM8974_CNOC_SLV_QDSS_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 63, +}; + +static struct qcom_icc_node slv_rbcpr_cfg =3D { + .name =3D "slv_rbcpr_cfg", + .id =3D MSM8974_CNOC_SLV_RBCPR_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 64, +}; + +static struct qcom_icc_node slv_rbcpr_qdss_apu_cfg =3D { + .name =3D "slv_rbcpr_qdss_apu_cfg", + .id =3D MSM8974_CNOC_SLV_RBCPR_QDSS_APU_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 65, +}; + +static struct qcom_icc_node cnoc_to_snoc =3D { + .name =3D "cnoc_to_snoc", + .id =3D MSM8974_CNOC_TO_SNOC, + .buswidth =3D 8, + .mas_rpm_id =3D 52, + .slv_rpm_id =3D 75, +}; + +static struct qcom_icc_node slv_cnoc_onoc_cfg =3D { + .name =3D "slv_cnoc_onoc_cfg", + .id =3D MSM8974_CNOC_SLV_CNOC_ONOC_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 68, +}; + +static struct qcom_icc_node slv_cnoc_mnoc_mmss_cfg =3D { + .name =3D "slv_cnoc_mnoc_mmss_cfg", + .id =3D MSM8974_CNOC_SLV_CNOC_MNOC_MMSS_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 58, +}; + +static struct qcom_icc_node slv_cnoc_mnoc_cfg =3D { + .name =3D "slv_cnoc_mnoc_cfg", + .id =3D MSM8974_CNOC_SLV_CNOC_MNOC_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 66, +}; + +static struct qcom_icc_node slv_pnoc_cfg =3D { + .name =3D "slv_pnoc_cfg", + .id =3D MSM8974_CNOC_SLV_PNOC_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 69, +}; + +static struct qcom_icc_node slv_snoc_mpu_cfg =3D { + .name =3D "slv_snoc_mpu_cfg", + .id =3D MSM8974_CNOC_SLV_SNOC_MPU_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 67, +}; + +static struct qcom_icc_node slv_snoc_cfg =3D { + .name =3D "slv_snoc_cfg", + .id =3D MSM8974_CNOC_SLV_SNOC_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 70, +}; + +static struct qcom_icc_node slv_ebi1_dll_cfg =3D { + .name =3D "slv_ebi1_dll_cfg", + .id =3D MSM8974_CNOC_SLV_EBI1_DLL_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 71, +}; + +static struct qcom_icc_node slv_phy_apu_cfg =3D { + .name =3D "slv_phy_apu_cfg", + .id =3D MSM8974_CNOC_SLV_PHY_APU_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 72, +}; + +static struct qcom_icc_node slv_ebi1_phy_cfg =3D { + .name =3D "slv_ebi1_phy_cfg", + .id =3D MSM8974_CNOC_SLV_EBI1_PHY_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 73, +}; + +static struct qcom_icc_node slv_rpm =3D { + .name =3D "slv_rpm", + .id =3D MSM8974_CNOC_SLV_RPM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 74, +}; + +static struct qcom_icc_node slv_service_cnoc =3D { + .name =3D "slv_service_cnoc", + .id =3D MSM8974_CNOC_SLV_SERVICE_CNOC, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 76, +}; =20 static struct qcom_icc_node * const msm8974_cnoc_nodes[] =3D { [CNOC_MAS_RPM_INST] =3D &mas_rpm_inst, @@ -308,28 +613,211 @@ static const struct qcom_icc_desc msm8974_cnoc =3D { .ignore_enxio =3D true, }; =20 -DEFINE_QNODE(mas_graphics_3d, MSM8974_MNOC_MAS_GRAPHICS_3D, 16, 6, -1, MSM= 8974_MNOC_TO_BIMC); -DEFINE_QNODE(mas_jpeg, MSM8974_MNOC_MAS_JPEG, 16, 7, -1, MSM8974_MNOC_TO_B= IMC); -DEFINE_QNODE(mas_mdp_port0, MSM8974_MNOC_MAS_MDP_PORT0, 16, 8, -1, MSM8974= _MNOC_TO_BIMC); -DEFINE_QNODE(mas_video_p0, MSM8974_MNOC_MAS_VIDEO_P0, 16, 9, -1); -DEFINE_QNODE(mas_video_p1, MSM8974_MNOC_MAS_VIDEO_P1, 16, 10, -1); -DEFINE_QNODE(mas_vfe, MSM8974_MNOC_MAS_VFE, 16, 11, -1, MSM8974_MNOC_TO_BI= MC); -DEFINE_QNODE(mnoc_to_cnoc, MSM8974_MNOC_TO_CNOC, 16, 4, -1); -DEFINE_QNODE(mnoc_to_bimc, MSM8974_MNOC_TO_BIMC, 16, -1, 16, MSM8974_BIMC_= TO_MNOC); -DEFINE_QNODE(slv_camera_cfg, MSM8974_MNOC_SLV_CAMERA_CFG, 16, -1, 3); -DEFINE_QNODE(slv_display_cfg, MSM8974_MNOC_SLV_DISPLAY_CFG, 16, -1, 4); -DEFINE_QNODE(slv_ocmem_cfg, MSM8974_MNOC_SLV_OCMEM_CFG, 16, -1, 5); -DEFINE_QNODE(slv_cpr_cfg, MSM8974_MNOC_SLV_CPR_CFG, 16, -1, 6); -DEFINE_QNODE(slv_cpr_xpu_cfg, MSM8974_MNOC_SLV_CPR_XPU_CFG, 16, -1, 7); -DEFINE_QNODE(slv_misc_cfg, MSM8974_MNOC_SLV_MISC_CFG, 16, -1, 8); -DEFINE_QNODE(slv_misc_xpu_cfg, MSM8974_MNOC_SLV_MISC_XPU_CFG, 16, -1, 9); -DEFINE_QNODE(slv_venus_cfg, MSM8974_MNOC_SLV_VENUS_CFG, 16, -1, 10); -DEFINE_QNODE(slv_graphics_3d_cfg, MSM8974_MNOC_SLV_GRAPHICS_3D_CFG, 16, -1= , 11); -DEFINE_QNODE(slv_mmss_clk_cfg, MSM8974_MNOC_SLV_MMSS_CLK_CFG, 16, -1, 12); -DEFINE_QNODE(slv_mmss_clk_xpu_cfg, MSM8974_MNOC_SLV_MMSS_CLK_XPU_CFG, 16, = -1, 13); -DEFINE_QNODE(slv_mnoc_mpu_cfg, MSM8974_MNOC_SLV_MNOC_MPU_CFG, 16, -1, 14); -DEFINE_QNODE(slv_onoc_mpu_cfg, MSM8974_MNOC_SLV_ONOC_MPU_CFG, 16, -1, 15); -DEFINE_QNODE(slv_service_mnoc, MSM8974_MNOC_SLV_SERVICE_MNOC, 16, -1, 17); +static const u16 mas_graphics_3d_links[] =3D { + MSM8974_MNOC_TO_BIMC +}; + +static struct qcom_icc_node mas_graphics_3d =3D { + .name =3D "mas_graphics_3d", + .id =3D MSM8974_MNOC_MAS_GRAPHICS_3D, + .buswidth =3D 16, + .mas_rpm_id =3D 6, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_graphics_3d_links), + .links =3D mas_graphics_3d_links, +}; + +static const u16 mas_jpeg_links[] =3D { + MSM8974_MNOC_TO_BIMC +}; + +static struct qcom_icc_node mas_jpeg =3D { + .name =3D "mas_jpeg", + .id =3D MSM8974_MNOC_MAS_JPEG, + .buswidth =3D 16, + .mas_rpm_id =3D 7, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_jpeg_links), + .links =3D mas_jpeg_links, +}; + +static const u16 mas_mdp_port0_links[] =3D { + MSM8974_MNOC_TO_BIMC +}; + +static struct qcom_icc_node mas_mdp_port0 =3D { + .name =3D "mas_mdp_port0", + .id =3D MSM8974_MNOC_MAS_MDP_PORT0, + .buswidth =3D 16, + .mas_rpm_id =3D 8, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_mdp_port0_links), + .links =3D mas_mdp_port0_links, +}; + +static struct qcom_icc_node mas_video_p0 =3D { + .name =3D "mas_video_p0", + .id =3D MSM8974_MNOC_MAS_VIDEO_P0, + .buswidth =3D 16, + .mas_rpm_id =3D 9, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_video_p1 =3D { + .name =3D "mas_video_p1", + .id =3D MSM8974_MNOC_MAS_VIDEO_P1, + .buswidth =3D 16, + .mas_rpm_id =3D 10, + .slv_rpm_id =3D -1, +}; + +static const u16 mas_vfe_links[] =3D { + MSM8974_MNOC_TO_BIMC +}; + +static struct qcom_icc_node mas_vfe =3D { + .name =3D "mas_vfe", + .id =3D MSM8974_MNOC_MAS_VFE, + .buswidth =3D 16, + .mas_rpm_id =3D 11, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_vfe_links), + .links =3D mas_vfe_links, +}; + +static struct qcom_icc_node mnoc_to_cnoc =3D { + .name =3D "mnoc_to_cnoc", + .id =3D MSM8974_MNOC_TO_CNOC, + .buswidth =3D 16, + .mas_rpm_id =3D 4, + .slv_rpm_id =3D -1, +}; + +static const u16 mnoc_to_bimc_links[] =3D { + MSM8974_BIMC_TO_MNOC +}; + +static struct qcom_icc_node mnoc_to_bimc =3D { + .name =3D "mnoc_to_bimc", + .id =3D MSM8974_MNOC_TO_BIMC, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 16, + .num_links =3D ARRAY_SIZE(mnoc_to_bimc_links), + .links =3D mnoc_to_bimc_links, +}; + +static struct qcom_icc_node slv_camera_cfg =3D { + .name =3D "slv_camera_cfg", + .id =3D MSM8974_MNOC_SLV_CAMERA_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 3, +}; + +static struct qcom_icc_node slv_display_cfg =3D { + .name =3D "slv_display_cfg", + .id =3D MSM8974_MNOC_SLV_DISPLAY_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 4, +}; + +static struct qcom_icc_node slv_ocmem_cfg =3D { + .name =3D "slv_ocmem_cfg", + .id =3D MSM8974_MNOC_SLV_OCMEM_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 5, +}; + +static struct qcom_icc_node slv_cpr_cfg =3D { + .name =3D "slv_cpr_cfg", + .id =3D MSM8974_MNOC_SLV_CPR_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 6, +}; + +static struct qcom_icc_node slv_cpr_xpu_cfg =3D { + .name =3D "slv_cpr_xpu_cfg", + .id =3D MSM8974_MNOC_SLV_CPR_XPU_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 7, +}; + +static struct qcom_icc_node slv_misc_cfg =3D { + .name =3D "slv_misc_cfg", + .id =3D MSM8974_MNOC_SLV_MISC_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 8, +}; + +static struct qcom_icc_node slv_misc_xpu_cfg =3D { + .name =3D "slv_misc_xpu_cfg", + .id =3D MSM8974_MNOC_SLV_MISC_XPU_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 9, +}; + +static struct qcom_icc_node slv_venus_cfg =3D { + .name =3D "slv_venus_cfg", + .id =3D MSM8974_MNOC_SLV_VENUS_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 10, +}; + +static struct qcom_icc_node slv_graphics_3d_cfg =3D { + .name =3D "slv_graphics_3d_cfg", + .id =3D MSM8974_MNOC_SLV_GRAPHICS_3D_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 11, +}; + +static struct qcom_icc_node slv_mmss_clk_cfg =3D { + .name =3D "slv_mmss_clk_cfg", + .id =3D MSM8974_MNOC_SLV_MMSS_CLK_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 12, +}; + +static struct qcom_icc_node slv_mmss_clk_xpu_cfg =3D { + .name =3D "slv_mmss_clk_xpu_cfg", + .id =3D MSM8974_MNOC_SLV_MMSS_CLK_XPU_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 13, +}; + +static struct qcom_icc_node slv_mnoc_mpu_cfg =3D { + .name =3D "slv_mnoc_mpu_cfg", + .id =3D MSM8974_MNOC_SLV_MNOC_MPU_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 14, +}; + +static struct qcom_icc_node slv_onoc_mpu_cfg =3D { + .name =3D "slv_onoc_mpu_cfg", + .id =3D MSM8974_MNOC_SLV_ONOC_MPU_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 15, +}; + +static struct qcom_icc_node slv_service_mnoc =3D { + .name =3D "slv_service_mnoc", + .id =3D MSM8974_MNOC_SLV_SERVICE_MNOC, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 17, +}; =20 static struct qcom_icc_node * const msm8974_mnoc_nodes[] =3D { [MNOC_MAS_GRAPHICS_3D] =3D &mas_graphics_3d, @@ -363,20 +851,121 @@ static const struct qcom_icc_desc msm8974_mnoc =3D { .ignore_enxio =3D true, }; =20 -DEFINE_QNODE(ocmem_noc_to_ocmem_vnoc, MSM8974_OCMEM_NOC_TO_OCMEM_VNOC, 16,= 54, 78, MSM8974_OCMEM_SLV_OCMEM); -DEFINE_QNODE(mas_jpeg_ocmem, MSM8974_OCMEM_MAS_JPEG_OCMEM, 16, 13, -1); -DEFINE_QNODE(mas_mdp_ocmem, MSM8974_OCMEM_MAS_MDP_OCMEM, 16, 14, -1); -DEFINE_QNODE(mas_video_p0_ocmem, MSM8974_OCMEM_MAS_VIDEO_P0_OCMEM, 16, 15,= -1); -DEFINE_QNODE(mas_video_p1_ocmem, MSM8974_OCMEM_MAS_VIDEO_P1_OCMEM, 16, 16,= -1); -DEFINE_QNODE(mas_vfe_ocmem, MSM8974_OCMEM_MAS_VFE_OCMEM, 16, 17, -1); -DEFINE_QNODE(mas_cnoc_onoc_cfg, MSM8974_OCMEM_MAS_CNOC_ONOC_CFG, 16, 12, -= 1); -DEFINE_QNODE(slv_service_onoc, MSM8974_OCMEM_SLV_SERVICE_ONOC, 16, -1, 19); -DEFINE_QNODE(slv_ocmem, MSM8974_OCMEM_SLV_OCMEM, 16, -1, 18); +static const u16 ocmem_noc_to_ocmem_vnoc_links[] =3D { + MSM8974_OCMEM_SLV_OCMEM +}; + +static struct qcom_icc_node ocmem_noc_to_ocmem_vnoc =3D { + .name =3D "ocmem_noc_to_ocmem_vnoc", + .id =3D MSM8974_OCMEM_NOC_TO_OCMEM_VNOC, + .buswidth =3D 16, + .mas_rpm_id =3D 54, + .slv_rpm_id =3D 78, + .num_links =3D ARRAY_SIZE(ocmem_noc_to_ocmem_vnoc_links), + .links =3D ocmem_noc_to_ocmem_vnoc_links, +}; + +static struct qcom_icc_node mas_jpeg_ocmem =3D { + .name =3D "mas_jpeg_ocmem", + .id =3D MSM8974_OCMEM_MAS_JPEG_OCMEM, + .buswidth =3D 16, + .mas_rpm_id =3D 13, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_mdp_ocmem =3D { + .name =3D "mas_mdp_ocmem", + .id =3D MSM8974_OCMEM_MAS_MDP_OCMEM, + .buswidth =3D 16, + .mas_rpm_id =3D 14, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_video_p0_ocmem =3D { + .name =3D "mas_video_p0_ocmem", + .id =3D MSM8974_OCMEM_MAS_VIDEO_P0_OCMEM, + .buswidth =3D 16, + .mas_rpm_id =3D 15, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_video_p1_ocmem =3D { + .name =3D "mas_video_p1_ocmem", + .id =3D MSM8974_OCMEM_MAS_VIDEO_P1_OCMEM, + .buswidth =3D 16, + .mas_rpm_id =3D 16, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_vfe_ocmem =3D { + .name =3D "mas_vfe_ocmem", + .id =3D MSM8974_OCMEM_MAS_VFE_OCMEM, + .buswidth =3D 16, + .mas_rpm_id =3D 17, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_cnoc_onoc_cfg =3D { + .name =3D "mas_cnoc_onoc_cfg", + .id =3D MSM8974_OCMEM_MAS_CNOC_ONOC_CFG, + .buswidth =3D 16, + .mas_rpm_id =3D 12, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node slv_service_onoc =3D { + .name =3D "slv_service_onoc", + .id =3D MSM8974_OCMEM_SLV_SERVICE_ONOC, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 19, +}; + +static struct qcom_icc_node slv_ocmem =3D { + .name =3D "slv_ocmem", + .id =3D MSM8974_OCMEM_SLV_OCMEM, + .buswidth =3D 16, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 18, +}; =20 /* Virtual NoC is needed for connection to OCMEM */ -DEFINE_QNODE(ocmem_vnoc_to_onoc, MSM8974_OCMEM_VNOC_TO_OCMEM_NOC, 16, 56, = 79, MSM8974_OCMEM_NOC_TO_OCMEM_VNOC); -DEFINE_QNODE(ocmem_vnoc_to_snoc, MSM8974_OCMEM_VNOC_TO_SNOC, 8, 57, 80); -DEFINE_QNODE(mas_v_ocmem_gfx3d, MSM8974_OCMEM_VNOC_MAS_GFX3D, 8, 55, -1, M= SM8974_OCMEM_VNOC_TO_OCMEM_NOC); +static const u16 ocmem_vnoc_to_onoc_links[] =3D { + MSM8974_OCMEM_NOC_TO_OCMEM_VNOC +}; + +static struct qcom_icc_node ocmem_vnoc_to_onoc =3D { + .name =3D "ocmem_vnoc_to_onoc", + .id =3D MSM8974_OCMEM_VNOC_TO_OCMEM_NOC, + .buswidth =3D 16, + .mas_rpm_id =3D 56, + .slv_rpm_id =3D 79, + .num_links =3D ARRAY_SIZE(ocmem_vnoc_to_onoc_links), + .links =3D ocmem_vnoc_to_onoc_links, +}; + +static struct qcom_icc_node ocmem_vnoc_to_snoc =3D { + .name =3D "ocmem_vnoc_to_snoc", + .id =3D MSM8974_OCMEM_VNOC_TO_SNOC, + .buswidth =3D 8, + .mas_rpm_id =3D 57, + .slv_rpm_id =3D 80, +}; + +static const u16 mas_v_ocmem_gfx3d_links[] =3D { + MSM8974_OCMEM_VNOC_TO_OCMEM_NOC +}; + +static struct qcom_icc_node mas_v_ocmem_gfx3d =3D { + .name =3D "mas_v_ocmem_gfx3d", + .id =3D MSM8974_OCMEM_VNOC_MAS_GFX3D, + .buswidth =3D 8, + .mas_rpm_id =3D 55, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_v_ocmem_gfx3d_links), + .links =3D mas_v_ocmem_gfx3d_links, +}; + =20 static struct qcom_icc_node * const msm8974_onoc_nodes[] =3D { [OCMEM_NOC_TO_OCMEM_VNOC] =3D &ocmem_noc_to_ocmem_vnoc, @@ -401,33 +990,288 @@ static const struct qcom_icc_desc msm8974_onoc =3D { .ignore_enxio =3D true, }; =20 -DEFINE_QNODE(mas_pnoc_cfg, MSM8974_PNOC_MAS_PNOC_CFG, 8, 43, -1); -DEFINE_QNODE(mas_sdcc_1, MSM8974_PNOC_MAS_SDCC_1, 8, 33, -1, MSM8974_PNOC_= TO_SNOC); -DEFINE_QNODE(mas_sdcc_3, MSM8974_PNOC_MAS_SDCC_3, 8, 34, -1, MSM8974_PNOC_= TO_SNOC); -DEFINE_QNODE(mas_sdcc_4, MSM8974_PNOC_MAS_SDCC_4, 8, 36, -1, MSM8974_PNOC_= TO_SNOC); -DEFINE_QNODE(mas_sdcc_2, MSM8974_PNOC_MAS_SDCC_2, 8, 35, -1, MSM8974_PNOC_= TO_SNOC); -DEFINE_QNODE(mas_tsif, MSM8974_PNOC_MAS_TSIF, 8, 37, -1, MSM8974_PNOC_TO_S= NOC); -DEFINE_QNODE(mas_bam_dma, MSM8974_PNOC_MAS_BAM_DMA, 8, 38, -1); -DEFINE_QNODE(mas_blsp_2, MSM8974_PNOC_MAS_BLSP_2, 8, 39, -1, MSM8974_PNOC_= TO_SNOC); -DEFINE_QNODE(mas_usb_hsic, MSM8974_PNOC_MAS_USB_HSIC, 8, 40, -1, MSM8974_P= NOC_TO_SNOC); -DEFINE_QNODE(mas_blsp_1, MSM8974_PNOC_MAS_BLSP_1, 8, 41, -1, MSM8974_PNOC_= TO_SNOC); -DEFINE_QNODE(mas_usb_hs, MSM8974_PNOC_MAS_USB_HS, 8, 42, -1, MSM8974_PNOC_= TO_SNOC); -DEFINE_QNODE(pnoc_to_snoc, MSM8974_PNOC_TO_SNOC, 8, 44, 45, MSM8974_SNOC_T= O_PNOC, MSM8974_PNOC_SLV_PRNG); -DEFINE_QNODE(slv_sdcc_1, MSM8974_PNOC_SLV_SDCC_1, 8, -1, 31); -DEFINE_QNODE(slv_sdcc_3, MSM8974_PNOC_SLV_SDCC_3, 8, -1, 32); -DEFINE_QNODE(slv_sdcc_2, MSM8974_PNOC_SLV_SDCC_2, 8, -1, 33); -DEFINE_QNODE(slv_sdcc_4, MSM8974_PNOC_SLV_SDCC_4, 8, -1, 34); -DEFINE_QNODE(slv_tsif, MSM8974_PNOC_SLV_TSIF, 8, -1, 35); -DEFINE_QNODE(slv_bam_dma, MSM8974_PNOC_SLV_BAM_DMA, 8, -1, 36); -DEFINE_QNODE(slv_blsp_2, MSM8974_PNOC_SLV_BLSP_2, 8, -1, 37); -DEFINE_QNODE(slv_usb_hsic, MSM8974_PNOC_SLV_USB_HSIC, 8, -1, 38); -DEFINE_QNODE(slv_blsp_1, MSM8974_PNOC_SLV_BLSP_1, 8, -1, 39); -DEFINE_QNODE(slv_usb_hs, MSM8974_PNOC_SLV_USB_HS, 8, -1, 40); -DEFINE_QNODE(slv_pdm, MSM8974_PNOC_SLV_PDM, 8, -1, 41); -DEFINE_QNODE(slv_periph_apu_cfg, MSM8974_PNOC_SLV_PERIPH_APU_CFG, 8, -1, 4= 2); -DEFINE_QNODE(slv_pnoc_mpu_cfg, MSM8974_PNOC_SLV_PNOC_MPU_CFG, 8, -1, 43); -DEFINE_QNODE(slv_prng, MSM8974_PNOC_SLV_PRNG, 8, -1, 44, MSM8974_PNOC_TO_S= NOC); -DEFINE_QNODE(slv_service_pnoc, MSM8974_PNOC_SLV_SERVICE_PNOC, 8, -1, 46); +static struct qcom_icc_node mas_pnoc_cfg =3D { + .name =3D "mas_pnoc_cfg", + .id =3D MSM8974_PNOC_MAS_PNOC_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D 43, + .slv_rpm_id =3D -1, +}; + +static const u16 mas_sdcc_1_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_sdcc_1 =3D { + .name =3D "mas_sdcc_1", + .id =3D MSM8974_PNOC_MAS_SDCC_1, + .buswidth =3D 8, + .mas_rpm_id =3D 33, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_sdcc_1_links), + .links =3D mas_sdcc_1_links, +}; + +static const u16 mas_sdcc_3_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_sdcc_3 =3D { + .name =3D "mas_sdcc_3", + .id =3D MSM8974_PNOC_MAS_SDCC_3, + .buswidth =3D 8, + .mas_rpm_id =3D 34, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_sdcc_3_links), + .links =3D mas_sdcc_3_links, +}; + +static const u16 mas_sdcc_4_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_sdcc_4 =3D { + .name =3D "mas_sdcc_4", + .id =3D MSM8974_PNOC_MAS_SDCC_4, + .buswidth =3D 8, + .mas_rpm_id =3D 36, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_sdcc_4_links), + .links =3D mas_sdcc_4_links, +}; + +static const u16 mas_sdcc_2_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_sdcc_2 =3D { + .name =3D "mas_sdcc_2", + .id =3D MSM8974_PNOC_MAS_SDCC_2, + .buswidth =3D 8, + .mas_rpm_id =3D 35, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_sdcc_2_links), + .links =3D mas_sdcc_2_links, +}; + +static const u16 mas_tsif_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_tsif =3D { + .name =3D "mas_tsif", + .id =3D MSM8974_PNOC_MAS_TSIF, + .buswidth =3D 8, + .mas_rpm_id =3D 37, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_tsif_links), + .links =3D mas_tsif_links, +}; + +static struct qcom_icc_node mas_bam_dma =3D { + .name =3D "mas_bam_dma", + .id =3D MSM8974_PNOC_MAS_BAM_DMA, + .buswidth =3D 8, + .mas_rpm_id =3D 38, + .slv_rpm_id =3D -1, +}; + +static const u16 mas_blsp_2_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_blsp_2 =3D { + .name =3D "mas_blsp_2", + .id =3D MSM8974_PNOC_MAS_BLSP_2, + .buswidth =3D 8, + .mas_rpm_id =3D 39, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_blsp_2_links), + .links =3D mas_blsp_2_links, +}; + +static const u16 mas_usb_hsic_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_usb_hsic =3D { + .name =3D "mas_usb_hsic", + .id =3D MSM8974_PNOC_MAS_USB_HSIC, + .buswidth =3D 8, + .mas_rpm_id =3D 40, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_usb_hsic_links), + .links =3D mas_usb_hsic_links, +}; + +static const u16 mas_blsp_1_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_blsp_1 =3D { + .name =3D "mas_blsp_1", + .id =3D MSM8974_PNOC_MAS_BLSP_1, + .buswidth =3D 8, + .mas_rpm_id =3D 41, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_blsp_1_links), + .links =3D mas_blsp_1_links, +}; + +static const u16 mas_usb_hs_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node mas_usb_hs =3D { + .name =3D "mas_usb_hs", + .id =3D MSM8974_PNOC_MAS_USB_HS, + .buswidth =3D 8, + .mas_rpm_id =3D 42, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_usb_hs_links), + .links =3D mas_usb_hs_links, +}; + +static const u16 pnoc_to_snoc_links[] =3D { + MSM8974_SNOC_TO_PNOC, + MSM8974_PNOC_SLV_PRNG +}; + +static struct qcom_icc_node pnoc_to_snoc =3D { + .name =3D "pnoc_to_snoc", + .id =3D MSM8974_PNOC_TO_SNOC, + .buswidth =3D 8, + .mas_rpm_id =3D 44, + .slv_rpm_id =3D 45, + .num_links =3D ARRAY_SIZE(pnoc_to_snoc_links), + .links =3D pnoc_to_snoc_links, +}; + +static struct qcom_icc_node slv_sdcc_1 =3D { + .name =3D "slv_sdcc_1", + .id =3D MSM8974_PNOC_SLV_SDCC_1, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 31, +}; + +static struct qcom_icc_node slv_sdcc_3 =3D { + .name =3D "slv_sdcc_3", + .id =3D MSM8974_PNOC_SLV_SDCC_3, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 32, +}; + +static struct qcom_icc_node slv_sdcc_2 =3D { + .name =3D "slv_sdcc_2", + .id =3D MSM8974_PNOC_SLV_SDCC_2, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 33, +}; + +static struct qcom_icc_node slv_sdcc_4 =3D { + .name =3D "slv_sdcc_4", + .id =3D MSM8974_PNOC_SLV_SDCC_4, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 34, +}; + +static struct qcom_icc_node slv_tsif =3D { + .name =3D "slv_tsif", + .id =3D MSM8974_PNOC_SLV_TSIF, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 35, +}; + +static struct qcom_icc_node slv_bam_dma =3D { + .name =3D "slv_bam_dma", + .id =3D MSM8974_PNOC_SLV_BAM_DMA, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 36, +}; + +static struct qcom_icc_node slv_blsp_2 =3D { + .name =3D "slv_blsp_2", + .id =3D MSM8974_PNOC_SLV_BLSP_2, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 37, +}; + +static struct qcom_icc_node slv_usb_hsic =3D { + .name =3D "slv_usb_hsic", + .id =3D MSM8974_PNOC_SLV_USB_HSIC, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 38, +}; + +static struct qcom_icc_node slv_blsp_1 =3D { + .name =3D "slv_blsp_1", + .id =3D MSM8974_PNOC_SLV_BLSP_1, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 39, +}; + +static struct qcom_icc_node slv_usb_hs =3D { + .name =3D "slv_usb_hs", + .id =3D MSM8974_PNOC_SLV_USB_HS, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 40, +}; + +static struct qcom_icc_node slv_pdm =3D { + .name =3D "slv_pdm", + .id =3D MSM8974_PNOC_SLV_PDM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 41, +}; + +static struct qcom_icc_node slv_periph_apu_cfg =3D { + .name =3D "slv_periph_apu_cfg", + .id =3D MSM8974_PNOC_SLV_PERIPH_APU_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 42, +}; + +static struct qcom_icc_node slv_pnoc_mpu_cfg =3D { + .name =3D "slv_pnoc_mpu_cfg", + .id =3D MSM8974_PNOC_SLV_PNOC_MPU_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 43, +}; + +static const u16 slv_prng_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node slv_prng =3D { + .name =3D "slv_prng", + .id =3D MSM8974_PNOC_SLV_PRNG, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 44, + .num_links =3D ARRAY_SIZE(slv_prng_links), + .links =3D slv_prng_links, +}; + +static struct qcom_icc_node slv_service_pnoc =3D { + .name =3D "slv_service_pnoc", + .id =3D MSM8974_PNOC_SLV_SERVICE_PNOC, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 46, +}; =20 static struct qcom_icc_node * const msm8974_pnoc_nodes[] =3D { [PNOC_MAS_PNOC_CFG] =3D &mas_pnoc_cfg, @@ -468,30 +1312,233 @@ static const struct qcom_icc_desc msm8974_pnoc =3D { .ignore_enxio =3D true, }; =20 -DEFINE_QNODE(mas_lpass_ahb, MSM8974_SNOC_MAS_LPASS_AHB, 8, 18, -1); -DEFINE_QNODE(mas_qdss_bam, MSM8974_SNOC_MAS_QDSS_BAM, 8, 19, -1); -DEFINE_QNODE(mas_snoc_cfg, MSM8974_SNOC_MAS_SNOC_CFG, 8, 20, -1); -DEFINE_QNODE(snoc_to_bimc, MSM8974_SNOC_TO_BIMC, 8, 21, 24, MSM8974_BIMC_T= O_SNOC); -DEFINE_QNODE(snoc_to_cnoc, MSM8974_SNOC_TO_CNOC, 8, 22, 25); -DEFINE_QNODE(snoc_to_pnoc, MSM8974_SNOC_TO_PNOC, 8, 29, 28, MSM8974_PNOC_T= O_SNOC); -DEFINE_QNODE(snoc_to_ocmem_vnoc, MSM8974_SNOC_TO_OCMEM_VNOC, 8, 53, 77, MS= M8974_OCMEM_VNOC_TO_OCMEM_NOC); -DEFINE_QNODE(mas_crypto_core0, MSM8974_SNOC_MAS_CRYPTO_CORE0, 8, 23, -1, M= SM8974_SNOC_TO_BIMC); -DEFINE_QNODE(mas_crypto_core1, MSM8974_SNOC_MAS_CRYPTO_CORE1, 8, 24, -1); -DEFINE_QNODE(mas_lpass_proc, MSM8974_SNOC_MAS_LPASS_PROC, 8, 25, -1, MSM89= 74_SNOC_TO_OCMEM_VNOC); -DEFINE_QNODE(mas_mss, MSM8974_SNOC_MAS_MSS, 8, 26, -1); -DEFINE_QNODE(mas_mss_nav, MSM8974_SNOC_MAS_MSS_NAV, 8, 27, -1); -DEFINE_QNODE(mas_ocmem_dma, MSM8974_SNOC_MAS_OCMEM_DMA, 8, 28, -1); -DEFINE_QNODE(mas_wcss, MSM8974_SNOC_MAS_WCSS, 8, 30, -1); -DEFINE_QNODE(mas_qdss_etr, MSM8974_SNOC_MAS_QDSS_ETR, 8, 31, -1); -DEFINE_QNODE(mas_usb3, MSM8974_SNOC_MAS_USB3, 8, 32, -1, MSM8974_SNOC_TO_B= IMC); -DEFINE_QNODE(slv_ampss, MSM8974_SNOC_SLV_AMPSS, 8, -1, 20); -DEFINE_QNODE(slv_lpass, MSM8974_SNOC_SLV_LPASS, 8, -1, 21); -DEFINE_QNODE(slv_usb3, MSM8974_SNOC_SLV_USB3, 8, -1, 22); -DEFINE_QNODE(slv_wcss, MSM8974_SNOC_SLV_WCSS, 8, -1, 23); -DEFINE_QNODE(slv_ocimem, MSM8974_SNOC_SLV_OCIMEM, 8, -1, 26); -DEFINE_QNODE(slv_snoc_ocmem, MSM8974_SNOC_SLV_SNOC_OCMEM, 8, -1, 27); -DEFINE_QNODE(slv_service_snoc, MSM8974_SNOC_SLV_SERVICE_SNOC, 8, -1, 29); -DEFINE_QNODE(slv_qdss_stm, MSM8974_SNOC_SLV_QDSS_STM, 8, -1, 30); +static struct qcom_icc_node mas_lpass_ahb =3D { + .name =3D "mas_lpass_ahb", + .id =3D MSM8974_SNOC_MAS_LPASS_AHB, + .buswidth =3D 8, + .mas_rpm_id =3D 18, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_qdss_bam =3D { + .name =3D "mas_qdss_bam", + .id =3D MSM8974_SNOC_MAS_QDSS_BAM, + .buswidth =3D 8, + .mas_rpm_id =3D 19, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_snoc_cfg =3D { + .name =3D "mas_snoc_cfg", + .id =3D MSM8974_SNOC_MAS_SNOC_CFG, + .buswidth =3D 8, + .mas_rpm_id =3D 20, + .slv_rpm_id =3D -1, +}; + +static const u16 snoc_to_bimc_links[] =3D { + MSM8974_BIMC_TO_SNOC +}; + +static struct qcom_icc_node snoc_to_bimc =3D { + .name =3D "snoc_to_bimc", + .id =3D MSM8974_SNOC_TO_BIMC, + .buswidth =3D 8, + .mas_rpm_id =3D 21, + .slv_rpm_id =3D 24, + .num_links =3D ARRAY_SIZE(snoc_to_bimc_links), + .links =3D snoc_to_bimc_links, +}; + +static struct qcom_icc_node snoc_to_cnoc =3D { + .name =3D "snoc_to_cnoc", + .id =3D MSM8974_SNOC_TO_CNOC, + .buswidth =3D 8, + .mas_rpm_id =3D 22, + .slv_rpm_id =3D 25, +}; + +static const u16 snoc_to_pnoc_links[] =3D { + MSM8974_PNOC_TO_SNOC +}; + +static struct qcom_icc_node snoc_to_pnoc =3D { + .name =3D "snoc_to_pnoc", + .id =3D MSM8974_SNOC_TO_PNOC, + .buswidth =3D 8, + .mas_rpm_id =3D 29, + .slv_rpm_id =3D 28, + .num_links =3D ARRAY_SIZE(snoc_to_pnoc_links), + .links =3D snoc_to_pnoc_links, +}; + +static const u16 snoc_to_ocmem_vnoc_links[] =3D { + MSM8974_OCMEM_VNOC_TO_OCMEM_NOC +}; + +static struct qcom_icc_node snoc_to_ocmem_vnoc =3D { + .name =3D "snoc_to_ocmem_vnoc", + .id =3D MSM8974_SNOC_TO_OCMEM_VNOC, + .buswidth =3D 8, + .mas_rpm_id =3D 53, + .slv_rpm_id =3D 77, + .num_links =3D ARRAY_SIZE(snoc_to_ocmem_vnoc_links), + .links =3D snoc_to_ocmem_vnoc_links, +}; + +static const u16 mas_crypto_core0_links[] =3D { + MSM8974_SNOC_TO_BIMC +}; + +static struct qcom_icc_node mas_crypto_core0 =3D { + .name =3D "mas_crypto_core0", + .id =3D MSM8974_SNOC_MAS_CRYPTO_CORE0, + .buswidth =3D 8, + .mas_rpm_id =3D 23, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_crypto_core0_links), + .links =3D mas_crypto_core0_links, +}; + +static struct qcom_icc_node mas_crypto_core1 =3D { + .name =3D "mas_crypto_core1", + .id =3D MSM8974_SNOC_MAS_CRYPTO_CORE1, + .buswidth =3D 8, + .mas_rpm_id =3D 24, + .slv_rpm_id =3D -1, +}; + +static const u16 mas_lpass_proc_links[] =3D { + MSM8974_SNOC_TO_OCMEM_VNOC +}; + +static struct qcom_icc_node mas_lpass_proc =3D { + .name =3D "mas_lpass_proc", + .id =3D MSM8974_SNOC_MAS_LPASS_PROC, + .buswidth =3D 8, + .mas_rpm_id =3D 25, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_lpass_proc_links), + .links =3D mas_lpass_proc_links, +}; + +static struct qcom_icc_node mas_mss =3D { + .name =3D "mas_mss", + .id =3D MSM8974_SNOC_MAS_MSS, + .buswidth =3D 8, + .mas_rpm_id =3D 26, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_mss_nav =3D { + .name =3D "mas_mss_nav", + .id =3D MSM8974_SNOC_MAS_MSS_NAV, + .buswidth =3D 8, + .mas_rpm_id =3D 27, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_ocmem_dma =3D { + .name =3D "mas_ocmem_dma", + .id =3D MSM8974_SNOC_MAS_OCMEM_DMA, + .buswidth =3D 8, + .mas_rpm_id =3D 28, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_wcss =3D { + .name =3D "mas_wcss", + .id =3D MSM8974_SNOC_MAS_WCSS, + .buswidth =3D 8, + .mas_rpm_id =3D 30, + .slv_rpm_id =3D -1, +}; + +static struct qcom_icc_node mas_qdss_etr =3D { + .name =3D "mas_qdss_etr", + .id =3D MSM8974_SNOC_MAS_QDSS_ETR, + .buswidth =3D 8, + .mas_rpm_id =3D 31, + .slv_rpm_id =3D -1, +}; + +static const u16 mas_usb3_links[] =3D { + MSM8974_SNOC_TO_BIMC +}; + +static struct qcom_icc_node mas_usb3 =3D { + .name =3D "mas_usb3", + .id =3D MSM8974_SNOC_MAS_USB3, + .buswidth =3D 8, + .mas_rpm_id =3D 32, + .slv_rpm_id =3D -1, + .num_links =3D ARRAY_SIZE(mas_usb3_links), + .links =3D mas_usb3_links, +}; + +static struct qcom_icc_node slv_ampss =3D { + .name =3D "slv_ampss", + .id =3D MSM8974_SNOC_SLV_AMPSS, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 20, +}; + +static struct qcom_icc_node slv_lpass =3D { + .name =3D "slv_lpass", + .id =3D MSM8974_SNOC_SLV_LPASS, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 21, +}; + +static struct qcom_icc_node slv_usb3 =3D { + .name =3D "slv_usb3", + .id =3D MSM8974_SNOC_SLV_USB3, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 22, +}; + +static struct qcom_icc_node slv_wcss =3D { + .name =3D "slv_wcss", + .id =3D MSM8974_SNOC_SLV_WCSS, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 23, +}; + +static struct qcom_icc_node slv_ocimem =3D { + .name =3D "slv_ocimem", + .id =3D MSM8974_SNOC_SLV_OCIMEM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 26, +}; + +static struct qcom_icc_node slv_snoc_ocmem =3D { + .name =3D "slv_snoc_ocmem", + .id =3D MSM8974_SNOC_SLV_SNOC_OCMEM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 27, +}; + +static struct qcom_icc_node slv_service_snoc =3D { + .name =3D "slv_service_snoc", + .id =3D MSM8974_SNOC_SLV_SERVICE_SNOC, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 29, +}; + +static struct qcom_icc_node slv_qdss_stm =3D { + .name =3D "slv_qdss_stm", + .id =3D MSM8974_SNOC_SLV_QDSS_STM, + .buswidth =3D 8, + .mas_rpm_id =3D -1, + .slv_rpm_id =3D 30, +}; =20 static struct qcom_icc_node * const msm8974_snoc_nodes[] =3D { [SNOC_MAS_LPASS_AHB] =3D &mas_lpass_ahb, --=20 2.47.3 From nobody Fri Apr 3 17:50:41 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 870CA2770A for ; Tue, 24 Mar 2026 00:11:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311092; cv=none; b=lb/tyWo9YPH55xu6Vk1+s8Ane8g4h6NRlaUo+RggCpoUkTt54Xz8wtUYlAAj6RNlLgja+rXNwSI1LAnc9ItVGlipFPluY9VikUNOXuVwlHc7aQRcW5FCOXh8st1F+m4ZtnE5wDqrtrZ3ErRG6j6xsWtScdZOd/v/9DGMF46GSe8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774311092; c=relaxed/simple; bh=8tSrjSEctrELGYdxKKPYShR4TxJ0d51LBO+dSM9b1Kw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fN9xU7Cf33divdvn/0BxdSPDj5os7yv5lloeQ7ukPZ3qZhksd+WMhn5QOWecRqVQ7hxTtC/I+8TDNQ9i3jJ4UL+I2P6A872vs0sFaXBwBrqyamHVFWyuo3GcuAVgjxZqpESmisoJda5rG4WSC3gQqEgIgHk0G+Hs3ULs4n7nBiY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=RG3qecOQ; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=VbZ+JsFG; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="RG3qecOQ"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="VbZ+JsFG" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62NHqYRJ362514 for ; Tue, 24 Mar 2026 00:11:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= gcMmeQeTt0vPXYhZkgPaoPSS4C/8s4GILVGqLmRQBys=; b=RG3qecOQkaDTHSL4 xgp4ZiTS5rrtr5Rz6bHfj0v8xU08DtquU/reYMwmV6yvVHhGI63vk0MNERahhWeJ 7YZqnSXrscG5bLqyv7nLGls8/HoQsySkP7oOeHetM6GaO0tbczzru0Wc4MaO2ro8 vDdA0flSyX+d8stjPaOYZPtIrbssdnPC25MRLpJE3nbjS57wroQXtdJ9G0e4Czte fYPcn5I41s2sOwFjdg8BL3gPK3Qwlo7Xa2UyQVdHpDxm1uX9aXhWEj8+i4yO5jlb 3D8BLLoOaIaEG59FKF/8QH9uVLq8QL2J/EogoRSX+fiErL1AsfUcm0BGtx2O64um ZlUDiQ== Received: from mail-qt1-f198.google.com (mail-qt1-f198.google.com [209.85.160.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d33k32p04-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 24 Mar 2026 00:11:28 +0000 (GMT) Received: by mail-qt1-f198.google.com with SMTP id d75a77b69052e-50b31cff27fso8224121cf.3 for ; Mon, 23 Mar 2026 17:11:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774311087; x=1774915887; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=gcMmeQeTt0vPXYhZkgPaoPSS4C/8s4GILVGqLmRQBys=; b=VbZ+JsFGwjHYOG937HkN1HLLwohlqADwGexalkzxZU4OQBFwhp0UyBCX+bSQRWF6ys +QPN5j+vF93iKrzPjzw2fxvB/1GOJZFVWbtl6dfuy1VmnXUDCfuvnYb+E8/r0xfRkLue /4MKt6Qs1DqIXECqjINxVGG8lcI/DGtzNID1E6lKFk53H0lkPI0KGNC++4pMWl6M6/Fy 00spB6cEtwB3WrcELHYp+Kz1ziVV1a4pLVXJVo0I3X8i0rpFDokSroYIH4qJ2dRCKJEV gVodOyZ/3+zebIL59ARNXX1uk5IIfGSMr7V3RqzRoMQsP4X+K/YpZigwrv2buBbilo5l 0J1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774311087; x=1774915887; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=gcMmeQeTt0vPXYhZkgPaoPSS4C/8s4GILVGqLmRQBys=; b=s5ZeD9tZDCUCARJc6w3tD3MABt+X7SuVmIrhVuMaCbdPr+k0PN+qczVKIivKtgQgXA 1Hvdawo9CG63CtHNqu4oeA0OWFGrabyI3vQIVMgvNxkPizGaehsBPFTlzMh2dy9vy+2e HkbrZ+XfSyxwR2I1K0MSUeWoTlqyeT/0V4YrK7vgzRn1pIYzT4qCsEouhUCb2096ibd1 BAZhJMWtb6UvhVz3p4Lud9w0YlR1leGbAbaIrAJVgXtnXpJknzggQJz8gO6HMoQ/3Zxx NuFdkQG6o95hiGNaXoO7VoQzndUAxzD0RmN1Es4jF43DzYfafPftlZOiypJipFr+WVi4 msxA== X-Forwarded-Encrypted: i=1; AJvYcCXI5itB+qWh50KQ1P6M8OAtOIVUT/b4uJVsxphfGodf8fbAgbhzFa0gGv6aaZdmZjxs3s3uXt0/aBouMtY=@vger.kernel.org X-Gm-Message-State: AOJu0Ywy4+UuNy6LaZssUb2Z4FQgEtzoDx1hume9JxtfXKd5XYFseFVi npGXsbhjtgZBmMWUGiQDzdwsqDmxEIkI9nnFkMA4IqvMk6NHqcQ+CzGQW7IVVV+jeVrE5tZ6up3 s+ZSPfO/RnC/S0eY5Gl9b+hIaSMMq8xoNBtkdsxbPgtw2Xr3Q6iqYu398WVWRm75/NR0= X-Gm-Gg: ATEYQzzJbjeswzoJW4CkVxYKIrnmUjqOZ9vF63ShvOrPkZ6TI5GY3qvEQ5/aVp+hJUs vvIbDJCcbVmcf3t4UyVLfC/xnByP/Am2L0j4FfJRoiJKC1tt1mURj76qxHSAig++ZL/VJhk4ZOh sDpbzd3sDtME6V+uVO4Ay9lIDvt4w6O21s2PGtpwzhtuzA59tLWVoxFoXXdnx9Ix7qUXIUDA/4u sGWY1Nv7WadJjnk9pCSoFvbi/QfiLiZQzI/hDfFM4cnt5mFi3IbOqIB5K9nYicxcLDHy+L3bcxe GVuk6NHF0dBr2MaR4ijLVxnL9lkvJ9+Cdcgj+gAPvQx/gEcrYOOfwRsC5IhqY+jc9hgQRL7rKQC 0aU/0Yp3uKs41tv55E40VAEsfZmGT77jTOghEjSw4+fJgXgfjuuS1y0uQEx5izFKT07jtUBLEHE T4J07IhJpEQtXQWjqI0o/oXGHo1erJCO1qm1w= X-Received: by 2002:a05:622a:1c15:b0:50b:4435:5dfd with SMTP id d75a77b69052e-50b4435710bmr197436901cf.1.1774311087348; Mon, 23 Mar 2026 17:11:27 -0700 (PDT) X-Received: by 2002:a05:622a:1c15:b0:50b:4435:5dfd with SMTP id d75a77b69052e-50b4435710bmr197436641cf.1.1774311086912; Mon, 23 Mar 2026 17:11:26 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38bf99820f6sm30339021fa.19.2026.03.23.17.11.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 17:11:25 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 24 Mar 2026 02:10:45 +0200 Subject: [PATCH v2 9/9] ARM: dts: qcom: msm8974: Drop RPM bus clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-msm8974-icc-v2-9-527280043ad8@oss.qualcomm.com> References: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> In-Reply-To: <20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com> To: Georgi Djakov , Konrad Dybcio , Bjorn Andersson , Luca Weiss , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2888; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=8tSrjSEctrELGYdxKKPYShR4TxJ0d51LBO+dSM9b1Kw=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpwdaIRnJghTI7Tp6JqqPF+fMO4Ob3Szr/vaac/ QSs+5tRH5yJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCacHWiAAKCRCLPIo+Aiko 1clIB/9XPkTyJ4KuDtlJiZENLt+iFlaFmToPS8SnTFbZ5gEbQ5a3EJqooOzwp8+aPMiBRkdVVmC tsJq8pS12CWhBCfuPPiMvo7MR+5z2OlY562s5pZlwAUk12BIUzMbuRy4C3LkSTdwBV4itBEd7lC qvX9yyF8HE3S1Qa4XUfufl1D13Bnh9GeDPBh32vOjBUnPqOIAqm9PQ+4DEum6g2Kk+l3Vf8AQrp dvAGgMzr220a22Pam6BnjSwyg8Jio/lLWDVL1zPDcmFzSo/W1OYXh8dcDV0m7XLkpfqyWRLsb+h ruRwPgFg20qCvR68ePYu8hk1qkzCuxx+vfBAHRoHp+dsR3q1 X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=CYYFJbrl c=1 sm=1 tr=0 ts=69c1d6b0 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=h6rqPeke2OkJn0bzelEA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAwMCBTYWx0ZWRfXxzyKpz5DqGzZ MWD2TUQAHLLuGvMulCY6qd7Dn6KJFctZUWtT+3a1tWPY1z1V4MYkEyd7IS7UbX8uKlCWX5aKOoG yq6SghVnCQmMGrO/IOsiuOWvC9rFvK5JJ8yMyzFsBUoOotxU8RIs6S0sqFIeeMge4bPzwXzvvi7 lRTv5ZjppTRPubhgnVI8QmWciZ8hXNqtuV8uLqH4Nd+kh6J52Yya1HdD+xCQ11a8LTudH3Cs+QW 7uMvLtzi0uXFYbEn5FjXO/c5SX+3J9/ojVqRWSn8GgavhPp5fpeUi4noddd5hGaRWlEFi0lfmal 26W64KCcKeFOlrsvTTve1thiJtZhY3shZCFtkkCJ/zKqjkEmnlQ16Z2pN5YsafLgp4MsaR8gLdl nzHif8VNz4uNmXVO3qhVoZCgMaqZDGqq1DwY0hdE8Su0F1SAkVHI61x1C60UAQ24gDp6/iWkRM3 p3X7j0i1VezX5arozSA== X-Proofpoint-GUID: UQOygUFoM5KNeZFd1NFwgmg5IbRrtodJ X-Proofpoint-ORIG-GUID: UQOygUFoM5KNeZFd1NFwgmg5IbRrtodJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_07,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 spamscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 bulkscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240000 Some nodes are abusingly referencing some of the internal bus clocks, that were recently removed in Linux (because the original implementation did not make much sense), managing them as if they were the only devices on an NoC bus. These clocks are now handled from within the icc framework and are no longer registered from within the CCF. Remove them. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Tested-by: Alexandre Messier Tested-by: Luca Weiss # fairphone-fp2 --- arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 21 +++------------------ 1 file changed, 3 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/q= com/qcom-msm8974.dtsi index 2a82ddce94a2..95be1d2e214f 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -1115,9 +1115,6 @@ bimc: interconnect@fc380000 { reg =3D <0xfc380000 0x6a000>; compatible =3D "qcom,msm8974-bimc"; #interconnect-cells =3D <1>; - clock-names =3D "bus", "bus_a"; - clocks =3D <&rpmcc RPM_SMD_BIMC_CLK>, - <&rpmcc RPM_SMD_BIMC_A_CLK>; }; =20 gcc: clock-controller@fc400000 { @@ -1162,45 +1159,32 @@ snoc: interconnect@fc460000 { reg =3D <0xfc460000 0x4000>; compatible =3D "qcom,msm8974-snoc"; #interconnect-cells =3D <1>; - clock-names =3D "bus", "bus_a"; - clocks =3D <&rpmcc RPM_SMD_SNOC_CLK>, - <&rpmcc RPM_SMD_SNOC_A_CLK>; }; =20 pnoc: interconnect@fc468000 { reg =3D <0xfc468000 0x4000>; compatible =3D "qcom,msm8974-pnoc"; #interconnect-cells =3D <1>; - clock-names =3D "bus", "bus_a"; - clocks =3D <&rpmcc RPM_SMD_PNOC_CLK>, - <&rpmcc RPM_SMD_PNOC_A_CLK>; }; =20 ocmemnoc: interconnect@fc470000 { reg =3D <0xfc470000 0x4000>; compatible =3D "qcom,msm8974-ocmemnoc"; #interconnect-cells =3D <1>; - clock-names =3D "bus", "bus_a"; - clocks =3D <&rpmcc RPM_SMD_OCMEMGX_CLK>, - <&rpmcc RPM_SMD_OCMEMGX_A_CLK>; }; =20 mmssnoc: interconnect@fc478000 { reg =3D <0xfc478000 0x4000>; compatible =3D "qcom,msm8974-mmssnoc"; #interconnect-cells =3D <1>; - clock-names =3D "bus", "bus_a"; - clocks =3D <&mmcc MMSS_S0_AXI_CLK>, - <&mmcc MMSS_S0_AXI_CLK>; + clocks =3D <&mmcc MMSS_S0_AXI_CLK>; + clock-names =3D "bus"; }; =20 cnoc: interconnect@fc480000 { reg =3D <0xfc480000 0x4000>; compatible =3D "qcom,msm8974-cnoc"; #interconnect-cells =3D <1>; - clock-names =3D "bus", "bus_a"; - clocks =3D <&rpmcc RPM_SMD_CNOC_CLK>, - <&rpmcc RPM_SMD_CNOC_A_CLK>; }; =20 tsens: thermal-sensor@fc4a9000 { @@ -2223,6 +2207,7 @@ sram@fdd00000 { <0xfec00000 0x180000>; reg-names =3D "ctrl", "mem"; ranges =3D <0 0xfec00000 0x180000>; + /* core clock doesn't exist anymore, kept for ABI compliance */ clocks =3D <&rpmcc RPM_SMD_OCMEMGX_CLK>, <&mmcc OCMEMCX_OCMEMNOC_CLK>; clock-names =3D "core", "iface"; --=20 2.47.3