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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a285207454sm3162823e87.48.2026.03.24.06.54.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Mar 2026 06:54:47 -0700 (PDT) From: Marcus Folkesson Date: Tue, 24 Mar 2026 14:54:18 +0100 Subject: [PATCH v9 4/5] i2c: davinci: add support for setting bus frequency Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260324-i2c-mux-v9-4-5292b0608243@gmail.com> References: <20260324-i2c-mux-v9-0-5292b0608243@gmail.com> In-Reply-To: <20260324-i2c-mux-v9-0-5292b0608243@gmail.com> To: Wolfram Sang , Peter Rosin , Michael Hennerich , Bartosz Golaszewski , Andi Shyti , Andy Shevchenko , Bartosz Golaszewski Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Marcus Folkesson , Bartosz Golaszewski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3881; i=marcus.folkesson@gmail.com; h=from:subject:message-id; bh=ryrI9MAQVwCIRRCngn0KDdHz7g1aMSsslONZvQCRx8g=; b=owEBbQKS/ZANAwAKAYiATm9ZXVIyAcsmYgBpwpecpKtb2LQM74bmvDz0req+77DcvmlflCxyE W4Thx+y7rWJAjMEAAEKAB0WIQQFUaLotmy1TWTBLGWIgE5vWV1SMgUCacKXnAAKCRCIgE5vWV1S MlCUD/wPBVoCUV1xDm82HsdePvpFTI2QRLF6oP9tMPcFfNn5gKnix7i6IZSK70o5JGbRZP2Oqt0 krIWM96uzXsZY1ahQOTrC//PEKTVZLYgv8Lek7pJ8fNJV70Nd2DzkaovUlBXeGWQUeHcSX0rrc2 jw8muH/LXYI4RgA3nxwZlX3lLNEb0nNbxv/rDf0jYPs+j9mcGXH0WnRwsoVv1JO/UovW6am8AkH tvgbfHNliDmVpPJPeE6U4SxgwY8Otxk3b7cw7L1y2bcqxDZFIzflpxzuNNkQj5DnW+llnIAzgP0 sjO8H0ms1lOrTt5+f4i3I9gWz5CAdvaAmZwbG0n5JEwpG1CI5BnJVlFMwld+yEJBaU4HyAexUOY SnRNTR5ot1h1CREUoKB90y7hEflr+pzSwtaqZNYhU2WtZAYyqB7HRwV0TpoCOUGhndf0HXHMqyJ iljSssZsBtgHzvWyxdh885YIt54nIFeggj3YJs8prKmAiM305wftGDGIK2xLfY+IMdwQq/cJAPq +/5/7exap9aoXdqA8WVdd/gAnHS4L0bLoN7UzcALDmF4Am49BXowNySUrTaEqHHiQfTMe5uDwlE L7+KTQ7rWJCda0niD3xovRf+f7DUKsLQsSep5U2cweJQW4WJ0R5W443R0ez0yJwVRLlnoxAR3m7 UorDwjz3rJvMstw== X-Developer-Key: i=marcus.folkesson@gmail.com; a=openpgp; fpr=AB91D46C7E0F6E6FB2AB640EC0FE25D598F6C127 Populate adapter with clock_hz and .set_clk_freq() to enable support for dynamic bus frequency. Remove bus_freq_hz entirely and only use clock_hz instead. Acked-by: Bartosz Golaszewski Signed-off-by: Marcus Folkesson --- drivers/i2c/busses/i2c-davinci.c | 35 ++++++++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davi= nci.c index 549fb22cdf4f..d87172408445 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -132,8 +132,6 @@ struct davinci_i2c_dev { #ifdef CONFIG_CPU_FREQ struct notifier_block freq_transition; #endif - /* standard bus frequency */ - unsigned int bus_freq_hz; /* Chip has a ICPFUNC register */ bool has_pfunc; }; @@ -171,6 +169,7 @@ static void i2c_davinci_calc_clk_dividers(struct davinc= i_i2c_dev *dev) u32 clkh; u32 clkl; u32 input_clock =3D clk_get_rate(dev->clk); + u32 bus_freq_hz =3D dev->adapter.clock_hz; =20 /* NOTE: I2C Clock divider programming info * As per I2C specs the following formulas provide prescaler @@ -207,9 +206,9 @@ static void i2c_davinci_calc_clk_dividers(struct davinc= i_i2c_dev *dev) if (device_is_compatible(dev->dev, "ti,keystone-i2c")) d =3D 6; =20 - clk =3D (input_clock / (psc + 1)) / (dev->bus_freq_hz); + clk =3D (input_clock / (psc + 1)) / (bus_freq_hz); /* Avoid driving the bus too fast because of rounding errors above */ - if (input_clock / (psc + 1) / clk > dev->bus_freq_hz) + if (input_clock / (psc + 1) / clk > bus_freq_hz) clk++; /* * According to I2C-BUS Spec 2.1, in FAST-MODE LOW period should be at @@ -267,7 +266,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev) davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG)); dev_dbg(dev->dev, "CLKH =3D %d\n", davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG)); - dev_dbg(dev->dev, "bus_freq_hz =3D %dHz\n", dev->bus_freq_hz); + dev_dbg(dev->dev, "bus_freq_hz =3D %dHz\n", dev->adapter.clock_hz); =20 =20 /* Take the I2C module out of reset: */ @@ -279,6 +278,27 @@ static int i2c_davinci_init(struct davinci_i2c_dev *de= v) return 0; } =20 +static int davinci_i2c_set_clk(struct i2c_adapter *adap, u32 clock_hz) +{ + struct davinci_i2c_dev *dev =3D i2c_get_adapdata(adap); + + if (adap->clock_hz =3D=3D clock_hz) + return 0; + + adap->clock_hz =3D clock_hz; + + /* put I2C into reset */ + davinci_i2c_reset_ctrl(dev, 0); + + /* compute clock dividers */ + i2c_davinci_calc_clk_dividers(dev); + + /* Take the I2C module out of reset: */ + davinci_i2c_reset_ctrl(dev, 1); + + return 0; +} + /* * This routine does i2c bus recovery by using i2c_generic_scl_recovery * which is provided by I2C Bus recovery infrastructure. @@ -755,12 +775,13 @@ static int davinci_i2c_probe(struct platform_device *= pdev) dev->dev =3D &pdev->dev; dev->irq =3D irq; platform_set_drvdata(pdev, dev); + adap =3D &dev->adapter; =20 r =3D device_property_read_u32(&pdev->dev, "clock-frequency", &prop); if (r) prop =3D I2C_MAX_STANDARD_MODE_FREQ; =20 - dev->bus_freq_hz =3D prop; + adap->clock_hz =3D prop; =20 dev->has_pfunc =3D device_property_present(&pdev->dev, "ti,has-pfunc"); =20 @@ -800,7 +821,6 @@ static int davinci_i2c_probe(struct platform_device *pd= ev) goto err_unuse_clocks; } =20 - adap =3D &dev->adapter; i2c_set_adapdata(adap, dev); adap->owner =3D THIS_MODULE; adap->class =3D I2C_CLASS_DEPRECATED; @@ -809,6 +829,7 @@ static int davinci_i2c_probe(struct platform_device *pd= ev) adap->dev.parent =3D &pdev->dev; adap->timeout =3D DAVINCI_I2C_TIMEOUT; adap->dev.of_node =3D dev_of_node(&pdev->dev); + adap->set_clk_freq =3D davinci_i2c_set_clk; =20 if (dev->has_pfunc) adap->bus_recovery_info =3D &davinci_i2c_scl_recovery_info; --=20 2.53.0