From nobody Fri Apr 3 18:49:54 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCC823E3C74; Tue, 24 Mar 2026 10:50:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774349419; cv=none; b=NzksU4FzcJubS7jTEPZTjFgD+W1G+Z2gMFQvq2kyPXiIEj0q9pm0Vb91eyXOBexKHf2vLB8dwMUeZBG9WgKEDeW34GMn+RTYdIRh5uJcKFR+9EAGz2TMdC5D6m3G1F48qjCMtu4SCIAPkswV4lsZ7sffo4SoiLG9MCBloVhczv0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774349419; c=relaxed/simple; bh=WprweT4wU4c5WeT/btKLTnLngB4K42XTYOSoMUk3+So=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=IpkZmwqQTEuTm4kfkDjYXy8lhYpXqSJjt1Y9x9U8c6RIsysD1LaDB9ddW9rzkpk9Fd0UVUeRAhE8O/FazeWR1i7XCbV9uygSQ2UOMHKf9ky2Lx8acZ9u/D22nAbLzzXS4+DJtVXCXiCLGsaguvvoYu5VpWdFyd1MoVy+Btjvsa0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=A0hOpZeF; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="A0hOpZeF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1774349417; x=1805885417; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=WprweT4wU4c5WeT/btKLTnLngB4K42XTYOSoMUk3+So=; b=A0hOpZeFctKFSEXi4IgBd/xhQR/XGXQpE9heX2kRMzhcW6Z3inoKmiaL ZP1FjQ+bILqSKkxzWEqsNiJ1swqgO6gDc85P3dd+YWbe38raPyBkk5Dk3 2jiIHTjoTdpDk//MQshZp9/Bu8MHJicPMlwHxaTh8LR14nZiytFZDhQ1P m7A4/ChCA4kY/w4inkVPBTvlVD9pDvvSUwGyt7gQA15uJnGM+wVviHICW CiwNETFq3CM1LR5DhfTT+C2QCHwlb0YGSavuUfcfuH5Pxb7/S+7rYZDI+ SCVG9S4cmu+SXIW38sUWfk99jI9SPgOZL9sWOUnpdHRDYHmlXKYIR+dI8 w==; X-CSE-ConnectionGUID: XI13arZSSLqPAvmg8vZ9dw== X-CSE-MsgGUID: EiRkJ2IQS6iRQzMs3KFSWw== X-IronPort-AV: E=Sophos;i="6.23,138,1770620400"; d="scan'208";a="222375786" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2026 03:50:16 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Tue, 24 Mar 2026 03:50:10 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 24 Mar 2026 03:50:06 -0700 From: =?utf-8?q?Jens_Emil_Schulz_=C3=98stergaard?= Date: Tue, 24 Mar 2026 11:46:45 +0100 Subject: [PATCH net-next v2 2/9] dt-bindings: net: lan9645x: add LAN9645X switch bindings Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260324-dsa_lan9645x_switch_driver_base-v2-2-f7504e3b0681@microchip.com> References: <20260324-dsa_lan9645x_switch_driver_base-v2-0-f7504e3b0681@microchip.com> In-Reply-To: <20260324-dsa_lan9645x_switch_driver_base-v2-0-f7504e3b0681@microchip.com> To: , Andrew Lunn , "Vladimir Oltean" , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Simon Horman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Woojung Huh , Russell King , Steen Hegelund , Daniel Machon CC: , , , =?utf-8?q?Jens_Emil_Schulz_=C3=98stergaard?= X-Mailer: b4 0.15-dev Add bindings for LAN9645X switch. We use a fallback compatible for the smallest SKU microchip,lan96455s-switch. Reviewed-by: Steen Hegelund Signed-off-by: Jens Emil Schulz =C3=98stergaard --- Changes in v2: - rename file to microchip,lan96455s-switch.yaml - remove led vendor property - add {rx,tx}-internal-delay-ps for rgmii delay - remove labels from example - remove container node from example --- .../net/dsa/microchip,lan96455s-switch.yaml | 119 +++++++++++++++++= ++++ MAINTAINERS | 1 + 2 files changed, 120 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-= switch.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s= -switch.yaml new file mode 100644 index 000000000000..0282e25c05d4 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.= yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/microchip,lan96455s-switch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip LAN9645x Ethernet switch + +maintainers: + - Jens Emil Schulz =C3=98stergaard + +description: | + The LAN9645x switch is a multi-port Gigabit AVB/TSN Ethernet switch with + five integrated 10/100/1000Base-T PHYs. In addition to the integrated PH= Ys, + it supports up to 2 RGMII/RMII, up to 2 BASE-X/SERDES/2.5GBASE-X and one + Quad-SGMII interfaces. + +properties: + compatible: + oneOf: + - enum: + - microchip,lan96455s-switch + - items: + - enum: + - microchip,lan96455f-switch + - microchip,lan96457f-switch + - microchip,lan96459f-switch + - microchip,lan96457s-switch + - microchip,lan96459s-switch + - const: microchip,lan96455s-switch + + reg: + maxItems: 1 + +$ref: dsa.yaml# + +patternProperties: + "^(ethernet-)?ports$": + type: object + additionalProperties: true + patternProperties: + "^(ethernet-)?port@[0-8]$": + type: object + description: Ethernet switch ports + + $ref: dsa-port.yaml# + + properties: + rx-internal-delay-ps: + const: 2000 + + tx-internal-delay-ps: + const: 2000 + + unevaluatedProperties: false + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + ethernet-switch@4000 { + compatible =3D "microchip,lan96459f-switch", "microchip,lan96455s-= switch"; + reg =3D <0x4000 0x244>; + + ethernet-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + phy-mode =3D "gmii"; + phy-handle =3D <&cuphy0>; + }; + + port@1 { + reg =3D <1>; + phy-mode =3D "gmii"; + phy-handle =3D <&cuphy1>; + }; + + port@2 { + reg =3D <2>; + phy-mode =3D "gmii"; + phy-handle =3D <&cuphy2>; + }; + + port@3 { + reg =3D <3>; + phy-mode =3D "gmii"; + phy-handle =3D <&cuphy3>; + }; + + port@7 { + reg =3D <7>; + phy-mode =3D "rgmii"; + ethernet =3D <&cpu_host_port>; + rx-internal-delay-ps =3D <2000>; + tx-internal-delay-ps =3D <2000>; + + fixed-link { + speed =3D <1000>; + full-duplex; + pause; + }; + }; + }; + }; +... + diff --git a/MAINTAINERS b/MAINTAINERS index 7ae698067c41..8232da1b3951 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17278,6 +17278,7 @@ M: Jens Emil Schulz =C3=98stergaard M: UNGLinuxDriver@microchip.com L: netdev@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.ya= ml F: include/linux/dsa/lan9645x.h F: net/dsa/tag_lan9645x.c =20 --=20 2.52.0