From nobody Fri Apr 3 19:04:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 754713C9EC8; Mon, 23 Mar 2026 17:41:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774287672; cv=none; b=acJLEV/XUclAl5VRBJwQQMrIHqiKjzY8c6WFJb7Tej2DimGVQdWHgHrW0vNBiMUr/8Sn+W2hVkiHa3yRXmS7rcaY3kkpjCP/KZzZDPfs7pNsFcGP5/5h2ySxTn1PeXUShin7EMY7K3bn9md39BOpbrebGwMxlIMzu8E1f5jlLCk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774287672; c=relaxed/simple; bh=f89MZan3iUCMImpwFJMAPlV8Oa0551rEAwn3TXkL7pI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uSQugHGh0ZrHHeGd2TF8aiPmf5qXPwgdFzITyGNue11LjLRvMHzAeS/Nw5G07cf+VZ9BTR+Vyo877P3CDOiT5D9qI/62Nx9DKDENtGOHVLZ2zd4/a81AD+2oFy+xDnDfR6ftC7uPKlVmCwmrDI2p1S38jaMYjkjS18vuWvUj/+s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QmTbnGaV; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QmTbnGaV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774287666; x=1805823666; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=f89MZan3iUCMImpwFJMAPlV8Oa0551rEAwn3TXkL7pI=; b=QmTbnGaV8+2bzhkSZnD4EQ8aMEMxYJ2nDR53msKMISmC8/mUdEuYfuuo rd/L9QhHeTzAPZOp8aEtsWE37sdGjQRmuEl/NpU6nMKHnyEzY5JUxZVMo +5Vy8eCGZCuL7YvEX7RgQFBYP9ViJtWBoZs3PuILDFwJ8QlXF9jsgLdS9 v3aGi7SBcLFP25eUSecJQ6mHgKN8Cw8gSaMhWDntX7qBrbusdz4c/g+Ek AO4/H+NtA7plvjprWPLYolWg5Bizclr9xrvu1yrXb2yn4oUbB5B+X0fo3 5T+s9FdDl+lM1V2kl4lLmeyZ7HQEZEZDtxMQB0KMWlBAAapThnbia5tMl Q==; X-CSE-ConnectionGUID: CJetOlDZT0KnS57v74Z9wg== X-CSE-MsgGUID: c38d4x37ThmvdOAL0QvtuQ== X-IronPort-AV: E=McAfee;i="6800,10657,11738"; a="75484644" X-IronPort-AV: E=Sophos;i="6.23,137,1770624000"; d="scan'208";a="75484644" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2026 10:41:05 -0700 X-CSE-ConnectionGUID: SqoOOJ9SQWazPZr4A4rryA== X-CSE-MsgGUID: wBVtjHzRTz6xy0Od+kV8kw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,137,1770624000"; d="scan'208";a="228576636" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by orviesa004.jf.intel.com with ESMTP; 23 Mar 2026 10:41:00 -0700 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id E83ED312FB; Mon, 23 Mar 2026 17:40:57 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v6 03/14] libeth: allow to create fill queues without NAPI Date: Mon, 23 Mar 2026 18:40:34 +0100 Message-ID: <20260323174052.5355-4-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20260323174052.5355-1-larysa.zaremba@intel.com> References: <20260323174052.5355-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pavan Kumar Linga Control queues can utilize libeth_rx fill queues, despite working outside of NAPI context. The only problem is standard fill queues requiring NAPI that provides them with the device pointer. Introduce a way to provide the device directly without using NAPI. Suggested-by: Alexander Lobakin Reviewed-by: Maciej Fijalkowski Signed-off-by: Pavan Kumar Linga Signed-off-by: Larysa Zaremba Tested-by: Bharath R Tested-by: Samuel Salin Signed-off-by: Tony Nguyen Reviewed-by: Aleksandr Loktionov --- drivers/net/ethernet/intel/libeth/rx.c | 12 ++++++++---- include/net/libeth/rx.h | 4 +++- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/libeth/rx.c b/drivers/net/ethernet/= intel/libeth/rx.c index 62521a1f4ec9..0c1a565a1b3a 100644 --- a/drivers/net/ethernet/intel/libeth/rx.c +++ b/drivers/net/ethernet/intel/libeth/rx.c @@ -145,25 +145,29 @@ static bool libeth_rx_page_pool_params_zc(struct libe= th_fq *fq, /** * libeth_rx_fq_create - create a PP with the default libeth settings * @fq: buffer queue struct to fill - * @napi: &napi_struct covering this PP (no usage outside its poll loops) + * @napi_dev: &napi_struct for NAPI (data) queues, &device for others * * Return: %0 on success, -%errno on failure. */ -int libeth_rx_fq_create(struct libeth_fq *fq, struct napi_struct *napi) +int libeth_rx_fq_create(struct libeth_fq *fq, void *napi_dev) { + struct napi_struct *napi =3D fq->no_napi ? NULL : napi_dev; struct page_pool_params pp =3D { .flags =3D PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV, .order =3D LIBETH_RX_PAGE_ORDER, .pool_size =3D fq->count, .nid =3D fq->nid, - .dev =3D napi->dev->dev.parent, - .netdev =3D napi->dev, + .dev =3D napi ? napi->dev->dev.parent : napi_dev, + .netdev =3D napi ? napi->dev : NULL, .napi =3D napi, }; struct libeth_fqe *fqes; struct page_pool *pool; int ret; =20 + if (!pp.netdev && fq->type =3D=3D LIBETH_FQE_MTU) + return -EINVAL; + pp.dma_dir =3D fq->xdp ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE; =20 if (!fq->hsplit) diff --git a/include/net/libeth/rx.h b/include/net/libeth/rx.h index 5d991404845e..0e736846c5e8 100644 --- a/include/net/libeth/rx.h +++ b/include/net/libeth/rx.h @@ -69,6 +69,7 @@ enum libeth_fqe_type { * @type: type of the buffers this queue has * @hsplit: flag whether header split is enabled * @xdp: flag indicating whether XDP is enabled + * @no_napi: the queue is not a data queue and does not have NAPI * @buf_len: HW-writeable length per each buffer * @nid: ID of the closest NUMA node with memory */ @@ -85,12 +86,13 @@ struct libeth_fq { enum libeth_fqe_type type:2; bool hsplit:1; bool xdp:1; + bool no_napi:1; =20 u32 buf_len; int nid; }; =20 -int libeth_rx_fq_create(struct libeth_fq *fq, struct napi_struct *napi); +int libeth_rx_fq_create(struct libeth_fq *fq, void *napi_dev); void libeth_rx_fq_destroy(struct libeth_fq *fq); =20 /** --=20 2.47.0