From nobody Fri Apr 3 20:53:03 2026 Received: from out-189.mta1.migadu.com (out-189.mta1.migadu.com [95.215.58.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B03E367F46 for ; Mon, 23 Mar 2026 09:53:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.189 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774259620; cv=none; b=HIEoh6rbpQ3B1E6UhwSaEpqiL0Dbj9fSvUHcC2PNvOMpypPvXPJZINLcD/K6anWJxSZ4TT6SGQGwbaE9/jOyL4gKzyhomPL+Ii9vnYs7ls4koIozoGDo8pjxUwne5VikA2RTHW0exmJ3ZepKWv3QCyUIAVtQlo31tDwddkmIb6o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774259620; c=relaxed/simple; bh=OivYALViO51BXcINyYIeEqbR203oMRr2dTdm3NCcmYM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=lq/tkGHxi9ln8r8OOzZLSXjFa1ILdcYNTXaA2oS9RHe5WginKnamtSKdN0ZVGcOXCMiseQyWi6LAKwrnVmQbARxd3lfpm3XheyZrvO6k7PUDrcT4w4gGRz/dyTGalQJ4oQ2pMoTHg456R6doEtChVGimCRuTARhn+74uYKWcBd0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=LExfvP/K; arc=none smtp.client-ip=95.215.58.189 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="LExfvP/K" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1774259607; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=EuKMePKdS8l8qYgLmVMy97Flyhc6OjI0UHTXF3Gjx9U=; b=LExfvP/KzHYY0mQMeFyi4pYbSJJVfi7MB7kADGdegn4IXhz7Iy8TXGd0zdsV5ZvFhb6Ttz tmqvmHLi3TkTGuyl7x4ACgZO0CjpKp73J2FTFTgYkWw0FH3/IyRQNajl+bxuPylJEpo3nh tu8ptgKXPj6iWbW0PoBf+jc4OCVfG/kiOMNrQfxppkq8zpBtptqhtH6LmW9aCN8xc6Paf3 nPJBfRfHHk2Udqwb0dY6cURB0S56LbPHMYey1fLgK2Z6iMvlJrLuaNE2x6AJ/LtKRd3Zyi M49fglR65+TiI8/kpet18iGD4eFQIrVWBM5bFLLjBkaO9rUjUl5LYuGH4FddLg== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Val Packett , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: qcom: kodiak: Add LPASS I2S2 pinctrl definitions Date: Mon, 23 Mar 2026 06:40:47 -0300 Message-ID: <20260323095247.92890-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add the pinctrl definitions to configure gpio10-gpio13 of the lpass_tlmm for I2S output. Signed-off-by: Val Packett Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- Similar to ff9c117c32bc6ace7 which just landed, this is for the other MI2S interface on there. It is the Senary MI2S, so actually using it requires the series from [1] and then more changes on top, but I have sound working on my device with it, so let's get this DT chunk in first / at the same time as the other prereqs land as well. [1]: https://lore.kernel.org/all/20260320144918.1685838-1-srinivas.kandagat= la@oss.qualcomm.com/ Thanks, ~val --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 52 ++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index 343da1b18095..f393d1c22223 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -3088,6 +3088,58 @@ data-pins { }; }; =20 + lpass_i2s2_active: i2s2-active-state { + clk-pins { + pins =3D "gpio10"; + function =3D "i2s2_clk"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + ws-pins { + pins =3D "gpio11"; + function =3D "i2s2_ws"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + data-pins { + pins =3D "gpio12", "gpio13"; + function =3D "i2s2_data"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + }; + + lpass_i2s2_sleep: i2s2-sleep-state { + clk-pins { + pins =3D "gpio10"; + function =3D "i2s2_clk"; + drive-strength =3D <2>; + bias-pull-down; + input-enable; + }; + + ws-pins { + pins =3D "gpio11"; + function =3D "i2s2_ws"; + drive-strength =3D <2>; + bias-pull-down; + input-enable; + }; + + data-pins { + pins =3D "gpio12", "gpio13"; + function =3D "i2s2_data"; + drive-strength =3D <2>; + bias-pull-down; + input-enable; + }; + }; + lpass_rx_swr_clk: rx-swr-clk-state { pins =3D "gpio3"; function =3D "swr_rx_clk"; --=20 2.53.0