From nobody Fri Apr 3 22:12:24 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15AA5212542; Mon, 23 Mar 2026 02:07:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774231641; cv=none; b=lIRH+kQcxro/2KpVtcPkUhdNBZSPE4jTSPkZgV62pjXrnBE0sA94+5fRilO/gpq0C1aXGm8ijSthxpJ8Z3Lghs+o4CCh5OiPtTqMRz5mYpnbxgRIQxOu0R8LoWMoP4ADCmTVI491b8eRvIGjaossBq+xwFDS09x27V2oqnpYHmI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774231641; c=relaxed/simple; bh=jdzbRuodmDOa4Rz8PKWhhJ6GdFCSrpEzLrR1LcRWhN8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=tHV1KS+FTqV0RSS79ByjTnC/GE5Wfi+jXo8ZM8lMXqR4xC9+O5zjDbH467MBFG7sjbjgpsYd+Qd2dNnBYwRJhCU44WaV/kDbWngp2DGhCftbcGUQs++AAizjx8Y2o8WbQwqJZCMAoelf0uMSF3r6u9dlgWT+bFA3wCVeiqx/iOQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 23 Mar 2026 10:07:07 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 23 Mar 2026 10:07:07 +0800 From: Ryan Chen Date: Mon, 23 Mar 2026 10:07:07 +0800 Subject: [PATCH v3 1/2] dt-bindings: mmc: sdhci-of-aspeed: Add AST2700 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260323-sdhci-v3-1-93555b8f6411@aspeedtech.com> References: <20260323-sdhci-v3-0-93555b8f6411@aspeedtech.com> In-Reply-To: <20260323-sdhci-v3-0-93555b8f6411@aspeedtech.com> To: Andrew Jeffery , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Ryan Chen , Adrian Hunter , Philipp Zabel CC: Andrew Jeffery , , , , , , , Ryan Chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774231627; l=2522; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=jdzbRuodmDOa4Rz8PKWhhJ6GdFCSrpEzLrR1LcRWhN8=; b=4EdN1Pbm/olA1ehS/4Wg9tcediCzCAre0wopiJ6/Evw3ha8JJDuq5b3h4PViy9ycjeuR6a3Vz GsYzhSmUJOODuCKoj/UEitmcX4oEa5jTgoMztAoRXA5HFR6FJnNk5zz X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= AST2700 SDHCI controller is fully compatible with AST2600. However, it is necessary to take the AST2700 SD controller out of reset, so require the 'resets' property. Signed-off-by: Ryan Chen --- Changes in v3: - Add items list const for ast2700 ast2600 compatible - Move if/then/else block after required: (per example-schema) Changes in v2: - add missing blank line - modify ast2700 compatible items const --- .../devicetree/bindings/mmc/aspeed,sdhci.yaml | 41 +++++++++++++++++-= ---- 1 file changed, 33 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Docu= mentation/devicetree/bindings/mmc/aspeed,sdhci.yaml index d24950ccea95..e4a9c2810893 100644 --- a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml @@ -22,10 +22,15 @@ description: |+ =20 properties: compatible: - enum: - - aspeed,ast2400-sd-controller - - aspeed,ast2500-sd-controller - - aspeed,ast2600-sd-controller + oneOf: + - enum: + - aspeed,ast2400-sd-controller + - aspeed,ast2500-sd-controller + - aspeed,ast2600-sd-controller + - items: + - const: aspeed,ast2700-sd-controller + - const: aspeed,ast2600-sd-controller + reg: maxItems: 1 description: Common configuration registers @@ -38,6 +43,9 @@ properties: maxItems: 1 description: The SD/SDIO controller clock gate =20 + resets: + maxItems: 1 + patternProperties: "^sdhci@[0-9a-f]+$": type: object @@ -46,10 +54,15 @@ patternProperties: =20 properties: compatible: - enum: - - aspeed,ast2400-sdhci - - aspeed,ast2500-sdhci - - aspeed,ast2600-sdhci + oneOf: + - enum: + - aspeed,ast2400-sdhci + - aspeed,ast2500-sdhci + - aspeed,ast2600-sdhci + - items: + - const: aspeed,ast2700-sdhci + - const: aspeed,ast2600-sdhci + reg: maxItems: 1 description: The SDHCI registers @@ -78,6 +91,18 @@ required: - ranges - clocks =20 +if: + properties: + compatible: + contains: + const: aspeed,ast2700-sd-controller +then: + required: + - resets +else: + properties: + resets: false + examples: - | #include --=20 2.34.1 From nobody Fri Apr 3 22:12:24 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7420421B191; 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dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 23 Mar 2026 10:07:08 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 23 Mar 2026 10:07:08 +0800 From: Ryan Chen Date: Mon, 23 Mar 2026 10:07:08 +0800 Subject: [PATCH v3 2/2] mmc: sdhci-of-aspeed: Handle optional controller reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260323-sdhci-v3-2-93555b8f6411@aspeedtech.com> References: <20260323-sdhci-v3-0-93555b8f6411@aspeedtech.com> In-Reply-To: <20260323-sdhci-v3-0-93555b8f6411@aspeedtech.com> To: Andrew Jeffery , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Ryan Chen , Adrian Hunter , Philipp Zabel CC: Andrew Jeffery , , , , , , , Ryan Chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774231627; l=1614; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=DSoqlna8u7OCuF3/5m/l2C6jTM9r0dUx3ka7UV6Fe8A=; b=2NOHNRMbWSjIf/Q/IGPuiAKn1Vu1+RK6ULNl8RyuYHEoNAv7haKXCiQvAHzYZcUQ3tQiauXL/ l/4s4jb0FsODeF4YQjLp1AJ3x4lXXyFKlTC9oyYeNVjOoky+husJTOm X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= Get the optional reset line for the ASPEED SD controller during probe by using devm_reset_control_get_optional_exclusive_deasserted(). This allows platforms such as AST2700, which require the SD controller to be taken out of reset before use, to work with the existing driver. Signed-off-by: Ryan Chen Acked-by: Adrian Hunter Reviewed-by: Krzysztof Kozlowski --- Changes in v2: - use devm_reset_control_get_optional_exclusive_deasserted replace reset_control_get_optional_exclusive. - add include reset.h --- drivers/mmc/host/sdhci-of-aspeed.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of= -aspeed.c index ca97b01996b1..8f638ffb55ae 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -13,6 +13,7 @@ #include #include #include +#include #include =20 #include "sdhci-pltfm.h" @@ -520,6 +521,7 @@ static int aspeed_sdc_probe(struct platform_device *pde= v) =20 { struct device_node *parent, *child; + struct reset_control *reset; struct aspeed_sdc *sdc; int ret; =20 @@ -529,6 +531,10 @@ static int aspeed_sdc_probe(struct platform_device *pd= ev) =20 spin_lock_init(&sdc->lock); =20 + reset =3D devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev= , NULL); + if (IS_ERR(reset)) + return dev_err_probe(&pdev->dev, PTR_ERR(reset), "unable to acquire rese= t\n"); + sdc->clk =3D devm_clk_get(&pdev->dev, NULL); if (IS_ERR(sdc->clk)) return PTR_ERR(sdc->clk); --=20 2.34.1