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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2c10b14c985sm11389751eec.2.2026.03.22.23.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Mar 2026 23:20:03 -0700 (PDT) From: Jingyi Wang Date: Sun, 22 Mar 2026 23:19:41 -0700 Subject: [PATCH 1/6] arm64: dts: qcom: kaanapali: Add PMIC devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260322-knp-pmic-dt-v1-1-70bc40ea4428@oss.qualcomm.com> References: <20260322-knp-pmic-dt-v1-0-70bc40ea4428@oss.qualcomm.com> In-Reply-To: <20260322-knp-pmic-dt-v1-0-70bc40ea4428@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jingyi Wang , 20260224-knp-dts-misc-v6-0-79d20dab8a60@oss.qualcomm.com, Jishnu Prakash X-Mailer: b4 0.15-dev-3d134 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774246801; l=16546; i=jingyi.wang@oss.qualcomm.com; s=20250911; h=from:subject:message-id; bh=37fDihGdeRigBUzrYy2lmvQ4AgFn5Lzlq2yB7+qZV9U=; b=5+Mab14OtCv2Ud8iLeNiNerODwEt8Xn1BBwKVZ8W1WwICcVZRYjkHh1F1Um/Ah9TeTT7a59ej vs+7VayaTQqCtOwJMMB55nQ1VaRlIeW1tWSCWcM4JddonJ2IRGAKDsl X-Developer-Key: i=jingyi.wang@oss.qualcomm.com; a=ed25519; pk=PSoHZ6KbUss3IW8FPRVMHMK0Jkkr/jV347mBYJO3iLo= X-Authority-Analysis: v=2.4 cv=HI7O14tv c=1 sm=1 tr=0 ts=69c0db95 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=ozNiz_YJmLBSDaAKB-YA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-ORIG-GUID: tXCSHHs9OvCJMB7sagylIYZau6gMGMHD X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzIzMDA0NiBTYWx0ZWRfX+I1WITonK4Km WY8xttM2nGwh23ebbKcR97pFvWZ3RNywh6HVCjTM934vueDRfvLN7yvcUwrOe5uUOgpdUozH7R3 rAy5X0PudCwHzggomsprezKsC2E5eULa9B+GoTBzPMunZn/OjXr2cmdGSyqx4ToQ2J6XR8osN70 JQlQmdhvyV8Et2AsK5tX9Fp001Cg7+FhGs+E0WIly29SMYZa2R4XW/8Fi09Ui/ldravPyL48gl7 jaqBWd6zYB5LLuMyhoEoNcptdoCYUP2YgbdNokmMuZkXFbGxLOCiCgdulfH6IADnNWkTXD6kYyG iEzM+kz0NfvlyGwTrXitLZEYjOpKxV8aW1XT5ueXf7xdVSYJkJ69q5h+zxYURdnZBZv3rB8h4L8 KD7hSXXnomSXkGgzf8z+79vhQwsctS9gNY7uFJHgdHxra3QdZXwWz7nTxbw+AxvbnvCxwkHyU4a b+n1drSpTZ//jfhjEUw== X-Proofpoint-GUID: tXCSHHs9OvCJMB7sagylIYZau6gMGMHD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_02,2026-03-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 phishscore=0 malwarescore=0 bulkscore=0 impostorscore=0 suspectscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603230046 From: Jishnu Prakash Add a spmi-pmic-arb device for the SPMI PMIC arbiter found on Kaanapali. It has two subnodes corresponding to the SPMI0 bus controller and the SPMI1 bus controller. Also add dtsi files for PMH0104, PMH0110, PMD8028, PMIH0108, PMR735D and PM8010 along with temp-alarm and GPIO nodes under them, which are needed on Kaanapali. Signed-off-by: Jishnu Prakash Signed-off-by: Jingyi Wang --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 47 +++++ arch/arm64/boot/dts/qcom/pm8010-kaanapali.dtsi | 93 ++++++++++ arch/arm64/boot/dts/qcom/pmd8028-kaanapali.dtsi | 62 +++++++ arch/arm64/boot/dts/qcom/pmh0104-kaanapali.dtsi | 63 +++++++ arch/arm64/boot/dts/qcom/pmh0110-kaanapali.dtsi | 213 +++++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/pmih0108-kaanapali.dtsi | 68 ++++++++ arch/arm64/boot/dts/qcom/pmr735d-kaanapali.dtsi | 63 +++++++ 7 files changed, 609 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/= qcom/kaanapali.dtsi index 54d6c235e1b1..f0de06b2c20b 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -3316,6 +3316,53 @@ IPCC_MPROC_SIGNAL_GLINK_QMP #clock-cells =3D <0>; }; =20 + arbiter@c400000 { + compatible =3D "qcom,kaanapali-spmi-pmic-arb", "qcom,glymur-spmi-pmic-a= rb"; + reg =3D <0x0 0x0c400000 0x0 0x3000>, + <0x0 0x0c900000 0x0 0x400000>, + <0x0 0x0c4c0000 0x0 0x400000>, + <0x0 0x0c403000 0x0 0x8000>; + reg-names =3D "core", + "chnls", + "obsrvr", + "chnl_map"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + qcom,channel =3D <0>; + qcom,ee =3D <0>; + + spmi_bus0: spmi@c426000 { + reg =3D <0x0 0x0c426000 0x0 0x4000>, + <0x0 0x0c8c0000 0x0 0x10000>, + <0x0 0x0c42a000 0x0 0x8000>; + reg-names =3D "cnfg", + "intr", + "chnl_owner"; + interrupts-extended =3D <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "periph_irq"; + interrupt-controller; + #interrupt-cells =3D <4>; + #address-cells =3D <2>; + #size-cells =3D <0>; + }; + + spmi_bus1: spmi@c437000 { + reg =3D <0x0 0x0c437000 0x0 0x4000>, + <0x0 0x0c8d0000 0x0 0x10000>, + <0x0 0x0c43b000 0x0 0x8000>; + reg-names =3D "cnfg", + "intr", + "chnl_owner"; + interrupts-extended =3D <&pdc 3 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "periph_irq"; + interrupt-controller; + #interrupt-cells =3D <4>; + #address-cells =3D <2>; + #size-cells =3D <0>; + }; + }; + tlmm: pinctrl@f100000 { compatible =3D "qcom,kaanapali-tlmm"; reg =3D <0x0 0x0f100000 0x0 0x300000>; diff --git a/arch/arm64/boot/dts/qcom/pm8010-kaanapali.dtsi b/arch/arm64/bo= ot/dts/qcom/pm8010-kaanapali.dtsi new file mode 100644 index 000000000000..bfc58a6589d3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm8010-kaanapali.dtsi @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include + +/ { + thermal-zones { + pm8010-m-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pm8010_m_e1_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + + pm8010-n-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pm8010_n_e1_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + }; +}; + +&spmi_bus1 { + pm8010_m_e1: pmic@c { + compatible =3D "qcom,pm8010", "qcom,spmi-pmic"; + reg =3D <0xc SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pm8010_m_e1_temp_alarm: temp-alarm@2400 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0x2400>; + interrupts =3D <0xc 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + }; + + pm8010_n_e1: pmic@d { + compatible =3D "qcom,pm8010", "qcom,spmi-pmic"; + reg =3D <0xd SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pm8010_n_e1_temp_alarm: temp-alarm@2400 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0x2400>; + interrupts =3D <0xd 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pmd8028-kaanapali.dtsi b/arch/arm64/b= oot/dts/qcom/pmd8028-kaanapali.dtsi new file mode 100644 index 000000000000..db4dc16a66e7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmd8028-kaanapali.dtsi @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include + +/ { + thermal-zones { + pmd8028-thermal { + polling-delay-passive =3D <100>; + thermal-sensors =3D <&pmd8028_e1_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + }; +}; + +&spmi_bus1 { + pmd8028_e1: pmic@4 { + compatible =3D "qcom,pmd8028", "qcom,spmi-pmic"; + reg =3D <0x4 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmd8028_e1_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmd8028_e1_gpios: gpio@8800 { + compatible =3D "qcom,pmd8028-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmd8028_e1_gpios 0 0 4>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pmh0104-kaanapali.dtsi b/arch/arm64/b= oot/dts/qcom/pmh0104-kaanapali.dtsi new file mode 100644 index 000000000000..d009c9a9f59e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmh0104-kaanapali.dtsi @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include + +/ { + thermal-zones { + pmh0104-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmh0104_j_e1_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + }; +}; + +&spmi_bus1 { + pmh0104_j_e1: pmic@9 { + compatible =3D "qcom,pmh0104", "qcom,spmi-pmic"; + reg =3D <0x9 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmh0104_j_e1_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x9 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmh0104_j_e1_gpios: gpio@8800 { + compatible =3D "qcom,pmh0104-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmh0104_j_e1_gpios 0 0 8>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pmh0110-kaanapali.dtsi b/arch/arm64/b= oot/dts/qcom/pmh0110-kaanapali.dtsi new file mode 100644 index 000000000000..15d9cff246b3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmh0110-kaanapali.dtsi @@ -0,0 +1,213 @@ +// SPDX-License-Identifier: BSD-3-Clause-Clear +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include + +/ { + thermal-zones { + pmh0110-d-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmh0110_d_e0_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + + pmh0110-f-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmh0110_f_e0_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + + pmh0110-g-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmh0110_g_e0_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + + pmh0110-i-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmh0110_i_e0_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + }; +}; + +&spmi_bus0 { + pmh0110_d_e0: pmic@3 { + compatible =3D "qcom,pmh0110", "qcom,spmi-pmic"; + reg =3D <0x3 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmh0110_d_e0_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x3 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmh0110_d_e0_gpios: gpio@8800 { + compatible =3D "qcom,pmh0110-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmh0110_d_e0_gpios 0 0 14>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + pmh0110_f_e0: pmic@5 { + compatible =3D "qcom,pmh0110", "qcom,spmi-pmic"; + reg =3D <0x5 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmh0110_f_e0_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmh0110_f_e0_gpios: gpio@8800 { + compatible =3D "qcom,pmh0110-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmh0110_f_e0_gpios 0 0 14>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + pmh0110_g_e0: pmic@6 { + compatible =3D "qcom,pmh0110", "qcom,spmi-pmic"; + reg =3D <0x6 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmh0110_g_e0_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmh0110_g_e0_gpios: gpio@8800 { + compatible =3D "qcom,pmh0110-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmh0110_g_e0_gpios 0 0 14>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + pmh0110_i_e0: pmic@8 { + compatible =3D "qcom,pmh0110", "qcom,spmi-pmic"; + reg =3D <0x8 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmh0110_i_e0_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x8 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmh0110_i_e0_gpios: gpio@8800 { + compatible =3D "qcom,pmh0110-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmh0110_i_e0_gpios 0 0 14>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pmih0108-kaanapali.dtsi b/arch/arm64/= boot/dts/qcom/pmih0108-kaanapali.dtsi new file mode 100644 index 000000000000..b73b0e82c3d3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmih0108-kaanapali.dtsi @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include + +/ { + thermal-zones { + pmih0108-thermal { + polling-delay-passive =3D <100>; + thermal-sensors =3D <&pmih0108_e1_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + }; +}; + +&spmi_bus1 { + pmih0108_e1: pmic@7 { + compatible =3D "qcom,pmih0108", "qcom,spmi-pmic"; + reg =3D <0x7 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmih0108_e1_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmih0108_e1_gpios: gpio@8800 { + compatible =3D "qcom,pmih0108-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmih0108_e1_gpios 0 0 18>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + pmih0108_e1_eusb2_repeater: phy@fd00 { + compatible =3D "qcom,pm8550b-eusb2-repeater"; + reg =3D <0xfd00>; + #phy-cells =3D <0>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pmr735d-kaanapali.dtsi b/arch/arm64/b= oot/dts/qcom/pmr735d-kaanapali.dtsi new file mode 100644 index 000000000000..d0dd5e078cdc --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmr735d-kaanapali.dtsi @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include + +/ { + thermal-zones { + pmr735d-thermal { + polling-delay-passive =3D <100>; + + thermal-sensors =3D <&pmr735d_e1_temp_alarm>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + }; +}; + +&spmi_bus1 { + pmr735d_e1: pmic@a { + compatible =3D "qcom,pmr735d", "qcom,spmi-pmic"; + reg =3D <0xa SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmr735d_e1_temp_alarm: temp-alarm@a00 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0xa00>; + interrupts =3D <0xa 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells =3D <0>; + }; + + pmr735d_e1_gpios: gpio@8800 { + compatible =3D "qcom,pmr735d-gpio", "qcom,spmi-gpio"; + reg =3D <0x8800>; + gpio-controller; + gpio-ranges =3D <&pmr735d_e1_gpios 0 0 2>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; +}; --=20 2.25.1