From nobody Fri Apr 3 22:33:19 2026 Received: from mail-43102.protonmail.ch (mail-43102.protonmail.ch [185.70.43.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F402735950 for ; Sun, 22 Mar 2026 14:31:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.102 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774189889; cv=none; b=SU32HClh4Z5NzWG3bx4MTbrk2n6LFnSX33HLDo/XZuiCGFNUhzl1zdoZJ1BWfA9+IjUDeEb+s02AblsF+CPH5cBU/3bYM2AzNVt5PY0ZcW7D0WnijWEEJyFCkN++i1X6ugPhxTODfAFzjzFU2niezxfCNFpdyRh45m7AztS7QRw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774189889; c=relaxed/simple; bh=jVQfrfA5Kkg0FOsH98hYlX75FgOGvbDIYqr1mrVFMVg=; h=Date:To:From:Cc:Subject:Message-ID:MIME-Version:Content-Type; b=oERI6nntbACQtHGv8af5EmXNlwF00oMHHRUhwOIX0wf64r8eNyi+Dl38CPuuMFUBHuhYVapQRqaARtBiM/c0nORhKkTvv/iIykl+4vXHLyFw+6Gg6itMHYQg19OVWU1q0v//ksOfZ9Ab3FnTrvNm2XIQo7awHsJH794+pqUIVuM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=fznH3kr9; arc=none smtp.client-ip=185.70.43.102 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="fznH3kr9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1774189878; x=1774449078; bh=TZXkJdJ9ML2LISNVgOvnIHtIpHF+r1CvhpF/XXj5VkM=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=fznH3kr9VZB2EpPfs4eXrgsfIKUfoOgBLHHWte2GxA3jjakHFIoAIMNOUutg4ZpJd nBs/0QYDCUffBLXH4UDJw98Gr2tJqSKK/9Sbxy7+jheye68+SRtePWcEolK/wCNwuh ysUoSTUNGlrVWYr5nkOOoLIK3Jc3I29DNftnuwoSYQlUgPDr+Bwhg/yXAAzbgJcT6K wOSP24Gjhn2cZwBDCS9mvczqHwtSiubFiiuVhRMeThdcq/gIJkKTUovp0Rtz9lWFl7 beeca7lrQBeOhd1EPbCzdWZIjmPGhxuMInwVu18E7VF/vVgoEYFESwAu7zopJm60rO p5ex2htrQoHWw== Date: Sun, 22 Mar 2026 14:31:13 +0000 To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter From: Alexander Koskovich Cc: Jonathan Marek , Neil Armstrong , Pengyu Luo , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Alexander Koskovich Subject: [PATCH RFC] drm/msm/dpu: calculate data_width like downstream Message-ID: <20260322-fix-data-width-calc-v1-1-128880f5a067@pm.me> Feedback-ID: 37836894:user:proton X-Pm-Message-ID: b2250f69380c06374677a845eaed5e451dbd539b Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Derive INTF data_width from dce_bytes_per_line rather than timing->width when DSC is enabled. Use DIV_ROUND_UP to avoid rounding errors. Signed-off-by: Alexander Koskovich --- This patch changes the data_width calculation to match downstream, and avoids needing to change the divisor for timing->width to /24. However I am not sure if this is a correct approach, but at least with this I get the same values for data_width as downstream now: data_width w/ no widebus before: 288 after: 360 data_with w/ widebus before: 144 after: 180 This was tested with the BOE BF068MWM-TD0 on the Nothing Phone (3a), it would be greatly appreciated if someone from QCOM could weigh in on if this is a correct approach. Tested with kmscube and getting 120FPS, also note that this was tested with a few other changes: (drm/msm/dsi: fix hdisplay calculation when programming dsi registers) (drm/msm/dsi: fix pclk rate calculation for bonded dsi) (drm/msm/dsi: fix bits_per_pclk) (drm/msm/dsi: fix hdisplay calculation for CMD mode panel) --- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 23 +++++++++++++++++-= ---- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 1 + 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers= /gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 0ba777bda253..ba810f26ea30 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -10,6 +10,7 @@ #include "dpu_formats.h" #include "dpu_trace.h" #include "disp/msm_disp_snapshot.h" +#include "msm_dsc_helper.h" =20 #include #include @@ -136,6 +137,7 @@ static void drm_mode_to_intf_timing_params( timing->width =3D timing->width * drm_dsc_get_bpp_int(dsc) / (dsc->bits_per_component * 3); timing->xres =3D timing->width; + timing->dce_bytes_per_line =3D msm_dsc_get_bytes_per_line(dsc); } } =20 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/= msm/disp/dpu1/dpu_hw_intf.c index 7e620f590984..de6b5b0f70c4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -173,13 +173,26 @@ static void dpu_hw_intf_setup_timing_engine(struct dp= u_hw_intf *intf, data_width =3D p->width; =20 /* - * If widebus is enabled, data is valid for only half the active window - * since the data rate is doubled in this mode. But for the compression - * mode in DP case, the p->width is already adjusted in - * drm_mode_to_intf_timing_params() + * If widebus is disabled: + * For uncompressed stream, the data is valid for the entire active + * window period. + * For compressed stream, data is valid for a shorter time period + * inside the active window depending on the compression ratio. + * + * If widebus is enabled: + * For uncompressed stream, data is valid for only half the active + * window, since the data rate is doubled in this mode. + * For compressed stream, data validity window needs to be adjusted for + * compression ratio and then further halved. */ - if (p->wide_bus_en && !dp_intf) + if (p->compression_en && !dp_intf) { + if (p->wide_bus_en) + data_width =3D DIV_ROUND_UP(p->dce_bytes_per_line, 6); + else + data_width =3D DIV_ROUND_UP(p->dce_bytes_per_line, 3); + } else if (p->wide_bus_en && !dp_intf) { data_width =3D p->width >> 1; + } =20 /* TODO: handle DSC+DP case, we only handle DSC+DSI case so far */ if (p->compression_en && !dp_intf && diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h b/drivers/gpu/drm/= msm/disp/dpu1/dpu_hw_intf.h index f6ef2c21b66d..badd26305fc9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h @@ -35,6 +35,7 @@ struct dpu_hw_intf_timing_params { =20 bool wide_bus_en; bool compression_en; + u32 dce_bytes_per_line; }; =20 struct dpu_hw_intf_prog_fetch { --- base-commit: f338e77383789c0cae23ca3d48adcc5e9e137e3c change-id: 20260322-fix-data-width-calc-c44287df08b8 Best regards, --=20 Alexander Koskovich