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Bottomley" , linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v4 09/12] scsi: ufs: ufs-qcom: Implement vops tx_eqtr_notify() Date: Fri, 20 Mar 2026 20:10:18 -0700 Message-Id: <20260321031021.1722459-10-can.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260321031021.1722459-1-can.guo@oss.qualcomm.com> References: <20260321031021.1722459-1-can.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Qo3vAMsUhKLp54TyqviM-uTGVHzMTAJ1 X-Authority-Analysis: v=2.4 cv=ZPDaWH7b c=1 sm=1 tr=0 ts=69be0c62 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=nGGDM5cuOJ86brUDmcsA:9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzIxMDAyNCBTYWx0ZWRfX+/CmQLDfYRv5 NB0WYlpwKJRpvBXYUI02fJvd+HiAduFKwbDwv38BypSwI5K2t2M6vYPnKgabVBLIdlG9Yr3KA8Y YSI1F5xc8hm8HgWv+bfksqdfKiEO3pYjdEJltFZ4Gd9dxYY+2Re2aJGdji1d6vhA+2SRPY5aUW4 4ex7+KBIDLxg1p/aM1pX1mCrgAm/rc5+5nX8qoN7vwaFEvpOhHVZefuY8k5+/PjcURtYg05KhzV rpiviOC4kUFl1Q3iorLcvn6gOoyUymBSsHzCpfguyCznoPSOqpsXdT96cbWKvh7muH6dkUfO9UB 6Af8NDtvMwv3ardCbKjhRZvTqmiv8aT1wln81nzc0aarivD1qNPuCflW48gp2UrdL/ywbuUp29g 5RB1gC/wLBYQLQ1XzSZF/E4PCZi0D7b70kV2JfMmZoIvTEIslyspBGDXxuHKo8qyJIHdLd/+fdQ nDf9TrgpV2eR7R6O/IA== X-Proofpoint-GUID: Qo3vAMsUhKLp54TyqviM-uTGVHzMTAJ1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-21_01,2026-03-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 impostorscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603210024 Content-Type: text/plain; charset="utf-8" On some platforms, HW does not support triggering TX EQTR from the most reliable High-Speed (HS) Gear (HS Gear1), but only allows to trigger TX EQTR for the target HS Gear from the same HS Gear. To work around the HW limitation, implement vops tx_eqtr_notify() to change Power Mode to the target TX EQTR HS Gear prior to TX EQTR procedure and change Power Mode back to HS Gear1 (the most reliable gear) post TX EQTR procedure. Signed-off-by: Can Guo Reviewed-by: Bean Huo --- drivers/ufs/host/ufs-qcom.c | 41 +++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index b94fe93b830e..eac5e95e740b 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -2505,6 +2505,46 @@ static u32 ufs_qcom_freq_to_gear_speed(struct ufs_hb= a *hba, unsigned long freq) return min_t(u32, gear, hba->max_pwr_info.info.gear_rx); } =20 +static int ufs_qcom_tx_eqtr_notify(struct ufs_hba *hba, + enum ufs_notify_change_status status, + struct ufs_pa_layer_attr *pwr_mode) +{ + struct ufs_qcom_host *host =3D ufshcd_get_variant(hba); + struct ufs_pa_layer_attr pwr_mode_hs_g1 =3D { + .gear_rx =3D UFS_HS_G1, + .gear_tx =3D UFS_HS_G1, + .lane_rx =3D pwr_mode->lane_rx, + .lane_tx =3D pwr_mode->lane_tx, + .pwr_rx =3D FAST_MODE, + .pwr_tx =3D FAST_MODE, + .hs_rate =3D pwr_mode->hs_rate, + }; + u32 gear =3D pwr_mode->gear_tx; + u32 rate =3D pwr_mode->hs_rate; + int ret; + + if (host->hw_ver.major !=3D 0x7 || host->hw_ver.minor > 0x1) + return 0; + + if (status =3D=3D PRE_CHANGE) { + /* PMC to target HS Gear. */ + ret =3D ufshcd_change_power_mode(hba, pwr_mode, + UFSHCD_PMC_POLICY_DONT_FORCE); + if (ret) + dev_err(hba->dev, "%s: Failed to PMC to target HS-G%u, Rate-%s: %d\n", + __func__, gear, ufs_hs_rate_to_str(rate), ret); + } else { + /* PMC back to HS-G1. */ + ret =3D ufshcd_change_power_mode(hba, &pwr_mode_hs_g1, + UFSHCD_PMC_POLICY_DONT_FORCE); + if (ret) + dev_err(hba->dev, "%s: Failed to PMC to HS-G1, Rate-%s: %d\n", + __func__, ufs_hs_rate_to_str(rate), ret); + } + + return ret; +} + /* * struct ufs_hba_qcom_vops - UFS QCOM specific variant operations * @@ -2535,6 +2575,7 @@ static const struct ufs_hba_variant_ops ufs_hba_qcom_= vops =3D { .get_outstanding_cqs =3D ufs_qcom_get_outstanding_cqs, .config_esi =3D ufs_qcom_config_esi, .freq_to_gear_speed =3D ufs_qcom_freq_to_gear_speed, + .tx_eqtr_notify =3D ufs_qcom_tx_eqtr_notify, }; =20 static const struct ufs_hba_variant_ops ufs_hba_qcom_sa8255p_vops =3D { --=20 2.34.1