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[144.49.247.102]) by smtp-relay.gmail.com with ESMTPS id 586e51a60fabf-41c14e0a584sm462189fac.13.2026.03.20.13.33.47 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 20 Mar 2026 13:33:48 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-qk1-f200.google.com with SMTP id af79cd13be357-8cd80bea54dso1388980885a.3 for ; Fri, 20 Mar 2026 13:33:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1774038827; x=1774643627; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1CXtTypYyHqjl2V69Ghw/md4zg3U7POaN7Ulg0LlUBU=; b=faaQK0pwL820M7tRl1pQ09cXnew/+OTBafmmefd1j6ti/iyi4/TZzdVRmZEx6eWKVQ vAW9uxNzcm3sk7+wJAKY0FtxIr6G1MQkooCM5YidxHl3Am/pZ5mN644IARWz7HEMtwUX Al0unux6zLlVSE+A4ez6/Hy72xfuZWak108qY= X-Forwarded-Encrypted: i=1; AJvYcCVH4KBneuTe+prY0WNU5ZLgshYiaf8kQxgAs2w+kqMqv78dD+WL7AoqU+QgSGD2WxoskgfmXZI2t/c/g4s=@vger.kernel.org X-Received: by 2002:a05:620a:4689:b0:8cd:af31:b416 with SMTP id af79cd13be357-8cfc7f4b0a7mr653888685a.34.1774038827023; Fri, 20 Mar 2026 13:33:47 -0700 (PDT) X-Received: by 2002:a05:620a:4689:b0:8cd:af31:b416 with SMTP id af79cd13be357-8cfc7f4b0a7mr653880885a.34.1774038826140; Fri, 20 Mar 2026 13:33:46 -0700 (PDT) Received: from mail.broadcom.net ([192.19.144.250]) by smtp.gmail.com with ESMTPSA id af79cd13be357-8cfc8fb9c10sm280699985a.19.2026.03.20.13.33.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Mar 2026 13:33:45 -0700 (PDT) From: Kamal Dasu To: Ulf Hansson , Adrian Hunter , Kees Cook Cc: Tony Luck , "Guilherme G . Piccoli" , Florian Fainelli , Arend van Spriel , William Zhang , bcm-kernel-feedback-list@broadcom.com, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Kamal Dasu Subject: [PATCH v4 2/4] mmc: sdhci: Implement panic-context write support Date: Fri, 20 Mar 2026 16:32:47 -0400 Message-Id: <20260320203249.1965044-3-kamal.dasu@broadcom.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260320203249.1965044-1-kamal.dasu@broadcom.com> References: <20260320203249.1965044-1-kamal.dasu@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Content-Type: text/plain; charset="utf-8" Implement the panic-context host operations for SDHCI controllers: sdhci_panic_prepare(): Reset the controller, drain any pending requests by polling Present State, and clear interrupt status to start from a known-good state. sdhci_panic_poll_completion(): Poll for command and data completion using register reads instead of waiting for interrupts. sdhci_panic_complete(): Clear interrupt status and restore the host to normal operation after panic I/O. Make sdhci_send_command_retry() panic-safe by using mdelay() instead of usleep_range() when oops_in_progress is set, and suppress WARN output during panic. Add oops_in_progress guards to sdhci_timeout_timer() and sdhci_timeout_data_timer() to prevent spurious timeout handling during panic writes. Signed-off-by: Kamal Dasu --- drivers/mmc/host/sdhci.c | 169 ++++++++++++++++++++++++++++++++++++++- drivers/mmc/host/sdhci.h | 6 ++ 2 files changed, 171 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index fec9329e1edb..c40084e07eca 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1765,17 +1766,22 @@ static bool sdhci_send_command_retry(struct sdhci_h= ost *host, =20 while (!sdhci_send_command(host, cmd)) { if (!timeout--) { - pr_err("%s: Controller never released inhibit bit(s).\n", - mmc_hostname(host->mmc)); + if (!oops_in_progress) { + pr_err("%s: Controller never released inhibit bit(s).\n", + mmc_hostname(host->mmc)); + sdhci_dumpregs(host); + } sdhci_err_stats_inc(host, CTRL_TIMEOUT); - sdhci_dumpregs(host); cmd->error =3D -EIO; return false; } =20 spin_unlock_irqrestore(&host->lock, flags); =20 - usleep_range(1000, 1250); + if (unlikely(oops_in_progress)) + mdelay(1); + else + usleep_range(1000, 1250); =20 present =3D host->mmc->ops->get_cd(host->mmc); =20 @@ -3076,6 +3082,152 @@ static void sdhci_card_event(struct mmc_host *mmc) spin_unlock_irqrestore(&host->lock, flags); } =20 +/* + * Panic-context operations for pstore backends. + * These run with interrupts disabled and other CPUs stopped. + */ + +#define SDHCI_PANIC_POLL_ITERATIONS 2000 +#define SDHCI_PANIC_POLL_DELAY_US 500 +#define SDHCI_PANIC_MIN_POLL_COUNT 300 +#define SDHCI_PANIC_RESET_TIMEOUT_US 100000 +#define SDHCI_PANIC_DRAIN_TIMEOUT_US 100000 + +/** + * sdhci_panic_prepare - Prepare SDHCI controller for panic-context I/O + * @mmc: MMC host structure + * + * Called during kernel panic. Drains any in-flight request, resets the + * CMD and DATA lines, then clears software state under spinlock. + * The drain + reset ensures no stopped CPU is still inside sdhci_irq + * holding host->lock by the time we take it. + */ +int sdhci_panic_prepare(struct mmc_host *mmc) +{ + struct sdhci_host *host =3D mmc_priv(mmc); + unsigned long flags; + u32 present; + u8 val; + int ret; + + /* + * If the controller has a request in flight, give it a short + * bounded time to finish. The CMD/DATA reset below will + * force-abort anything that doesn't complete in time. + */ + present =3D sdhci_readl(host, SDHCI_PRESENT_STATE); + if (present & (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) { + readl_poll_timeout_atomic(host->ioaddr + SDHCI_PRESENT_STATE, + present, + !(present & (SDHCI_CMD_INHIBIT | + SDHCI_DATA_INHIBIT)), + 10, SDHCI_PANIC_DRAIN_TIMEOUT_US); + } + + sdhci_writeb(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA, + SDHCI_SOFTWARE_RESET); + + ret =3D readb_poll_timeout_atomic(host->ioaddr + SDHCI_SOFTWARE_RESET, + val, !(val & (SDHCI_RESET_CMD | SDHCI_RESET_DATA)), + 10, SDHCI_PANIC_RESET_TIMEOUT_US); + + spin_lock_irqsave(&host->lock, flags); + host->cmd =3D NULL; + host->data =3D NULL; + host->data_cmd =3D NULL; + host->mrqs_done[0] =3D NULL; + host->mrqs_done[1] =3D NULL; + spin_unlock_irqrestore(&host->lock, flags); + + if (host->ops && host->ops->panic_prepare) + host->ops->panic_prepare(host); + + return ret; +} +EXPORT_SYMBOL_GPL(sdhci_panic_prepare); + +/** + * sdhci_panic_poll_completion - Poll SDHCI registers for request completi= on + * @mmc: MMC host structure + * @mrq: MMC request being polled for completion + * + * Checks interrupt status and present state registers to determine if a + * request has completed. Used during panic when interrupts are disabled. + */ +bool sdhci_panic_poll_completion(struct mmc_host *mmc, struct mmc_request = *mrq) +{ + struct sdhci_host *host =3D mmc_priv(mmc); + unsigned int poll_count; + u32 int_status, present; + + for (poll_count =3D 0; poll_count < SDHCI_PANIC_POLL_ITERATIONS; + poll_count++) { + cpu_relax(); + udelay(SDHCI_PANIC_POLL_DELAY_US); + + int_status =3D sdhci_readl(host, SDHCI_INT_STATUS); + + if (int_status & SDHCI_INT_ERROR) { + if (mrq->cmd) + mrq->cmd->error =3D -EIO; + if (mrq->data) + mrq->data->error =3D -EIO; + sdhci_writel(host, int_status, SDHCI_INT_STATUS); + return true; + } + + if (int_status & SDHCI_INT_RESPONSE) + sdhci_writel(host, SDHCI_INT_RESPONSE, + SDHCI_INT_STATUS); + + if (int_status & SDHCI_INT_DATA_END) + sdhci_writel(host, SDHCI_INT_DATA_END, + SDHCI_INT_STATUS); + + /* + * Use the same completion heuristic as the working v5 + * implementation: after a minimum number of poll + * iterations, treat the request as complete when the + * DATA_INHIBIT bit clears (controller is idle). + */ + if (poll_count >=3D SDHCI_PANIC_MIN_POLL_COUNT) { + present =3D sdhci_readl(host, SDHCI_PRESENT_STATE); + if (!(present & SDHCI_DATA_INHIBIT)) + return true; + } + } + + if (mrq->cmd) + mrq->cmd->error =3D -ETIMEDOUT; + if (mrq->data) + mrq->data->error =3D -ETIMEDOUT; + return false; +} +EXPORT_SYMBOL_GPL(sdhci_panic_poll_completion); + +/** + * sdhci_panic_complete - Clean up SDHCI state after a panic-context reque= st + * @mmc: MMC host structure + * @mrq: MMC request that has completed + * + * Clears host software state under spinlock so the next panic request + * starts clean. + */ +void sdhci_panic_complete(struct mmc_host *mmc, struct mmc_request *mrq) +{ + struct sdhci_host *host =3D mmc_priv(mmc); + unsigned long flags; + + spin_lock_irqsave(&host->lock, flags); + host->cmd =3D NULL; + host->data =3D NULL; + host->data_cmd =3D NULL; + host->mrqs_done[0] =3D NULL; + host->mrqs_done[1] =3D NULL; + spin_unlock_irqrestore(&host->lock, flags); +} +EXPORT_SYMBOL_GPL(sdhci_panic_complete); + static const struct mmc_host_ops sdhci_ops =3D { .request =3D sdhci_request, .post_req =3D sdhci_post_req, @@ -3091,6 +3243,9 @@ static const struct mmc_host_ops sdhci_ops =3D { .execute_tuning =3D sdhci_execute_tuning, .card_event =3D sdhci_card_event, .card_busy =3D sdhci_card_busy, + .panic_prepare =3D sdhci_panic_prepare, + .panic_poll_completion =3D sdhci_panic_poll_completion, + .panic_complete =3D sdhci_panic_complete, }; =20 /*************************************************************************= ****\ @@ -3242,6 +3397,9 @@ static void sdhci_timeout_timer(struct timer_list *t) =20 host =3D timer_container_of(host, t, timer); =20 + if (oops_in_progress) + return; + spin_lock_irqsave(&host->lock, flags); =20 if (host->cmd && !sdhci_data_line_cmd(host->cmd)) { @@ -3264,6 +3422,9 @@ static void sdhci_timeout_data_timer(struct timer_lis= t *t) =20 host =3D timer_container_of(host, t, data_timer); =20 + if (oops_in_progress) + return; + spin_lock_irqsave(&host->lock, flags); =20 if (host->data || host->data_cmd || diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index b6a571d866fa..396eca56439f 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -724,6 +724,7 @@ struct sdhci_ops { void (*dump_vendor_regs)(struct sdhci_host *host); void (*dump_uhs2_regs)(struct sdhci_host *host); void (*uhs2_pre_detect_init)(struct sdhci_host *host); + void (*panic_prepare)(struct sdhci_host *host); }; =20 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS @@ -906,6 +907,11 @@ void sdhci_switch_external_dma(struct sdhci_host *host= , bool en); void sdhci_set_data_timeout_irq(struct sdhci_host *host, bool enable); void __sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd); =20 +int sdhci_panic_prepare(struct mmc_host *mmc); +bool sdhci_panic_poll_completion(struct mmc_host *mmc, + struct mmc_request *mrq); +void sdhci_panic_complete(struct mmc_host *mmc, struct mmc_request *mrq); + #if defined(CONFIG_DYNAMIC_DEBUG) || \ (defined(CONFIG_DYNAMIC_DEBUG_CORE) && defined(DYNAMIC_DEBUG_MODULE)) #define SDHCI_DBG_ANYWAY 0 --=20 2.34.1