From nobody Mon Apr 6 09:11:30 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D628A24BBEE for ; Fri, 20 Mar 2026 19:03:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774033414; cv=none; b=axaXKzJimwx6peOILK2Sw3V5cQnTeP6JfcP1AOofaebgDefGAmf1bnvkk2PiyJIn1Vz1+Dy47UCK4q819bjbxg8jECMsopZFOiSBNNy1slTyQAbxFS4y+uWfhuU20PyPkdBnlcnk1JRmRG1vpmCUqiox466lES1AXJ598O4QLH4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774033414; c=relaxed/simple; bh=ssZZR5NQEwQd0eC7noZlcIf2z1AJvKSvPlgDEqtjUqA=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=t04Wv2H++C927QhyquN8tEVkM7abYuo/AGYc+Wj9gL2Z41A1AHsYO3BdDFOgTyrESbpHJs8VbkvHkd72dAwkjq8JxXnxILgJZ14LXRBgrzKIjIa3EywkEhJZQ0oIxJIKYAqSnFcLmb3ywPH3tyZJloVUOSdJLnacEmwPkr1jKAY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=GykDLxD3; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="GykDLxD3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774033413; x=1805569413; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=ssZZR5NQEwQd0eC7noZlcIf2z1AJvKSvPlgDEqtjUqA=; b=GykDLxD39AXW86X4vmcGErCX9vufQEQ0Xn8vLFNvLhR6L8wlG4oYg7b7 8UZtHncFRC2cGlwGJlsbDw8k0G/a8o1nnlrcHzGbITMiwIgf69pRGyjE+ yYKYrMn8GKh6HL/neTVvYbbJdcu0kUq5WQ3ym4b/cuRMsQFDe8fLrHm8B U3WgkATLT1PBtMcsKCV0gWRgMj6f/PZkV/JVVMyVtEW8JTtPpdJspIt0J +Nic/yGbvjEdwrpKv2A5XqvXs/x8YBmBlhSFvVC9FhVqEXNVS6ZIlLRP6 QtVhjR2tDEIgkbCB+qEFRcdMwKsVP0hYTZlj1p0dO0vD0D++QDl1pj+Yn Q==; X-CSE-ConnectionGUID: 1nbpdFyOSa+ifxgk8Mmj7A== X-CSE-MsgGUID: fp5bnOdIRemlBO/p7dcRZg== X-IronPort-AV: E=McAfee;i="6800,10657,11735"; a="86200617" X-IronPort-AV: E=Sophos;i="6.23,130,1770624000"; d="scan'208";a="86200617" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2026 12:03:33 -0700 X-CSE-ConnectionGUID: Bl7WBjTCR0a8/e4Ssmxo3g== X-CSE-MsgGUID: O+bdJ2ZnTbuMwavnKeP2Mw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,130,1770624000"; d="scan'208";a="222597395" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa010.jf.intel.com with ESMTP; 20 Mar 2026 12:03:32 -0700 Subject: [PATCH 1/8] x86/msr: Use "raw_" names for calls to native_* functions To: linux-kernel@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, Juergen Gross , virtualization@lists.linux.dev, Dave Hansen From: Dave Hansen Date: Fri, 20 Mar 2026 12:03:32 -0700 References: <20260320190330.A97C443B@davehans-spike.ostc.intel.com> In-Reply-To: <20260320190330.A97C443B@davehans-spike.ostc.intel.com> Message-Id: <20260320190332.DF9F7A9B@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen Currently, the paravirt and native code define a common set of MSR functions. But, some of the code is duplicated between the two. For instance, the packing and unpacking of the 64-bit MSR value into two 32-bit values is done in both. Introduce a new abstraction layer: "raw" calls. For now, define and use them only in the native case. This lays the foundation of having the paravirt code also defined "raw" calls. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/msr.h | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff -puN arch/x86/include/asm/msr.h~raw_msr_names arch/x86/include/asm/msr= .h --- a/arch/x86/include/asm/msr.h~raw_msr_names 2026-03-20 11:24:18.21775651= 7 -0700 +++ b/arch/x86/include/asm/msr.h 2026-03-20 11:24:18.220756650 -0700 @@ -173,6 +173,12 @@ static inline u64 native_read_pmc(int co #include #else #include + +#define raw_read_msr native_read_msr +#define raw_read_msr_safe native_read_msr_safe +#define raw_write_msr native_write_msr +#define raw_write_msr_safe native_write_msr_safe + /* * Access to machine-specific registers (available on 586 and better only) * Note: the rd* operations modify the parameters directly (without using @@ -181,35 +187,35 @@ static inline u64 native_read_pmc(int co =20 #define rdmsr(msr, low, high) \ do { \ - u64 __val =3D native_read_msr((msr)); \ + u64 __val =3D raw_read_msr((msr)); \ (void)((low) =3D (u32)__val); \ (void)((high) =3D (u32)(__val >> 32)); \ } while (0) =20 static inline void wrmsr(u32 msr, u32 low, u32 high) { - native_write_msr(msr, (u64)high << 32 | low); + raw_write_msr(msr, (u64)high << 32 | low); } =20 #define rdmsrq(msr, val) \ - ((val) =3D native_read_msr((msr))) + ((val) =3D raw_read_msr((msr))) =20 static inline void wrmsrq(u32 msr, u64 val) { - native_write_msr(msr, val); + raw_write_msr(msr, val); } =20 /* wrmsr with exception handling */ static inline int wrmsrq_safe(u32 msr, u64 val) { - return native_write_msr_safe(msr, val); + return raw_write_msr_safe(msr, val); } =20 /* rdmsr with exception handling */ #define rdmsr_safe(msr, low, high) \ ({ \ u64 __val; \ - int __err =3D native_read_msr_safe((msr), &__val); \ + int __err =3D raw_read_msr_safe((msr), &__val); \ (*low) =3D (u32)__val; \ (*high) =3D (u32)(__val >> 32); \ __err; \ @@ -217,7 +223,7 @@ static inline int wrmsrq_safe(u32 msr, u =20 static inline int rdmsrq_safe(u32 msr, u64 *p) { - return native_read_msr_safe(msr, p); + return raw_read_msr_safe(msr, p); } =20 static __always_inline u64 rdpmc(int counter) _ From nobody Mon Apr 6 09:11:30 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B16003242BC for ; Fri, 20 Mar 2026 19:03:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774033417; cv=none; b=VIVjFmv8kerSQ1ti4MNqAzlTHuotb2FZJprGNtq6j4iENkOM4k2ho3UYTzDzWVeshqhWPYcVlF1/zC8FOYWrnjgfBZkOoWWVM7Ra9qmnr0khYJAQWjhE5a8zO8t0MWTqouc+z44ZPdJlO5q/pHU0/i6zveMBZabhE94HApNMjAI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774033417; c=relaxed/simple; bh=9ISTsenTYWVlPRS3URy3VkQJK84BuXlX5yklXUs1MGQ=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=O9QRqjCeVuHrup3nlufEW7NACvV0/k8cuxWrppph9Lb+1UhZ1Lw9E9Du+dAlBwWqAkY2FNjX+SIDqbFqk0hoyYwN9qK59MAS0jX2PwrxpSesZ3I7B1VfPc+O/KxmXOHYc7L6phnpDqU9roDygpjSj1FJZU2rcoGJa9KmvzwMiTw= ARC-Authentication-Results: i=1; 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charset="utf-8" From: Dave Hansen The paravirt and native code define very similar rdmsr() implementations. Move the native one out to common code and ensure it can find the paravirt implementation by defining raw_read_msr() there. Remove the now duplicate paravirt rdmsr(). Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/msr.h | 20 +++++++++++++------- b/arch/x86/include/asm/paravirt.h | 7 ------- 2 files changed, 13 insertions(+), 14 deletions(-) diff -puN arch/x86/include/asm/msr.h~rdmsr-dups-2 arch/x86/include/asm/msr.h --- a/arch/x86/include/asm/msr.h~rdmsr-dups-2 2026-03-20 11:24:18.760780632= -0700 +++ b/arch/x86/include/asm/msr.h 2026-03-20 11:24:18.767780943 -0700 @@ -171,6 +171,9 @@ static inline u64 native_read_pmc(int co =20 #ifdef CONFIG_PARAVIRT_XXL #include + +#define raw_read_msr paravirt_read_msr + #else #include =20 @@ -185,13 +188,6 @@ static inline u64 native_read_pmc(int co * pointer indirection), this allows gcc to optimize better */ =20 -#define rdmsr(msr, low, high) \ -do { \ - u64 __val =3D raw_read_msr((msr)); \ - (void)((low) =3D (u32)__val); \ - (void)((high) =3D (u32)(__val >> 32)); \ -} while (0) - static inline void wrmsr(u32 msr, u32 low, u32 high) { raw_write_msr(msr, (u64)high << 32 | low); @@ -233,6 +229,16 @@ static __always_inline u64 rdpmc(int cou =20 #endif /* !CONFIG_PARAVIRT_XXL */ =20 +/* + * Common paravirt and native helpers: + */ +#define rdmsr(msr, low, high) \ +do { \ + u64 __val =3D raw_read_msr((msr)); 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charset="utf-8" From: Dave Hansen Use the new "raw_" indirection and consolidate the two rdmsr_safe() implementations down to one. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/msr.h | 21 +++++++++++---------- b/arch/x86/include/asm/paravirt.h | 10 ---------- 2 files changed, 11 insertions(+), 20 deletions(-) diff -puN arch/x86/include/asm/msr.h~rdmsr-dups-4 arch/x86/include/asm/msr.h --- a/arch/x86/include/asm/msr.h~rdmsr-dups-4 2026-03-20 11:24:19.323805632= -0700 +++ b/arch/x86/include/asm/msr.h 2026-03-20 11:24:19.330805942 -0700 @@ -173,6 +173,7 @@ static inline u64 native_read_pmc(int co #include =20 #define raw_read_msr paravirt_read_msr +#define raw_read_msr_safe paravirt_read_msr_safe =20 #else #include @@ -207,16 +208,6 @@ static inline int wrmsrq_safe(u32 msr, u return raw_write_msr_safe(msr, val); } =20 -/* rdmsr with exception handling */ -#define rdmsr_safe(msr, low, high) \ -({ \ - u64 __val; \ - int __err =3D raw_read_msr_safe((msr), &__val); \ - (*low) =3D (u32)__val; \ - (*high) =3D (u32)(__val >> 32); \ - __err; \ -}) - static inline int rdmsrq_safe(u32 msr, u64 *p) { return raw_read_msr_safe(msr, p); @@ -239,6 +230,16 @@ do { \ (void)((high) =3D (u32)(__val >> 32)); \ } while (0) =20 +/* rdmsr with exception handling */ +#define rdmsr_safe(msr, low, high) \ +({ \ + u64 __val; \ + int __err =3D raw_read_msr_safe((msr), &__val); \ + (*low) =3D (u32)__val; \ + (*high) =3D (u32)(__val >> 32); \ + __err; \ +}) + /* Instruction opcode for WRMSRNS supported in binutils >=3D 2.40 */ #define ASM_WRMSRNS _ASM_BYTES(0x0f,0x01,0xc6) =20 diff -puN arch/x86/include/asm/paravirt.h~rdmsr-dups-4 arch/x86/include/asm= /paravirt.h --- a/arch/x86/include/asm/paravirt.h~rdmsr-dups-4 2026-03-20 11:24:19.3278= 05809 -0700 +++ b/arch/x86/include/asm/paravirt.h 2026-03-20 11:24:19.330805942 -0700 @@ -181,16 +181,6 @@ static inline int wrmsrq_safe(u32 msr, u return paravirt_write_msr_safe(msr, val); } =20 -/* rdmsr with exception handling */ -#define rdmsr_safe(msr, a, b) \ -({ \ - u64 _l; \ - int _err =3D paravirt_read_msr_safe((msr), &_l); \ - (*a) =3D (u32)_l; \ - (*b) =3D (u32)(_l >> 32); \ - _err; \ -}) - static __always_inline int rdmsrq_safe(u32 msr, u64 *p) { return paravirt_read_msr_safe(msr, p); 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charset="utf-8" From: Dave Hansen Use the new "raw_" indirection and consolidate the two rdmsrq() implementations down to one. The paravirt implementation was probably better, but just stick with the native one here for consistency. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/msr.h | 6 +++--- b/arch/x86/include/asm/paravirt.h | 5 ----- 2 files changed, 3 insertions(+), 8 deletions(-) diff -puN arch/x86/include/asm/msr.h~rdmsr-dups-5 arch/x86/include/asm/msr.h --- a/arch/x86/include/asm/msr.h~rdmsr-dups-5 2026-03-20 11:24:19.885830584= -0700 +++ b/arch/x86/include/asm/msr.h 2026-03-20 11:24:19.892830895 -0700 @@ -194,9 +194,6 @@ static inline void wrmsr(u32 msr, u32 lo raw_write_msr(msr, (u64)high << 32 | low); } =20 -#define rdmsrq(msr, val) \ - ((val) =3D raw_read_msr((msr))) - static inline void wrmsrq(u32 msr, u64 val) { raw_write_msr(msr, val); @@ -240,6 +237,9 @@ do { \ __err; \ }) =20 +#define rdmsrq(msr, val) \ + ((val) =3D raw_read_msr((msr))) + /* Instruction opcode for WRMSRNS supported in binutils >=3D 2.40 */ #define ASM_WRMSRNS _ASM_BYTES(0x0f,0x01,0xc6) =20 diff -puN arch/x86/include/asm/paravirt.h~rdmsr-dups-5 arch/x86/include/asm= /paravirt.h --- a/arch/x86/include/asm/paravirt.h~rdmsr-dups-5 2026-03-20 11:24:19.8888= 30717 -0700 +++ b/arch/x86/include/asm/paravirt.h 2026-03-20 11:24:19.891830851 -0700 @@ -166,11 +166,6 @@ static __always_inline void wrmsr(u32 ms paravirt_write_msr(msr, (u64)high << 32 | low); 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20 Mar 2026 12:03:38 -0700 Subject: [PATCH 5/8] x86/msr: Consolidate {rd,wr}msr[q]_safe() implementations To: linux-kernel@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, Juergen Gross , virtualization@lists.linux.dev, Dave Hansen From: Dave Hansen Date: Fri, 20 Mar 2026 12:03:37 -0700 References: <20260320190330.A97C443B@davehans-spike.ostc.intel.com> In-Reply-To: <20260320190330.A97C443B@davehans-spike.ostc.intel.com> Message-Id: <20260320190337.9AB0C060@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen These should be very familiar by now. Use the "raw_" indirection to consolidate the duplicate implementations. Do four at once now because these are quite straightforward. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/msr.h | 44 +++++++++++++++++++--------------= ----- b/arch/x86/include/asm/paravirt.h | 20 ----------------- 2 files changed, 23 insertions(+), 41 deletions(-) diff -puN arch/x86/include/asm/msr.h~rdmsr-dups-6 arch/x86/include/asm/msr.h --- a/arch/x86/include/asm/msr.h~rdmsr-dups-6 2026-03-20 11:24:20.448855576= -0700 +++ b/arch/x86/include/asm/msr.h 2026-03-20 11:24:20.455855887 -0700 @@ -174,6 +174,8 @@ static inline u64 native_read_pmc(int co =20 #define raw_read_msr paravirt_read_msr #define raw_read_msr_safe paravirt_read_msr_safe +#define raw_write_msr paravirt_write_msr +#define raw_write_msr_safe paravirt_write_msr_safe =20 #else #include @@ -189,27 +191,6 @@ static inline u64 native_read_pmc(int co * pointer indirection), this allows gcc to optimize better */ =20 -static inline void wrmsr(u32 msr, u32 low, u32 high) -{ - raw_write_msr(msr, (u64)high << 32 | low); -} - -static inline void wrmsrq(u32 msr, u64 val) -{ - raw_write_msr(msr, val); -} - -/* wrmsr with exception handling */ -static inline int wrmsrq_safe(u32 msr, u64 val) -{ - return raw_write_msr_safe(msr, val); -} - -static inline int rdmsrq_safe(u32 msr, u64 *p) -{ - return raw_read_msr_safe(msr, p); -} - static __always_inline u64 rdpmc(int counter) { return native_read_pmc(counter); @@ -240,6 +221,27 @@ do { \ #define rdmsrq(msr, val) \ ((val) =3D raw_read_msr((msr))) =20 +static inline int rdmsrq_safe(u32 msr, u64 *p) +{ + return raw_read_msr_safe(msr, p); +} + +/* wrmsr with exception handling */ +static inline int wrmsrq_safe(u32 msr, u64 val) +{ + return raw_write_msr_safe(msr, val); +} + +static inline void wrmsr(u32 msr, u32 low, u32 high) +{ + raw_write_msr(msr, (u64)high << 32 | low); +} + +static inline void wrmsrq(u32 msr, u64 val) +{ + raw_write_msr(msr, val); +} + /* Instruction opcode for WRMSRNS supported in binutils >=3D 2.40 */ #define ASM_WRMSRNS _ASM_BYTES(0x0f,0x01,0xc6) =20 diff -puN arch/x86/include/asm/paravirt.h~rdmsr-dups-6 arch/x86/include/asm= /paravirt.h --- a/arch/x86/include/asm/paravirt.h~rdmsr-dups-6 2026-03-20 11:24:20.4528= 55754 -0700 +++ b/arch/x86/include/asm/paravirt.h 2026-03-20 11:24:20.455855887 -0700 @@ -161,26 +161,6 @@ static inline int paravirt_write_msr_saf return PVOP_CALL2(int, pv_ops, cpu.write_msr_safe, msr, val); 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charset="utf-8" From: Dave Hansen Doing this is debatable. It does not actually remove any code. But, rdpmc() is the last thing left in the #ifdef CONFIG_PARAVIRT_XXL block and this seems like nice consistency. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/msr.h | 12 +++++++----- b/arch/x86/include/asm/paravirt.h | 2 +- 2 files changed, 8 insertions(+), 6 deletions(-) diff -puN arch/x86/include/asm/msr.h~rdmsr-dups-9 arch/x86/include/asm/msr.h --- a/arch/x86/include/asm/msr.h~rdmsr-dups-9 2026-03-20 11:24:21.013880656= -0700 +++ b/arch/x86/include/asm/msr.h 2026-03-20 11:24:21.020880966 -0700 @@ -176,6 +176,7 @@ static inline u64 native_read_pmc(int co #define raw_read_msr_safe paravirt_read_msr_safe #define raw_write_msr paravirt_write_msr #define raw_write_msr_safe paravirt_write_msr_safe +#define raw_read_pmc paravirt_read_pmc =20 #else #include @@ -184,6 +185,7 @@ static inline u64 native_read_pmc(int co #define raw_read_msr_safe native_read_msr_safe #define raw_write_msr native_write_msr #define raw_write_msr_safe native_write_msr_safe +#define raw_read_pmc native_read_pmc =20 /* * Access to machine-specific registers (available on 586 and better only) @@ -191,11 +193,6 @@ static inline u64 native_read_pmc(int co * pointer indirection), this allows gcc to optimize better */ =20 -static __always_inline u64 rdpmc(int counter) -{ - return native_read_pmc(counter); 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charset="utf-8" From: Dave Hansen I'm not sure any of this makes sense any more. The kernel only runs on "586 and better". The comment about gcc optimization is hopefully decades out of date too. Really, the only reason to keep the wonky semantics where the parameters get modified is to avoid all the churn to make them sane. Not gcc. gcc was probably a bad reason, even back in the day because MSRs are mostly very slow and have always been very slow. A few extra bytes of register shuffling was probably never measurable. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/msr.h | 6 ------ 1 file changed, 6 deletions(-) diff -puN arch/x86/include/asm/msr.h~rdmsr-dups-10 arch/x86/include/asm/msr= .h --- a/arch/x86/include/asm/msr.h~rdmsr-dups-10 2026-03-20 11:24:21.57190541= 8 -0700 +++ b/arch/x86/include/asm/msr.h 2026-03-20 11:24:21.574905551 -0700 @@ -187,12 +187,6 @@ static inline u64 native_read_pmc(int co #define raw_write_msr_safe native_write_msr_safe #define raw_read_pmc native_read_pmc =20 -/* - * Access to machine-specific registers (available on 586 and better only) - * Note: the rd* operations modify the parameters directly (without using - * pointer indirection), this allows gcc to optimize better - */ - #endif /* !CONFIG_PARAVIRT_XXL */ =20 /* _ From nobody Mon Apr 6 09:11:30 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC11C344053 for ; Fri, 20 Mar 2026 19:03:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774033423; cv=none; b=PgLPSWd4TOv/SB9cjvn/VARisRQHic61Kq/Rmcac4RW8LD9DHoHKJIRM7qhSi3RFabD+eFs6PvF4BxjNejH8gGVEvbcqfnleyLiP+WL2JseJJZ7a3amg+hcKBYZB7O4hLQDelak2o0ZRofWtA3o6rOzCoZC0EsVT2z5q8n6zZfc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774033423; c=relaxed/simple; bh=NrSJpQJoTzw1s8yl9H+BJteNaannQhhSlX63g3qpHWQ=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=k3Gi84aHrSi/5A5GIlWC/lA2E6JeJFiwMAYL+R+BSmMLxzo01toSF0gS2nOIjDWbV9hxD3inLHZC+6qdLytwyhZWxlBeTqBFQI7L6Ej8FVeYbrA+4kMITt2l/uyEkYjmteXhCrLO0Tf2nHsF6W1T+lgtqrg1oDYHFrPQjL9FdC0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QD3nWB4E; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QD3nWB4E" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774033422; x=1805569422; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=NrSJpQJoTzw1s8yl9H+BJteNaannQhhSlX63g3qpHWQ=; b=QD3nWB4Ed/D6uxsnYJ5US+VD/0TAibAoKmdQGHI8YVZalraoSVWjGeY5 vHx06e0ixABFSeXwUfZa12BCLzEJp1c2CgXJGdnsxnuH5qeLGWhTInemR 7BIQe1I39EIBW+GXlw/aqhtPZiku0PWh5yrPEurc5WY/Lu38ERKACt6Zb vfkwnkjrbEp8Wu/uD3vLhi0cae2nHyKeIE7cow16md7gyxEEK6kO62tkZ OtVjr4+bd6QHLSf1b8YI1Q+fg8GdXVJSz7u6eoSt8mumakiqZBO4lsjxp RVZYCU7YqEyoXyMrubmKkr1RJmfETAiuegPVeETfRXeMhJht+K9UkRPvL Q==; X-CSE-ConnectionGUID: 02+045jsQ3qbyeyW+B0GvQ== X-CSE-MsgGUID: pBfqUVB1TP+PTXHJYc57wg== X-IronPort-AV: E=McAfee;i="6800,10657,11735"; a="86200693" X-IronPort-AV: E=Sophos;i="6.23,130,1770624000"; d="scan'208";a="86200693" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2026 12:03:42 -0700 X-CSE-ConnectionGUID: C9K867gyQh2EUYbC2QWzlw== X-CSE-MsgGUID: qCVwS6m7StaL7Z76Rw9Amg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,130,1770624000"; d="scan'208";a="222597408" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa010.jf.intel.com with ESMTP; 20 Mar 2026 12:03:41 -0700 Subject: [PATCH 8/8] x86/msr: Remove duplicate #include To: linux-kernel@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, Juergen Gross , virtualization@lists.linux.dev, Dave Hansen From: Dave Hansen Date: Fri, 20 Mar 2026 12:03:41 -0700 References: <20260320190330.A97C443B@davehans-spike.ostc.intel.com> In-Reply-To: <20260320190330.A97C443B@davehans-spike.ostc.intel.com> Message-Id: <20260320190341.CB01C4CB@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen errno.h is already included for C code at the top of the header. Zap the duplicate. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/msr.h | 1 - 1 file changed, 1 deletion(-) diff -puN arch/x86/include/asm/msr.h~rdmsr-dups-11 arch/x86/include/asm/msr= .h --- a/arch/x86/include/asm/msr.h~rdmsr-dups-11 2026-03-20 11:24:22.11392946= 9 -0700 +++ b/arch/x86/include/asm/msr.h 2026-03-20 11:24:22.116929602 -0700 @@ -179,7 +179,6 @@ static inline u64 native_read_pmc(int co #define raw_read_pmc paravirt_read_pmc =20 #else -#include =20 #define raw_read_msr native_read_msr #define raw_read_msr_safe native_read_msr_safe _