From nobody Mon Apr 6 10:45:01 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F1013CF67F; Fri, 20 Mar 2026 15:02:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774018932; cv=none; b=UhslwNSpDOWRaZmplAe9WNxeCt2Aia/VrSm/iAxZ9UFeHatjCoJZZtfaY9YIyoE41sbmRy8GxV3F48AkJw1a71Sq/TDbce+p0/Bq86GQhHGXE9HINvh7923rV8qqUWzal1uOvOCnXllnggNaUV7kCVmaQh7JVr08nAFzr7yPYmU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774018932; c=relaxed/simple; bh=79+vPV9e+OqWLz3onwlm7PbN+48buNA31r4Z7PIHFhY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=B/NZAn7YiFVtNfmNe+ro/2doAMKrr1i7nlzqGTj7U2IJb4WHNFdg8uwu/yz2bZUF2EX6GujVzKHrPEaO1wvOaVgorok65+gmkzaeyAZQ1itClqktX7FSFlSRXSAICTMh3SGRUyk3dJ7kz8MnNkZCHfKGbhGcSBahM0TGFAS0ywI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=QDw7Gk2T; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="QDw7Gk2T" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1774018931; x=1805554931; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=79+vPV9e+OqWLz3onwlm7PbN+48buNA31r4Z7PIHFhY=; b=QDw7Gk2TQNVE1G4S0U3vZ0Ip50Zdrlf83SPE+XvL95we6HtO8bn9b2KJ 5z/XO7Wj1mGtVTepql+6rErwWENSiiZjrzzUo/PKx1IQlhooug7rKfEOT G/PwqGddoKE1Mvsa1icLPXXrv1xFQxwy9ovR5upvcOxPd7C//coPSc4ZI XH/qasj1yhFJ/4NyU4XQO4TYoKhepk7g8fM6KGOlR6wwDEkyn/3rtuEKJ fG5tPAavIsrj9DigmdWSrgFXI68LNIrYGnrcxUIkZ47ONGQsY3PcvnBhB 6aJ2KpPSmEb9pTOn8MwZauMTbPZzoIWqU9bTTRdR0NEEjt+t5Qijo2stB Q==; X-CSE-ConnectionGUID: PI7UURBMS4qqPJi2jv9mYA== X-CSE-MsgGUID: 0+Gqk1r+TmiOADuDEkGwnA== X-IronPort-AV: E=Sophos;i="6.23,130,1770620400"; d="scan'208";a="62637215" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2026 08:02:08 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Fri, 20 Mar 2026 08:01:50 -0700 Received: from DEN-DL-M70577.microsemi.net (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 20 Mar 2026 08:01:47 -0700 From: Daniel Machon Date: Fri, 20 Mar 2026 16:01:06 +0100 Subject: [PATCH net-next 10/10] misc: lan966x-pci: dts: add fdma interrupt to overlay Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260320-lan966x-pci-fdma-v1-10-ef54cb9b0c4b@microchip.com> References: <20260320-lan966x-pci-fdma-v1-0-ef54cb9b0c4b@microchip.com> In-Reply-To: <20260320-lan966x-pci-fdma-v1-0-ef54cb9b0c4b@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Steen Hegelund , , "Alexei Starovoitov" , Daniel Borkmann , "Jesper Dangaard Brouer" , John Fastabend , Stanislav Fomichev , Herve Codina , Arnd Bergmann , Greg Kroah-Hartman CC: , , X-Mailer: b4 0.14.3 Add the fdma interrupt (OIC interrupt 14) to the lan966x PCI device tree overlay, enabling FDMA-based frame injection/extraction when the switch is connected over PCIe. Signed-off-by: Daniel Machon --- drivers/misc/lan966x_pci.dtso | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/misc/lan966x_pci.dtso b/drivers/misc/lan966x_pci.dtso index 7bb726550caf..5bb12dbc0843 100644 --- a/drivers/misc/lan966x_pci.dtso +++ b/drivers/misc/lan966x_pci.dtso @@ -141,8 +141,9 @@ switch: switch@e0000000 { =20 interrupt-parent =3D <&oic>; interrupts =3D <12 IRQ_TYPE_LEVEL_HIGH>, + <14 IRQ_TYPE_LEVEL_HIGH>, <9 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names =3D "xtr", "ana"; + interrupt-names =3D "xtr", "fdma", "ana"; =20 resets =3D <&reset 0>; reset-names =3D "switch"; --=20 2.34.1