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So describe the regulator and each input device along with their pinctrl states. Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Abel Vesa --- Changes in v6: - Rebased on next-20260319. - Dropped the always-on property from the vreg. - Dropped extra whitespace from before vreg compatible property. - As with the dependencies patchsets, instead of adding the support to the common glymur-crd.dtsi, I kept them in the dts as this has only been tested on Glymur CRD. If Mahua CRD upstreaming effort deems it necessary, it can be moved to the dtsi later on. - Link to v5: https://patch.msgid.link/20260319-glymur-dts-crd-enable-kbd-t= p-ts-v5-1-4a440594348b@oss.qualcomm.com Changes in v5: - Since this depends on Displat DT patchset and since that one had to be respun in order to drop the non-merging phy patch dependency, this one had to be respun as well so that the dependency tree is correct. - Link to v4: https://patch.msgid.link/20260319-glymur-dts-crd-enable-kbd-t= p-ts-v4-1-dfe67a134996@oss.qualcomm.com Changes in v4: - Rebased on next-20260318. - Dropped all dependencies except the USB DT and Display DT patchesets, which are needed for this one to apply cleanly. - Link to v3: https://patch.msgid.link/20260313-glymur-dts-crd-enable-kbd-t= p-ts-v3-1-66c5ddfee97d@oss.qualcomm.com Changes in v3: - Picked up Dmitry's and Konrad's R-b tags. - Drop the output-high and add bias-disable to the reset pin of the touchscreen default state. - Link to v2: https://patch.msgid.link/20260312-glymur-dts-crd-enable-kbd-t= p-ts-v2-1-2277bee4c564@oss.qualcomm.com Changes in v2: - Rebased on next-20260311 - Re-ordered pinctrl properties in vreg_misc_3p3, as Konrad suggested. - Dropped next level dependency patchset. - Link to v1: https://patch.msgid.link/20260309-glymur-dts-crd-enable-kbd-t= p-ts-v1-1-56e03f769a76@oss.qualcomm.com --- arch/arm64/boot/dts/qcom/glymur-crd.dts | 116 ++++++++++++++++++++++++++++= ++++ 1 file changed, 116 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/= qcom/glymur-crd.dts index 09a532822787..51ea23a49b9e 100644 --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts @@ -8,6 +8,8 @@ #include "glymur.dtsi" #include "glymur-crd.dtsi" =20 +#include + / { model =3D "Qualcomm Technologies, Inc. Glymur CRD"; compatible =3D "qcom,glymur-crd", "qcom,glymur"; @@ -90,6 +92,80 @@ vreg_edp_3p3: regulator-edp-3p3 { =20 regulator-boot-on; }; + + vreg_misc_3p3: regulator-misc-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_MISC_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pmh0110_f_e0_gpios 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&misc_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; +}; + +&i2c0 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + touchpad@2c { + compatible =3D "hid-over-i2c"; + reg =3D <0x2c>; + + hid-descr-addr =3D <0x20>; + interrupts-extended =3D <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; + + vdd-supply =3D <&vreg_misc_3p3>; + vddl-supply =3D <&vreg_l15b_e0_1p8>; + + pinctrl-0 =3D <&tpad_default>; + pinctrl-names =3D "default"; + + wakeup-source; + }; + + keyboard@3a { + compatible =3D "hid-over-i2c"; + reg =3D <0x3a>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 67 IRQ_TYPE_LEVEL_LOW>; + + vdd-supply =3D <&vreg_misc_3p3>; + vddl-supply =3D <&vreg_l15b_e0_1p8>; + + pinctrl-0 =3D <&kybd_default>; + pinctrl-names =3D "default"; + + wakeup-source; + }; +}; + +&i2c8 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + touchscreen@38 { + compatible =3D "hid-over-i2c"; + reg =3D <0x38>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 51 IRQ_TYPE_LEVEL_LOW>; + + vdd-supply =3D <&vreg_misc_3p3>; + vddl-supply =3D <&vreg_l15b_e0_1p8>; + + pinctrl-0 =3D <&ts0_default>; + pinctrl-names =3D "default"; + }; }; =20 &i2c5 { @@ -163,6 +239,19 @@ &mdss_dp3_phy { status =3D "okay"; }; =20 +&pmh0110_f_e0_gpios { + misc_3p3_reg_en: misc-3p3-reg-en-state { + pins =3D "gpio6"; + function =3D "normal"; + bias-disable; + input-disable; + output-enable; + drive-push-pull; + power-source =3D <1>; /* 1.8 V */ + qcom,drive-strength =3D ; + }; +}; + &smb2370_j_e2_eusb2_repeater { vdd18-supply =3D <&vreg_l15b_e0_1p8>; vdd3-supply =3D <&vreg_l7b_e0_2p79>; @@ -187,6 +276,33 @@ edp_reg_en: edp-reg-en-state { drive-strength =3D <16>; bias-disable; }; + + kybd_default: kybd-default-state { + pins =3D "gpio67"; + function =3D "gpio"; + bias-disable; + }; + + tpad_default: tpad-default-state { + pins =3D "gpio3"; + function =3D "gpio"; + bias-disable; + }; + + ts0_default: ts0-default-state { + int-n-pins { + pins =3D "gpio51"; + function =3D "gpio"; + bias-disable; + }; + + reset-n-pins { + pins =3D "gpio48"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + }; }; =20 &usb_0 { --- base-commit: f6eb9ae8b9fc13c3971e4a6d1e8442f253001f36 change-id: 20260309-glymur-dts-crd-enable-kbd-tp-ts-c80c0cb78940 prerequisite-change-id: 20260109-dts-qcom-glymur-add-usb-support-617b6d9d03= 2c:v7 prerequisite-patch-id: 7ec5f802a334d96421d8f95d4d9e9773655cc947 prerequisite-patch-id: 8d240ee207afc875f46f640c6e72042cf5bfb61b prerequisite-change-id: 20260109-dts-qcom-glymur-crd-add-edp-03f0adde9750:v7 prerequisite-patch-id: 7ec5f802a334d96421d8f95d4d9e9773655cc947 prerequisite-patch-id: 8d240ee207afc875f46f640c6e72042cf5bfb61b prerequisite-patch-id: 346f2db0933c551a039f63b945f989a5c8320657 prerequisite-patch-id: 8bf1870491095593aec382514f041364ffecced4 Best regards, -- =20 Abel Vesa