From nobody Mon Apr 6 10:44:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F068A3ED135 for ; Thu, 19 Mar 2026 16:55:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773939361; cv=none; b=UofTyVQm/jQ4S8ej4uiUZfGkbtNj6JAlPlx8HafdSTFjgUpYymmfoQJP6nyaUkh8WSG8GGGjx4PH2KJ3/PCP4rOrgQXJscFu6g4TFD79/qGu8vL3GVmWUfgSzefP/RMoAevGSKa9vDQWqEfRn8p2lqv6RqL/AQCvKXWMQasAmsU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773939361; c=relaxed/simple; bh=cQs7Zb17BxXtW7eqrzOrybpoXrCYtCI2RwxODmg7i0Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=AKVEMM+Z7GFjB8srOxW/MMaByKrUdoOVu1MXLu7VuX+lzDZjberKgQRwSn4L0HTfyVTQZRephuri+4/kz8RMl4S00b8zSaUtTarAkuGV/GAEcUN+/oNWlB+hv79iIyOdCH+zbyk/faFF44TnNPEEzHLlUUEKI/9RE7E5C+W1vag= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 321561A25; Thu, 19 Mar 2026 09:55:50 -0700 (PDT) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 391E33F7BD; Thu, 19 Mar 2026 09:55:53 -0700 (PDT) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, zengheng4@huawei.com, Shaopeng Tan Subject: [RFC PATCH v2 1/5] arm_mpam: resctrl: Pick classes for use as mbm counters Date: Thu, 19 Mar 2026 16:55:36 +0000 Message-ID: <20260319165540.381410-2-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260319165540.381410-1-ben.horgan@arm.com> References: <20260319165540.381410-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: James Morse resctrl has two types of counters, NUMA-local and global. MPAM can only count global either using MSC at the L3 cache or in the memory controllers. When global and local equate to the same thing continue just to call it global. Tested-by: Shaopeng Tan Tested-by: Zeng Heng Reviewed-by: Shaopeng Tan Reviewed-by: Jonathan Cameron Signed-off-by: James Morse Signed-off-by: Ben Horgan --- Changes since rfc v1: Move finding any_mon_comp into monitor boilerplate patch Move mpam_resctrl_get_domain_from_cpu() into monitor boilerplate Remove free running check Trim commit message --- drivers/resctrl/mpam_resctrl.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index a7691c66553a..c17577e52f58 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -598,6 +598,16 @@ static bool cache_has_usable_csu(struct mpam_class *cl= ass) return true; } =20 +static bool class_has_usable_mbwu(struct mpam_class *class) +{ + struct mpam_props *cprops =3D &class->props; + + if (!mpam_has_feature(mpam_feat_msmon_mbwu, cprops)) + return false; + + return true; +} + /* * Calculate the worst-case percentage change from each implemented step * in the control. @@ -981,6 +991,22 @@ static void mpam_resctrl_pick_counters(void) break; } } + + if (class_has_usable_mbwu(class) && + topology_matches_l3(class) && + traffic_matches_l3(class)) { + pr_debug("class %u has usable MBWU, and matches L3 topology and traffic= \n", + class->level); + + /* + * We can't distinguish traffic by destination so + * we don't know if it's staying on the same NUMA + * node. Hence, we can't calculate mbm_local except + * when we only have one L3 and it's equivalent to + * mbm_total and so always use mbm_total. + */ + counter_update_class(QOS_L3_MBM_TOTAL_EVENT_ID, class); + } } } =20 --=20 2.43.0 From nobody Mon Apr 6 10:44:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AD1F63EDAA3 for ; Thu, 19 Mar 2026 16:56:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773939366; cv=none; b=TNBS4lTITdfGtbibbbHII8x2e8277t1+U0uCCvTZDY2n2168M+PEzvWk/sttQB9hfzIZ8QRDw7Xzwlq9ays/Da8CKqb8AC9mbcs0xDKz/ZrnXSXtdf8tr+jXmhhE053SyfUZ+EwbWiMqVsUhOTnvr6q6RbYGhjxbTTO2JefjqyE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773939366; c=relaxed/simple; bh=+uvbBk/jZ1wwPlmdpeHSy39DQSGvIZfUL2hdYQjFGQo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OW6y0ugffIsEOtPmBl9PRma4aXnE93Gn6bWcZDnKMq9mo4C8rd32DP5g2NAqN/0CqGm3AAalj5HVjIWeMN80CrcZeMOiFxTnk9W6qB0+DtpTMzC5NiVPyWB6dYn3tEE+hrnpXyuG0xbA0h5AqIjGb+wZtIkAPI8hzEUfRxYeWTc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 59B4420E3; Thu, 19 Mar 2026 09:55:53 -0700 (PDT) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 794683F7BD; Thu, 19 Mar 2026 09:55:56 -0700 (PDT) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, zengheng4@huawei.com Subject: [RFC PATCH v2 2/5] arm_mpam: resctrl: Pre-allocate assignable monitors Date: Thu, 19 Mar 2026 16:55:37 +0000 Message-ID: <20260319165540.381410-3-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260319165540.381410-1-ben.horgan@arm.com> References: <20260319165540.381410-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MPAM is able to emulate ABMC, i.e. mbm_event mode, by making memory bandwidth monitors assignable. Rather than supporting the 'default' mbm_assign_mode always use 'mbm_event'mode even if there are sufficient memory bandwidth monitors. The per monitor event configuration is only provided by resctrl when in 'mbm_event' mode and so only allowing 'mbm_event' mode will make it easier to support per-monitor event configuration for MPAM. For the moment, the only event supported is mbm_total_event with no bandwidth type configuration. The 'mbm_assign_mode' file will still show 'default' when there is no support for memory bandwidth monitoring. The monitors need to be allocated from the driver, and mapped to whichever control/monitor group resctrl wants to use them with. Add a second array to hold the monitor values indexed by resctrl's cntr_id. When CDP is in use, two monitors are needed so the available number of counters halves. Platforms with one monitor will have zero monitors when CDP is in use. Co-developed-by: James Morse Signed-off-by: James Morse Signed-off-by: Ben Horgan --- Changes since rfc v1: abmc enabled even if enough counters Helpers from dropped free running commits carry on with zero counters if using cdp set config bits use kmalloc_objs drop tags for rework Configure mbm_cntr_configurable, mbm_cntr_assign_fixed --- drivers/resctrl/mpam_internal.h | 6 +- drivers/resctrl/mpam_resctrl.c | 135 +++++++++++++++++++++++++++++++- 2 files changed, 137 insertions(+), 4 deletions(-) diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index dbb99d9b0795..02807531bd1b 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -415,7 +415,11 @@ struct mpam_resctrl_res { struct mpam_resctrl_mon { struct mpam_class *class; =20 - /* per-class data that resctrl needs will live here */ + /* Array of allocated MBWU monitors, indexed by (closid, rmid). */ + int *mbwu_idx_to_mon; + + /* Array of assigned MBWU monitors, indexed by idx argument. */ + int *assigned_counters; }; =20 static inline int mpam_alloc_csu_mon(struct mpam_class *class) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index c17577e52f58..74b6ca59ce4a 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -75,6 +75,8 @@ static DECLARE_WAIT_QUEUE_HEAD(wait_cacheinfo_ready); */ static bool resctrl_enabled; =20 +static unsigned int l3_num_allocated_mbwu =3D ~0; + bool resctrl_arch_alloc_capable(void) { struct mpam_resctrl_res *res; @@ -140,7 +142,7 @@ int resctrl_arch_cntr_read(struct rdt_resource *r, stru= ct rdt_l3_mon_domain *d, =20 bool resctrl_arch_mbm_cntr_assign_enabled(struct rdt_resource *r) { - return false; + return (r =3D=3D &mpam_resctrl_controls[RDT_RESOURCE_L3].resctrl_res); } =20 int resctrl_arch_mbm_cntr_assign_set(struct rdt_resource *r, bool enable) @@ -185,6 +187,22 @@ static void resctrl_reset_task_closids(void) read_unlock(&tasklist_lock); } =20 +static void mpam_resctrl_monitor_sync_abmc_vals(struct rdt_resource *l3) +{ + l3->mon.num_mbm_cntrs =3D l3_num_allocated_mbwu; + if (cdp_enabled) + l3->mon.num_mbm_cntrs /=3D 2; + + /* + * Continue as normal even if there are zero counters to avoid giving + * resctrl mixed messages. + */ + l3->mon.mbm_cntr_assignable =3D true; + l3->mon.mbm_assign_on_mkdir =3D true; + l3->mon.mbm_cntr_configurable =3D false; + l3->mon.mbm_cntr_assign_fixed =3D true; +} + int resctrl_arch_set_cdp_enabled(enum resctrl_res_level rid, bool enable) { u32 partid_i =3D RESCTRL_RESERVED_CLOSID, partid_d =3D RESCTRL_RESERVED_C= LOSID; @@ -236,6 +254,7 @@ int resctrl_arch_set_cdp_enabled(enum resctrl_res_level= rid, bool enable) WRITE_ONCE(arm64_mpam_global_default, mpam_get_regval(current)); =20 resctrl_reset_task_closids(); + mpam_resctrl_monitor_sync_abmc_vals(l3); =20 for_each_possible_cpu(cpu) mpam_set_cpu_defaults(cpu, partid_d, partid_i, 0, 0); @@ -605,6 +624,9 @@ static bool class_has_usable_mbwu(struct mpam_class *cl= ass) if (!mpam_has_feature(mpam_feat_msmon_mbwu, cprops)) return false; =20 + if (!cprops->num_mbwu_mon) + return false; + return true; } =20 @@ -933,6 +955,52 @@ static void mpam_resctrl_pick_mba(void) } } =20 +static void __free_mbwu_mon(struct mpam_class *class, int *array, + u16 num_mbwu_mon) +{ + for (int i =3D 0; i < num_mbwu_mon; i++) { + if (array[i] < 0) + continue; + + mpam_free_mbwu_mon(class, array[i]); + array[i] =3D ~0; + } +} + +static int __alloc_mbwu_mon(struct mpam_class *class, int *array, + u16 num_mbwu_mon) +{ + for (int i =3D 0; i < num_mbwu_mon; i++) { + int mbwu_mon =3D mpam_alloc_mbwu_mon(class); + + if (mbwu_mon < 0) { + __free_mbwu_mon(class, array, num_mbwu_mon); + return mbwu_mon; + } + array[i] =3D mbwu_mon; + } + + l3_num_allocated_mbwu =3D min(l3_num_allocated_mbwu, num_mbwu_mon); + + return 0; +} + +static int *__alloc_mbwu_array(struct mpam_class *class, u16 num_mbwu_mon) +{ + int err; + int *array __free(kfree) =3D kmalloc_objs(*array, num_mbwu_mon); + + if (!array) + return ERR_PTR(-ENOMEM); + + memset(array, -1, num_mbwu_mon * sizeof(*array)); + + err =3D __alloc_mbwu_mon(class, array, num_mbwu_mon); + if (err) + return ERR_PTR(err); + return_ptr(array); +} + static void counter_update_class(enum resctrl_event_id evt_id, struct mpam_class *class) { @@ -1087,9 +1155,46 @@ static int mpam_resctrl_pick_domain_id(int cpu, stru= ct mpam_component *comp) return comp->comp_id; } =20 +/* + * This must run after all event counters have been picked so that any free + * running counters have already been allocated. + */ +static int mpam_resctrl_monitor_init_abmc(struct mpam_resctrl_mon *mon) +{ + struct mpam_resctrl_res *res =3D &mpam_resctrl_controls[RDT_RESOURCE_L3]; + struct rdt_resource *l3 =3D &res->resctrl_res; + struct mpam_class *class =3D mon->class; + u16 num_mbwu_mon; + size_t num_rmid =3D resctrl_arch_system_num_rmid_idx(); + + if (mon->mbwu_idx_to_mon) { + pr_debug("monitors free running\n"); + return 0; + } + + int *rmid_array __free(kfree) =3D kmalloc_objs(*rmid_array, num_rmid); + + if (!rmid_array) { + pr_debug("Failed to allocate RMID array\n"); + return -ENOMEM; + } + memset(rmid_array, -1, num_rmid * sizeof(*rmid_array)); + + num_mbwu_mon =3D class->props.num_mbwu_mon; + mon->assigned_counters =3D __alloc_mbwu_array(mon->class, num_mbwu_mon); + if (IS_ERR(mon->assigned_counters)) + return PTR_ERR(mon->assigned_counters); + mon->mbwu_idx_to_mon =3D no_free_ptr(rmid_array); + + mpam_resctrl_monitor_sync_abmc_vals(l3); + + return 0; +} + static int mpam_resctrl_monitor_init(struct mpam_resctrl_mon *mon, enum resctrl_event_id type) { + int err =3D 0; struct mpam_resctrl_res *res =3D &mpam_resctrl_controls[RDT_RESOURCE_L3]; struct rdt_resource *l3 =3D &res->resctrl_res; =20 @@ -1131,8 +1236,19 @@ static int mpam_resctrl_monitor_init(struct mpam_res= ctrl_mon *mon, */ l3->mon.num_rmid =3D resctrl_arch_system_num_rmid_idx(); =20 - if (resctrl_enable_mon_event(type, false, 0, NULL)) - l3->mon_capable =3D true; + if (type =3D=3D QOS_L3_MBM_TOTAL_EVENT_ID) { + err =3D mpam_resctrl_monitor_init_abmc(mon); + if (err) + return err; + + static_assert(MAX_EVT_CONFIG_BITS =3D=3D 0x7f); + l3->mon.mbm_cfg_mask =3D MAX_EVT_CONFIG_BITS; + } + + if (!resctrl_enable_mon_event(type, false, 0, NULL)) + return -EINVAL; + + l3->mon_capable =3D true; =20 return 0; } @@ -1695,6 +1811,17 @@ void mpam_resctrl_exit(void) resctrl_exit(); } =20 +static void mpam_resctrl_teardown_mon(struct mpam_resctrl_mon *mon, struct= mpam_class *class) +{ + u32 num_mbwu_mon =3D resctrl_arch_system_num_rmid_idx(); + + if (!mon->mbwu_idx_to_mon) + return; + + __free_mbwu_mon(class, mon->mbwu_idx_to_mon, num_mbwu_mon); + mon->mbwu_idx_to_mon =3D NULL; +} + /* * The driver is detaching an MSC from this class, if resctrl was using it, * pull on resctrl_exit(). @@ -1717,6 +1844,8 @@ void mpam_resctrl_teardown_class(struct mpam_class *c= lass) for_each_mpam_resctrl_mon(mon, eventid) { if (mon->class =3D=3D class) { mon->class =3D NULL; + + mpam_resctrl_teardown_mon(mon, class); break; } } --=20 2.43.0 From nobody Mon Apr 6 10:44:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4A6D23EF645 for ; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7FF3C2247; Thu, 19 Mar 2026 09:55:56 -0700 (PDT) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A1ABD3F7BD; Thu, 19 Mar 2026 09:55:59 -0700 (PDT) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, zengheng4@huawei.com Subject: [RFC PATCH v2 3/5] arm_mpam: resctrl: Add resctrl_arch_config_cntr() for ABMC use Date: Thu, 19 Mar 2026 16:55:38 +0000 Message-ID: <20260319165540.381410-4-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260319165540.381410-1-ben.horgan@arm.com> References: <20260319165540.381410-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: James Morse ABMC, mbm_event mode, has a helper resctrl_arch_config_cntr() for changing the mapping between 'cntr_id' and a CLOSID/RMID pair. Add the helper. For MPAM this is done by updating the mon->mbwu_idx_to_mon[] array, and as usual CDP means it needs doing in three different ways. Reviewed-by: Jonathan Cameron Signed-off-by: James Morse Signed-off-by: Ben Horgan --- Changes since new rfc: Mention mbm_event mode in commit message --- drivers/resctrl/mpam_resctrl.c | 43 +++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index 74b6ca59ce4a..4f49483f6445 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -127,12 +127,6 @@ void resctrl_arch_reset_cntr(struct rdt_resource *r, s= truct rdt_l3_mon_domain *d { } =20 -void resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_l3_mon_do= main *d, - enum resctrl_event_id evtid, u32 rmid, u32 closid, - u32 cntr_id, bool assign) -{ -} - int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domai= n *d, u32 unused, u32 rmid, int cntr_id, enum resctrl_event_id eventid, u64 *val) @@ -1078,6 +1072,43 @@ static void mpam_resctrl_pick_counters(void) } } =20 +static void __config_cntr(struct mpam_resctrl_mon *mon, u32 cntr_id, + enum resctrl_conf_type cdp_type, u32 closid, u32 rmid, + bool assign) +{ + u32 mbwu_idx, mon_idx =3D resctrl_get_config_index(cntr_id, cdp_type); + + closid =3D resctrl_get_config_index(closid, cdp_type); + mbwu_idx =3D resctrl_arch_rmid_idx_encode(closid, rmid); + WARN_ON_ONCE(mon_idx > l3_num_allocated_mbwu); + + if (assign) + mon->mbwu_idx_to_mon[mbwu_idx] =3D mon->assigned_counters[mon_idx]; + else + mon->mbwu_idx_to_mon[mbwu_idx] =3D -1; +} + +void resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_l3_mon_do= main *d, + enum resctrl_event_id evtid, u32 rmid, u32 closid, + u32 cntr_id, bool assign) +{ + struct mpam_resctrl_mon *mon =3D &mpam_resctrl_counters[evtid]; + + if (!mon->mbwu_idx_to_mon || !mon->assigned_counters) { + pr_debug("monitor arrays not allocated\n"); + return; + } + + if (cdp_enabled) { + __config_cntr(mon, cntr_id, CDP_CODE, closid, rmid, assign); + __config_cntr(mon, cntr_id, CDP_DATA, closid, rmid, assign); + } else { + __config_cntr(mon, cntr_id, CDP_NONE, closid, rmid, assign); + } + + resctrl_arch_reset_rmid(r, d, closid, rmid, evtid); +} + static int mpam_resctrl_control_init(struct mpam_resctrl_res *res) { struct mpam_class *class =3D res->class; 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smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A2F791A25; Thu, 19 Mar 2026 09:55:59 -0700 (PDT) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C7BAA3F7BD; Thu, 19 Mar 2026 09:56:02 -0700 (PDT) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, zengheng4@huawei.com Subject: [RFC PATCH v2 4/5] arm_mpam: resctrl: Add resctrl_arch_cntr_read() & resctrl_arch_reset_cntr() Date: Thu, 19 Mar 2026 16:55:39 +0000 Message-ID: <20260319165540.381410-5-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260319165540.381410-1-ben.horgan@arm.com> References: <20260319165540.381410-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: James Morse When used in 'mbm_event' mode, ABMC emulation, resctrl uses arch hooks to read and reset the memory bandwidth utilization (MBWU) counters. Add these. Reviewed-by: Jonathan Cameron Signed-off-by: James Morse Signed-off-by: Ben Horgan --- Changes since rfc v1: Move __reset_mon() and reset_mon_cdp_safe() helpers here support mbwu in __read_mon() Mention mbm_event mode in commit message --- drivers/resctrl/mpam_resctrl.c | 99 +++++++++++++++++++++++++++++----- 1 file changed, 86 insertions(+), 13 deletions(-) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index 4f49483f6445..9f6f0091f356 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -121,19 +121,6 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, s= truct rdt_l3_mon_domain *d { } =20 -void resctrl_arch_reset_cntr(struct rdt_resource *r, struct rdt_l3_mon_dom= ain *d, - u32 closid, u32 rmid, int cntr_id, - enum resctrl_event_id eventid) -{ -} - -int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domai= n *d, - u32 unused, u32 rmid, int cntr_id, - enum resctrl_event_id eventid, u64 *val) -{ - return -EOPNOTSUPP; -} - bool resctrl_arch_mbm_cntr_assign_enabled(struct rdt_resource *r) { return (r =3D=3D &mpam_resctrl_controls[RDT_RESOURCE_L3].resctrl_res); @@ -459,6 +446,14 @@ static int __read_mon(struct mpam_resctrl_mon *mon, st= ruct mpam_component *mon_c /* Shift closid to account for CDP */ closid =3D resctrl_get_config_index(closid, cdp_type); =20 + if (mon_idx =3D=3D USE_PRE_ALLOCATED) { + int mbwu_idx =3D resctrl_arch_rmid_idx_encode(closid, rmid); + + mon_idx =3D mon->mbwu_idx_to_mon[mbwu_idx]; + if (mon_idx =3D=3D -1) + return -ENOENT; + } + if (irqs_disabled()) { /* Check if we can access this domain without an IPI */ return -EIO; @@ -531,6 +526,84 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, str= uct rdt_domain_hdr *hdr, closid, rmid, val); } =20 +/* MBWU counters when in ABMC mode */ +int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domai= n *d, + u32 closid, u32 rmid, int mon_idx, + enum resctrl_event_id eventid, u64 *val) +{ + struct mpam_resctrl_mon *mon =3D &mpam_resctrl_counters[eventid]; + struct mpam_resctrl_dom *l3_dom; + struct mpam_component *mon_comp; + + if (!mpam_is_enabled()) + return -EINVAL; + + if (eventid =3D=3D QOS_L3_OCCUP_EVENT_ID || !mon->class) + return -EINVAL; + + l3_dom =3D container_of(d, struct mpam_resctrl_dom, resctrl_mon_dom); + mon_comp =3D l3_dom->mon_comp[eventid]; + + return read_mon_cdp_safe(mon, mon_comp, mpam_feat_msmon_mbwu, mon_idx, + closid, rmid, val); +} + +static void __reset_mon(struct mpam_resctrl_mon *mon, struct mpam_componen= t *mon_comp, + int mon_idx, + enum resctrl_conf_type cdp_type, u32 closid, u32 rmid) +{ + struct mon_cfg cfg =3D { }; + + if (!mpam_is_enabled()) + return; + + /* Shift closid to account for CDP */ + closid =3D resctrl_get_config_index(closid, cdp_type); + + if (mon_idx =3D=3D USE_PRE_ALLOCATED) { + int mbwu_idx =3D resctrl_arch_rmid_idx_encode(closid, rmid); + + mon_idx =3D mon->mbwu_idx_to_mon[mbwu_idx]; + } + + if (mon_idx =3D=3D -1) + return; + cfg.mon =3D mon_idx; + mpam_msmon_reset_mbwu(mon_comp, &cfg); +} + +static void reset_mon_cdp_safe(struct mpam_resctrl_mon *mon, struct mpam_c= omponent *mon_comp, + int mon_idx, u32 closid, u32 rmid) +{ + if (cdp_enabled) { + __reset_mon(mon, mon_comp, mon_idx, CDP_CODE, closid, rmid); + __reset_mon(mon, mon_comp, mon_idx, CDP_DATA, closid, rmid); + } else { + __reset_mon(mon, mon_comp, mon_idx, CDP_NONE, closid, rmid); + } +} + +/* Reset an assigned counter */ +void resctrl_arch_reset_cntr(struct rdt_resource *r, struct rdt_l3_mon_dom= ain *d, + u32 closid, u32 rmid, int cntr_id, + enum resctrl_event_id eventid) +{ + struct mpam_resctrl_mon *mon =3D &mpam_resctrl_counters[eventid]; + struct mpam_resctrl_dom *l3_dom; + struct mpam_component *mon_comp; + + if (!mpam_is_enabled()) + return; + + if (eventid =3D=3D QOS_L3_OCCUP_EVENT_ID || !mon->class) + return; + + l3_dom =3D container_of(d, struct mpam_resctrl_dom, resctrl_mon_dom); + mon_comp =3D l3_dom->mon_comp[eventid]; + + reset_mon_cdp_safe(mon, mon_comp, USE_PRE_ALLOCATED, closid, rmid); +} + /* * The rmid realloc threshold should be for the smallest cache exposed to * resctrl. --=20 2.43.0 From nobody Mon Apr 6 10:44:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 23B803EFD21 for ; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C78F520E3; Thu, 19 Mar 2026 09:56:02 -0700 (PDT) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EC4043F7BD; Thu, 19 Mar 2026 09:56:05 -0700 (PDT) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, zengheng4@huawei.com Subject: [RFC PATCH v2 5/5] arm64: mpam: Add memory bandwidth usage (MBWU) documentation Date: Thu, 19 Mar 2026 16:55:40 +0000 Message-ID: <20260319165540.381410-6-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260319165540.381410-1-ben.horgan@arm.com> References: <20260319165540.381410-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Memory bandwidth monitoring make uses of MBWU monitors and is now exposed to the user via resctrl. Add some documentation so the user knows what to expect. Co-developed-by: James Morse Signed-off-by: James Morse Signed-off-by: Ben Horgan --- Documentation/arch/arm64/mpam.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/arch/arm64/mpam.rst b/Documentation/arch/arm64/m= pam.rst index 570f51a8d4eb..208ff17068c4 100644 --- a/Documentation/arch/arm64/mpam.rst +++ b/Documentation/arch/arm64/mpam.rst @@ -65,6 +65,23 @@ The supported features are: there is at least one CSU monitor on each MSC that makes up the L3 group. Exposing CSU counters from other caches or devices is not supported. =20 +* Memory Bandwidth Usage (MBWU) on or after the L3 cache. resctrl uses the + L3 cache-id to identify where the memory bandwidth is measured. For this + reason the platform must have an L3 cache with cache-id's supplied by + firmware. (It doesn't need to support MPAM.) + + Memory bandwidth monitoring makes use of MBWU monitors in each MSC that + makes up the L3 group. If the memory bandwidth monitoring is on the memo= ry + rather than the L3 then there must be a single global L3 as otherwise it + is unknown which L3 the traffic came from. + + To expose 'mbm_total_bytes', the topology of the group of MSC chosen must + match the topology of the L3 cache so that the cache-id's can be + repainted. For example: Platforms with Memory bandwidth monitors on + CPU-less NUMA nodes cannot expose 'mbm_total_bytes' as these nodes do not + have a corresponding L3 cache. 'mbm_local_bytes' is not exposed as MPAM + cannot distinguish local traffic from global traffic. + Reporting Bugs =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D If you are not seeing the counters or controls you expect please share the --=20 2.43.0