From nobody Mon Apr 6 12:17:08 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B331F3E9F98; Thu, 19 Mar 2026 15:55:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773935753; cv=none; b=ECcOCjCIca2VnWyLzKdfogH8+G2ilWLVsFDPdP/iIg0fZYy6IEkS2glJfrtg0cc2hETAaQZHw+jN5RRXzFniHy6yIEf95f2AvW+OjKBucSmqBwASxJ8L8L5qwxOKfpNIDCL3ZgQriEJC7doObmY/ef6ErtsYvwLcVdiV6WRDOYk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773935753; c=relaxed/simple; bh=WMGWqBcFvtN0MqdxLGHwwwFXLWkz09suF6r3VyqdT6o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=C8hSZ7UrA4gqt+WvruirVvy2gVK2ujLzDsp6MLa1NPI1u/Y05s5oHVzehFKMzKvlEsQMFm9+gyg4XXdUTNvjgnBK39dY72EXbMhYCtQu6G9AlAk22L4noD97wbwIJe2xYnbOATOIhtr4OvJBiMD4LbapHNxRW9akl0E5A9gPI1k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: USGzfxtPTtOp4X4fVEVwtg== X-CSE-MsgGUID: M1oSURy5ThW4E1gGpRs7pA== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 20 Mar 2026 00:55:50 +0900 Received: from ubuntu.adwin.renesas.com (unknown [10.226.93.35]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 5AD4C401B2FD; Fri, 20 Mar 2026 00:55:41 +0900 (JST) From: John Madieu To: Geert Uytterhoeven , Kuninori Morimoto , Vinod Koul , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: Michael Turquette , Stephen Boyd , Conor Dooley , Frank Li , Liam Girdwood , Magnus Damm , Thomas Gleixner , Jaroslav Kysela , Takashi Iwai , Philipp Zabel , Claudiu Beznea , Biju Das , Fabrizio Castro , Lad Prabhakar , John Madieu , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-sound@vger.kernel.org, John Madieu Subject: [PATCH 07/22] ASoC: dt-bindings: renesas,rsnd: Add RZ/G3E support Date: Thu, 19 Mar 2026 16:53:19 +0100 Message-ID: <20260319155334.51278-8-john.madieu.xa@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260319155334.51278-1-john.madieu.xa@bp.renesas.com> References: <20260319155334.51278-1-john.madieu.xa@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for the RZ/G3E (R9A09G047) SoC audio subsystem. RZ/G3E has a different audio architecture from R-Car Gen2/Gen3/Gen4, with additional clocks and resets: - Per-SSI ADG clocks (adg.ssi.0-9) - SCU related clocks (scu, scu_x2, scu_supply) - SSIF supply clock - AUDMAC peri-peri clock - ADG clock - Additional resets for SCU, ADG, and AUDMAC peri-peri RZ/G3E has 5 DMA controllers that can all be used by audio peripherals. To allow the DMA core to distribute channels across all available controllers, increase the maximum number of DMA entries in DVC, SRC, and SSIU sub-nodes so that multiple providers can be listed with repeated channel names. Signed-off-by: John Madieu --- .../bindings/sound/renesas,rsnd.yaml | 169 +++++++++++++++--- 1 file changed, 148 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml b/Do= cumentation/devicetree/bindings/sound/renesas,rsnd.yaml index e8a2acb92646..bc8885c4fa24 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml +++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml @@ -58,6 +58,7 @@ properties: - renesas,rcar_sound-gen2 - renesas,rcar_sound-gen3 - renesas,rcar_sound-gen4 + - renesas,rcar_sound-r9a09g047 # RZ/G3E =20 reg: minItems: 1 @@ -97,20 +98,22 @@ properties: =20 resets: minItems: 1 - maxItems: 11 + maxItems: 14 =20 reset-names: minItems: 1 - maxItems: 11 + maxItems: 14 =20 clocks: description: References to SSI/SRC/MIX/CTU/DVC/AUDIO_CLK clocks. minItems: 1 - maxItems: 31 + maxItems: 47 =20 clock-names: description: List of necessary clock names. # details are defined below + minItems: 1 + maxItems: 47 =20 # ports is below port: @@ -136,9 +139,17 @@ properties: =20 properties: dmas: - maxItems: 1 + description: + Must contain unique DMA specifiers, one per available + DMAC. On RZ/G3E, up to 5 for transmission. + minItems: 1 + maxItems: 5 dma-names: - const: tx + minItems: 1 + maxItems: 5 + items: + enum: + - tx required: - dmas - dma-names @@ -174,13 +185,19 @@ properties: interrupts: maxItems: 1 dmas: - maxItems: 2 + description: + Must contain unique DMA specifiers, one per available + DMAC, for each transfer direction. On RZ/G3E, up to 5 + for transmission and up to 5 for reception. + minItems: 2 + maxItems: 10 dma-names: - allOf: - - items: - enum: - - tx - - rx + minItems: 2 + maxItems: 10 + items: + enum: + - tx + - rx additionalProperties: false =20 rcar_sound,ssiu: @@ -193,13 +210,19 @@ properties: =20 properties: dmas: - maxItems: 2 + description: + Must contain unique DMA specifiers, one per available + DMAC, for each transfer direction. On RZ/G3E, up to 5 + for transmission and up to 5 for reception. + minItems: 2 + maxItems: 10 dma-names: - allOf: - - items: - enum: - - tx - - rx + minItems: 2 + maxItems: 10 + items: + enum: + - tx + - rx required: - dmas - dma-names @@ -299,7 +322,7 @@ allOf: - sru - ssi - adg - # for Gen2/Gen3 + # for Gen2/Gen3/RZ/G3E - if: properties: compatible: @@ -307,6 +330,7 @@ allOf: enum: - renesas,rcar_sound-gen2 - renesas,rcar_sound-gen3 + - renesas,rcar_sound-r9a09g047 then: properties: reg: @@ -338,7 +362,7 @@ allOf: - sdmc =20 # -------------------- - # clock-names + # clock-names / reset-names # -------------------- - if: properties: @@ -354,10 +378,18 @@ allOf: - ssi.0 - ssiu.0 - clkin - else: + - if: + properties: + compatible: + contains: + enum: + - renesas,rcar_sound-gen2 + - renesas,rcar_sound-gen3 + then: properties: + clocks: + maxItems: 31 clock-names: - minItems: 1 maxItems: 31 items: oneOf: @@ -368,6 +400,101 @@ allOf: - pattern: '^ctu\.[0-1]$' - pattern: '^dvc\.[0-1]$' - pattern: '^clk_(a|b|c|i)$' + resets: + maxItems: 11 + reset-names: + maxItems: 11 + items: + oneOf: + - const: ssi-all + - pattern: '^ssi\.[0-9]$' + rcar_sound,dvc: + patternProperties: + "^dvc-[0-1]$": + properties: + dmas: + maxItems: 1 + dma-names: + maxItems: 1 + rcar_sound,src: + patternProperties: + "^src-[0-9]$": + properties: + dmas: + maxItems: 2 + dma-names: + maxItems: 2 + rcar_sound,ssiu: + patternProperties: + "^ssiu-[0-9]+$": + properties: + dmas: + maxItems: 2 + dma-names: + maxItems: 2 + # for RZ/G3E + - if: + properties: + compatible: + contains: + const: renesas,rcar_sound-r9a09g047 + then: + properties: + clocks: + maxItems: 47 + clock-names: + maxItems: 47 + items: + oneOf: + - const: ssi-all + - pattern: '^ssi\.[0-9]$' + - pattern: '^src\.[0-9]$' + - pattern: '^mix\.[0-1]$' + - pattern: '^ctu\.[0-1]$' + - pattern: '^dvc\.[0-1]$' + - pattern: '^clk_(a|b|c|i)$' + - const: ssif_supply + - const: scu + - const: scu_x2 + - const: scu_supply + - pattern: '^adg\.ssi\.[0-9]$' + - const: audmac_pp + - const: adg + resets: + maxItems: 14 + reset-names: + maxItems: 14 + items: + oneOf: + - const: ssi-all + - pattern: '^ssi\.[0-9]$' + - const: scu + - const: adg + - const: audmac_pp + rcar_sound,dvc: + patternProperties: + "^dvc-[0-1]$": + properties: + dmas: + maxItems: 5 + dma-names: + maxItems: 5 + rcar_sound,src: + patternProperties: + "^src-[0-9]$": + properties: + dmas: + maxItems: 10 + dma-names: + maxItems: 10 + rcar_sound,ssiu: + patternProperties: + "^ssiu-[0-9]+$": + properties: + dmas: + maxItems: 10 + dma-names: + maxItems: 10 =20 unevaluatedProperties: false =20 --=20 2.25.1