From nobody Mon Apr 6 12:11:31 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2F9C43E8C67; Thu, 19 Mar 2026 15:55:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773935704; cv=none; b=B54brxNyRIuRipCm8dYxtYnddcDtCqLmvryiCif7qDmCpyLZzps5DFSpv7xxIRRy21xyZswrJWoTjYR77VDSrWDo6VDlf41GLltN4QXpCQvkGq2uSSNh4sKNqQ48Y5DbxI/GCKJp4/sblh9IT7ix8K3pZRRvlC2g1LVWl4VYDLM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773935704; c=relaxed/simple; bh=SV/OayDQfhRBvC34hoRJqvFiBa2hhApp5q8zHXZd8dY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sULF9J9a8DzduvRMyWsWlc5FBfirBOwMU49mFxyumLZCqY2F2g5cSEiv7q1WsOtIii9hQ5E02OF58iSD7pHfLoum6K/ZQfF+FK1qrJOTlW7HDpFI3bGY/Nj8kPbEz4byoddICCJ50soid6Jw5YlaTQh8+1ytzgwEV1RQsE4ysm4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: iOnTbv/sQICmFYQO4rOrwQ== X-CSE-MsgGUID: 42cgRTraSzC981uwCYPIJA== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 20 Mar 2026 00:54:55 +0900 Received: from ubuntu.adwin.renesas.com (unknown [10.226.93.35]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 8EA104018A06; Fri, 20 Mar 2026 00:54:46 +0900 (JST) From: John Madieu To: Geert Uytterhoeven , Kuninori Morimoto , Vinod Koul , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: Michael Turquette , Stephen Boyd , Conor Dooley , Frank Li , Liam Girdwood , Magnus Damm , Thomas Gleixner , Jaroslav Kysela , Takashi Iwai , Philipp Zabel , Claudiu Beznea , Biju Das , Fabrizio Castro , Lad Prabhakar , John Madieu , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-sound@vger.kernel.org, John Madieu Subject: [PATCH 01/22] dt-bindings: clock: renesas: Add audio clock inputs for RZ/V2H family Date: Thu, 19 Mar 2026 16:53:13 +0100 Message-ID: <20260319155334.51278-2-john.madieu.xa@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260319155334.51278-1-john.madieu.xa@bp.renesas.com> References: <20260319155334.51278-1-john.madieu.xa@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RZ/V2H, RZ/V2N, and RZ/G3E support external audio clock inputs (AUDIO_CLKA, AUDIO_CLKB, AUDIO_CLKC) that can be used by the Audio Clock Generator (ADG) to derive internal audio clocks. These clocks are optional and their frequencies are set by the board. Update the bindings to allow these optional clocks for all RZ/V2H family SoCs. Signed-off-by: John Madieu --- .../devicetree/bindings/clock/renesas,rzv2h-cpg.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml= b/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml index f261445bf341..bed5643b39d3 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml @@ -26,16 +26,26 @@ properties: maxItems: 1 =20 clocks: + minItems: 3 + maxItems: 6 items: - description: AUDIO_EXTAL clock input - description: RTXIN clock input - description: QEXTAL clock input + - description: AUDIO_CLKA clock input + - description: AUDIO_CLKB clock input + - description: AUDIO_CLKC clock input =20 clock-names: + minItems: 3 + maxItems: 6 items: - const: audio_extal - const: rtxin - const: qextal + - const: audio_clka + - const: audio_clkb + - const: audio_clkc =20 '#clock-cells': description: | --=20 2.25.1