From nobody Mon Apr 6 12:14:59 2026 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5C513570C8 for ; Thu, 19 Mar 2026 14:15:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773929725; cv=none; b=o/jfg9LF3akq4ZTOu2/+h9zn+l9fs/atWeHEhqSuwrnZcLpRIswsbitE1PK2kSXAefmvRL/TY1R+zTNICr6XPnw+ZwenzH7iw/Mb4n6q6jycCbWCkQJ9Z+TvegJyYD/xiszGyz5f3yoXxsjnpYYmvp7OpNMYbvflgEsBWnu7v3k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773929725; c=relaxed/simple; bh=AVqKV2koLL7ZlkRc62jikhi1UX4IiI5DvZw1l2ipQw8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T4rgwVihGuylFZPTUG2hLVg495rvcwQjyKRpaZw9iCTeflic5n+SE4nYewe7jp/zr8JUjuDp6MmvEy0l3OQQ3173PDw9CzehzzpKOqEzcLEa8btm0VBOSAfAjBooHWFyqSzK6k+NhjxoiboRNAEUzVYLJDS0T56ME2FEYRSaXVg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Q1E2Poh0; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Q1E2Poh0" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-43b41b545d9so1077176f8f.2 for ; Thu, 19 Mar 2026 07:15:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773929719; x=1774534519; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dVOwtxYwKf7F+id86vByPrLslX0VOCCmqpIA6XP6qiw=; b=Q1E2Poh0Sgop4j0ZeuULYvsTCnM9vWucHJdYqXYr4Vd63rxYm/g5HsODEZkqMtRNdN 1W91gwJYsY267BOY79c7XvY/i/5awpakgTaaWZgsQFw/HfB2BA7rVnGnRWsHCQeeLhhz Q/3u8Jd+v/YGR3qDKuJkJN6CDyA8/o7Ym1hXLCm/wOI4qX6Cx1tBEsebzWcPZlX/LHC3 8pz3pvd1m+bH73g3Fy9R7XAcfbk/ycLzsq4ye72kNMbH5L+Un0zpYqyzG5JMl5LYCDxN 1OtVOGjXaMyQ8GlR15mRFQybd0oV7Hr0CmiqfznjD3uPXJ6KJw/WvyciDQE0Ru0EzSNf 2pNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773929719; x=1774534519; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=dVOwtxYwKf7F+id86vByPrLslX0VOCCmqpIA6XP6qiw=; b=JfWUarCiwrqg8sbAeqtAQ3s8SipSaxmzh9htl72hb1EcPmyskXPxYtDh5z79l1NFN7 e28a/ui3tcYe1dk1Q57TNvYlBvfJRKKKAxm/KWMP3yPMB/sp94zRuwWA/LeG1kRQETyZ yEkwhJVLyyEboDZY1hOQmU5O/4iuekuT2RLQOCuFYv4999hRsiZ6FNYWEDobG8RTqqK3 qdJeBeMMJuUjT8EUlc4NAdtN+bI4ea1mKJ24QMolX1B+WNYTipwqPHfFE8w+n43UTIfE FnG+NQ5sGea2nv95paO/BCkTKXQwlRF6/WvNwlZiU4Jce3cBQZFiMuPGE9k99iS8Q/m/ Rk2g== X-Forwarded-Encrypted: i=1; AJvYcCWrF+v4x0nz02hYMsXA1d9oM7Xmvx7Wda/aOlHCooKMJuNWa5+aQck4NhQVYDn6ANhDzMLNa1xPN5lLxp0=@vger.kernel.org X-Gm-Message-State: AOJu0YwRLY7sbqceEJLyXUjAor+8Hw0l6xU0qXs4h3YlY/9EVmlYkIwk Zb1BxuZo6nj1K7PehKx98CBH4IxXgBv8QaDHgNcdcJDYoM2YuO71WKm7 X-Gm-Gg: ATEYQzy1kA3KUKUiy75338tJe/ZhAU62kz0/7DPCa80nWRpQIEAkH09Fjb1CCNaYWLX LmfYTBFosBYvq4/IDRtZkEQK3czqlL+3ZtNRDy6Nxoiw8siEHwD+Xq++zr3ZaXIcghUMAhsIFhd juD3HBFNi0IU85QELalFR42r/1VhvIi4pnknDDfWCH1X8mvvnjkQYlxoK7oIpbCdsOoOZTpJzmY wjrnkmhWiUJUTE5wcJIYEMk4DK4v2QZoVlilWodPxKRqcQkUe6nZLkjnTiy4coj8ENCWE7+evKx OpifJWuSxWJ5gDWHGjSM2kmyoofEHqZ8abn1NPO55a7JQRcZHrAdZWCjwmLXirJ6/GHaSKbv8gr O6aajw+Hx4moAqQq1lzT5PyB2BAYUK0vn7BBYJk4fQSOw6UOP4w8V4ekrJE2YoKb6mJtehVWo0X unnCQh3neor5YH9eYbI0Z5F7KZ+TKXXWnAEq5M+StDGC+6q//nO7WjRlzpPjCb7Q7RTo4o46AB8 4PgHzk4feVGrwB/Dx246toa/kda6FzLITFAgHbOo1EWTso= X-Received: by 2002:a05:6000:2501:b0:439:c42f:10c4 with SMTP id ffacd0b85a97d-43b527a97b3mr13343032f8f.15.1773929718875; Thu, 19 Mar 2026 07:15:18 -0700 (PDT) Received: from iku.example.org ([2a06:5906:61b:2d00:f7c0:c444:6359:4c21]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43b5184957bsm17824618f8f.5.2026.03.19.07.15.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 07:15:18 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 1/2] dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties Date: Thu, 19 Mar 2026 14:15:14 +0000 Message-ID: <20260319141515.2053556-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260319141515.2053556-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20260319141515.2053556-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Document the pin configuration properties supported by the RZ/T2H pinctrl driver. The RZ/T2H SoC allows configuring several electrical characteristics through the DRCTLm (I/O Buffer Function Switching) registers. These registers control drive strength, bias configuration, Schmitt trigger input, and output slew rate. Signed-off-by: Lad Prabhakar Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Reviewed-by: Linus Walleij --- v1->v2: - Updated commit description - Switched to using the standard drive-strength-microamp property name instead of a custom one - Added a description for slew-rate property --- .../pinctrl/renesas,r9a09g077-pinctrl.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pi= nctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pi= nctrl.yaml index f049013a4e0c..63993b20524f 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.y= aml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.y= aml @@ -83,6 +83,23 @@ definitions: input: true input-enable: true output-enable: true + bias-disable: true + bias-pull-down: true + bias-pull-up: true + input-schmitt-enable: true + input-schmitt-disable: true + slew-rate: + description: 0 is slow slew rate, 1 is fast slew rate + enum: [0, 1] + drive-strength-microamp: + description: | + Four discrete levels are supported (via registers DRCTLm), corre= sponding + to the following nominal values: + - 2500 (Low strength) + - 5000 (Middle strength) + - 9000 (High strength) + - 11800 (Ultra High strength) + enum: [2500, 5000, 9000, 11800] oneOf: - required: [pinmux] - required: [pins] --=20 2.53.0