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Thu, 19 Mar 2026 05:51:49 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Philipp Zabel Cc: Biju Das , linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v6 05/10] clk: renesas: rzg2l-cpg: Re-enable critical module clocks during resume Date: Thu, 19 Mar 2026 12:51:29 +0000 Message-ID: <20260319125143.230377-6-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260319125143.230377-1-biju.das.jz@bp.renesas.com> References: <20260319125143.230377-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das After a suspend/resume cycle, critical module clocks (CLK_IS_CRITICAL) may be left disabled as there is no owning driver to restore them, unlike regular clocks. Add rzg2l_mod_enable_crit_clock_init_mstop() which walks all module clocks on resume, re-enables any critical clock found disabled, and then restores its MSTOP state via the existing helper. This replaces the direct call to rzg2l_mod_clock_init_mstop() in rzg2l_cpg_resume(), preserving the correct clock-before-MSTOP restore ordering. Signed-off-by: Biju Das --- v5->v6: * Updated commit description * Dropped the list implementation. * Replaced rzg2l_mod_clock_init_mstop->rzg2l_mod_enable_crit_clock_init_m= stop()=20 for enabling critical clks and restoring mstop state during resume. v4->v5: * No change v4: * Moved this patch from [1] as it is boot-dependent [1] https://lore.kernel.org/all/20260306134228.871815-1-biju.das.jz@bp.ren= esas.com/ --- drivers/clk/renesas/rzg2l-cpg.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cp= g.c index b68b0312f0e3..7899c79734e1 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -1600,6 +1600,23 @@ static void rzg2l_mod_clock_init_mstop_helper(struct= rzg2l_cpg_priv *priv, } } =20 +static void rzg2l_mod_enable_crit_clock_init_mstop(struct rzg2l_cpg_priv *= priv) +{ + struct mod_clock *clk; + struct clk_hw *hw; + + for_each_mod_clock(clk, hw, priv) { + if (!clk->mstop) + continue; + + if ((clk_hw_get_flags(&clk->hw) & CLK_IS_CRITICAL) && + (!rzg2l_mod_clock_is_enabled(&clk->hw))) + rzg2l_mod_clock_endisable(&clk->hw, true); + + rzg2l_mod_clock_init_mstop_helper(priv, clk); + } +} + static void rzg2l_mod_clock_init_mstop(struct rzg2l_cpg_priv *priv) { struct mod_clock *clk; @@ -2095,7 +2112,7 @@ static int rzg2l_cpg_resume(struct device *dev) if (ret) return ret; =20 - rzg2l_mod_clock_init_mstop(priv); + rzg2l_mod_enable_crit_clock_init_mstop(priv); =20 return 0; } --=20 2.43.0