From nobody Mon Apr 6 14:10:30 2026 Received: from spam.asrmicro.com (asrmicro.com [210.13.118.86]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B59783AEF54 for ; Thu, 19 Mar 2026 09:39:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.13.118.86 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773913171; cv=none; b=p3dcpeUINC1I0J5cLxRTDFsGSfuHlcfxUahpp6j/eBFRFbb8Scdn00n9cjSziPiNfgRJomWwahlTkCJhe7y1gVjWM3ucQSkEKoJzpv5ZK0WNbq/sBcQowXtCrpQq+iTHsxQHQgFIYPlTH8cXgTaBtH7mwWc6WbczOUZhF9UcKRY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773913171; c=relaxed/simple; bh=yYI7C7HqyENNu2uJvA8a6csymOJSuW3EVgXE7JnMEvI=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=frEINhyynrzPqD6GF7AzM1YotyYcOFeOGn/GM7mhicA0AVkgP5052oiLfi7ZEXhAp1cx8CM6npVYRMduy4R17+CatutOuYWB+T0QaRTq7YbFVj1jQYIJFFFsn2mLPk3HdOYPiV4cTYMMWV6BYO0ZubvE3+KztZkQhYTV53qTeTI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=asrmicro.com; spf=pass smtp.mailfrom=asrmicro.com; arc=none smtp.client-ip=210.13.118.86 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=asrmicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=asrmicro.com Received: from exch02.asrmicro.com (exch02.asrmicro.com [10.1.24.122]) by spam.asrmicro.com with ESMTPS id 62J9cZlq072012 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=FAIL); Thu, 19 Mar 2026 17:38:35 +0800 (GMT-8) (envelope-from hongjiefang@asrmicro.com) Received: from localhost (10.1.170.248) by exch02.asrmicro.com (10.1.24.122) with Microsoft SMTP Server (TLS) id 15.0.847.32; Thu, 19 Mar 2026 17:38:39 +0800 From: Hongjie Fang To: , , , CC: Subject: [PATCH] scsi: ufs: core: Add a vop to handle vendor specific ops Date: Thu, 19 Mar 2026 17:38:39 +0800 Message-ID: <20260319093839.1854051-1-hongjiefang@asrmicro.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: exch03.asrmicro.com (10.1.24.118) To exch02.asrmicro.com (10.1.24.122) X-DNSRBL: X-SPAM-SOURCE-CHECK: pass X-MAIL: spam.asrmicro.com 62J9cZlq072012 Content-Type: text/plain; charset="utf-8" add a vop to allow some vendors to do some additional ops for some interrupts if necessary. Signed-off-by: Hongjie Fang --- drivers/ufs/core/ufshcd-priv.h | 6 ++++++ drivers/ufs/core/ufshcd.c | 2 ++ include/ufs/ufshcd.h | 2 ++ 3 files changed, 10 insertions(+) diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h index 37c32071e754..1d3dcbc2fda3 100644 --- a/drivers/ufs/core/ufshcd-priv.h +++ b/drivers/ufs/core/ufshcd-priv.h @@ -287,6 +287,12 @@ static inline u32 ufshcd_vops_freq_to_gear_speed(struc= t ufs_hba *hba, unsigned l return 0; } =20 +static inline void ufshcd_vops_vendor_intr(struct ufs_hba *hba) +{ + if (hba->vops && hba->vops->vendor_intr) + hba->vops->vendor_intr(hba); +} + extern const struct ufs_pm_lvl_states ufs_pm_lvl_states[]; =20 /** diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 9ceb6d6d479d..be51418e09c2 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -7141,6 +7141,8 @@ static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba= , u32 intr_status) { irqreturn_t retval =3D IRQ_NONE; =20 + ufshcd_vops_vendor_intr(hba); + if (intr_status & UFSHCD_UIC_MASK) retval |=3D ufshcd_uic_cmd_compl(hba, intr_status); =20 diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 8563b6648976..a8eca8c22e7f 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -331,6 +331,7 @@ struct ufs_pwr_mode_info { * @config_esi: called to config Event Specific Interrupt * @config_scsi_dev: called to configure SCSI device parameters * @freq_to_gear_speed: called to map clock frequency to the max supported= gear speed + * @vendor_intr: called before the interrupts handle */ struct ufs_hba_variant_ops { const char *name; @@ -380,6 +381,7 @@ struct ufs_hba_variant_ops { int (*config_esi)(struct ufs_hba *hba); void (*config_scsi_dev)(struct scsi_device *sdev); u32 (*freq_to_gear_speed)(struct ufs_hba *hba, unsigned long freq); + void (*vendor_intr)(struct ufs_hba *hba); }; =20 /* clock gating state */ --=20 2.25.1