From nobody Thu Apr 2 01:10:08 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3935D38A707; Thu, 19 Mar 2026 02:22:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773886935; cv=none; b=jTFxlFtoTuu+0FebYo0XSW4xryEwPpsd/7dAB6RKthEX1Fhjt/DnWajYyR02DqKukYlrSQjnDb4QrcqJgGIrb4zEB0qoaecFlCqndYEn9vT2A9PNxXW+VyQ3H3UJ9JxNBrFqIQUmeFP3K8vqlT+5OtJd9fk0qUhLICX+kxVaSUo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773886935; c=relaxed/simple; bh=a5oqcSQvJRCPuUc/zTfUaWfW2caSgMULe5WFU7nfwO4=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VXErMwqo3RQ8GLwPzKrbrP6gX/YrEG/10oQvgR0O++pPoEYh1JBBY50RpgyUVkkQpk9BPNG660Kc4vPy5+D7iR33FIyTYDDU6H6zzNMg4/Y81QbLnSqg/IbAyNDMibbObd2uqpTEOHinzC3gxK7JL7n5bVAmfaYj5hE/m0J0pj4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=UAyVQy00; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="UAyVQy00" X-UUID: 66bd42c6233a11f1a39cd589f645bc18-20260319 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From; bh=rgjfTRZ3IyQu3d0jM6so/Baz2x66MH/2IptdxNGeCsE=; b=UAyVQy00BikG4jG88kBLJYqZD1iLTCmw5TQAZaodD2ue+Xj8QOYgCfLi8sIhGSz1rrq2+pSErIc03pOQWr/zhF/TII2XqQw+1l+8Ypj8YuwjS8THfEW8aAUn4e9m2VdLCO0eaUQKHJ10VmEn7ZZcKfDgzJse6bVSzGVGqnaIkeQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.12,REQID:0925f6fc-f553-4dd7-9f00-6fcc8a5dbafe,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:e7bac3a,CLOUDID:c9b0a94c-9183-487b-8624-e74f2dd98990,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 66bd42c6233a11f1a39cd589f645bc18-20260319 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 104357601; Thu, 19 Mar 2026 10:21:56 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 19 Mar 2026 10:21:55 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 19 Mar 2026 10:21:54 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Nicolas Dufresne , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , Subject: [PATCH v13 01/12] media: mediatek: jpeg: fix jpeg cores' amounts setting Date: Thu, 19 Mar 2026 10:21:40 +0800 Message-ID: <20260319022152.31313-2-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260319022152.31313-1-kyrie.wu@mediatek.com> References: <20260319022152.31313-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Different ICs have different amounts of cores, use a variable to set the cores' amounts. Fixes: 934e8bccac95 ("mtk-jpegenc: support jpegenc multi-hardware") Fixes: 0fa49df4222f ("media: mtk-jpegdec: support jpegdec multi-hardware") Signed-off-by: Kyrie Wu Reviewed-by: AngeloGioacchino Del Regno --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 8 ++++---- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h | 2 ++ drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 1 + drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 1 + 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index c01124a349f6..ed93117f276e 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1460,7 +1460,7 @@ static int mtk_jpegenc_get_hw(struct mtk_jpeg_ctx *ct= x) int i; =20 spin_lock_irqsave(&jpeg->hw_lock, flags); - for (i =3D 0; i < MTK_JPEGENC_HW_MAX; i++) { + for (i =3D 0; i < jpeg->max_hw_count; i++) { comp_jpeg =3D jpeg->enc_hw_dev[i]; if (comp_jpeg->hw_state =3D=3D MTK_JPEG_HW_IDLE) { hw_id =3D i; @@ -1507,7 +1507,7 @@ static int mtk_jpegdec_get_hw(struct mtk_jpeg_ctx *ct= x) int i; =20 spin_lock_irqsave(&jpeg->hw_lock, flags); - for (i =3D 0; i < MTK_JPEGDEC_HW_MAX; i++) { + for (i =3D 0; i < jpeg->max_hw_count; i++) { comp_jpeg =3D jpeg->dec_hw_dev[i]; if (comp_jpeg->hw_state =3D=3D MTK_JPEG_HW_IDLE) { hw_id =3D i; @@ -1590,7 +1590,7 @@ static void mtk_jpegenc_worker(struct work_struct *wo= rk) jpeg_work); struct mtk_jpeg_dev *jpeg =3D ctx->jpeg; =20 - for (i =3D 0; i < MTK_JPEGENC_HW_MAX; i++) + for (i =3D 0; i < jpeg->max_hw_count; i++) comp_jpeg[i] =3D jpeg->enc_hw_dev[i]; i =3D 0; =20 @@ -1685,7 +1685,7 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) struct mtk_jpeg_fb fb; unsigned long flags; =20 - for (i =3D 0; i < MTK_JPEGDEC_HW_MAX; i++) + for (i =3D 0; i < jpeg->max_hw_count; i++) comp_jpeg[i] =3D jpeg->dec_hw_dev[i]; i =3D 0; =20 diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.h index 02ed0ed5b736..6be5cf30dea1 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h @@ -212,6 +212,7 @@ struct mtk_jpegdec_comp_dev { * @reg_decbase: jpg decode register base addr * @dec_hw_dev: jpg decode hardware device * @hw_index: jpg hw index + * @max_hw_count: jpeg hw-core count */ struct mtk_jpeg_dev { struct mutex lock; @@ -234,6 +235,7 @@ struct mtk_jpeg_dev { void __iomem *reg_decbase[MTK_JPEGDEC_HW_MAX]; struct mtk_jpegdec_comp_dev *dec_hw_dev[MTK_JPEGDEC_HW_MAX]; atomic_t hw_index; + u32 max_hw_count; }; =20 /** diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index 32372781daf5..4534caeb104f 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -664,6 +664,7 @@ static int mtk_jpegdec_hw_probe(struct platform_device = *pdev) master_dev->dec_hw_dev[i] =3D dev; master_dev->reg_decbase[i] =3D dev->reg_base; dev->master_dev =3D master_dev; + master_dev->max_hw_count++; =20 platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index b6f5b2249f1f..2765dafab4ad 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -386,6 +386,7 @@ static int mtk_jpegenc_hw_probe(struct platform_device = *pdev) master_dev->enc_hw_dev[i] =3D dev; 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Thu, 19 Mar 2026 10:21:57 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 19 Mar 2026 10:21:56 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 19 Mar 2026 10:21:55 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Nicolas Dufresne , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , Subject: [PATCH v13 02/12] media: mediatek: jpeg: fix jpeg buffer payload size setting Date: Thu, 19 Mar 2026 10:21:41 +0800 Message-ID: <20260319022152.31313-3-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260319022152.31313-1-kyrie.wu@mediatek.com> References: <20260319022152.31313-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" For multi-core jpegdec, if one core gets resolution change event, the payload size, representing the size of Y/C data, needs to change. But others are decoding at the same time and it can not be changed immediately, which results in the payload size to not match the real buffer length. The payload size must less than the real buffer length to remove the warnning logs. Fixes: 0fa49df4222f ("media: mtk-jpegdec: support jpegdec multi-hardware") Signed-off-by: Kyrie Wu --- .../platform/mediatek/jpeg/mtk_jpeg_core.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index ed93117f276e..f12e7dc073f3 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -702,6 +702,7 @@ static int mtk_jpeg_buf_prepare(struct vb2_buffer *vb) struct mtk_jpeg_ctx *ctx =3D vb2_get_drv_priv(vb->vb2_queue); struct mtk_jpeg_q_data *q_data =3D NULL; struct v4l2_plane_pix_format plane_fmt =3D {}; + size_t max_size; int i; =20 q_data =3D mtk_jpeg_get_q_data(ctx, vb->vb2_queue->type); @@ -710,12 +711,20 @@ static int mtk_jpeg_buf_prepare(struct vb2_buffer *vb) =20 for (i =3D 0; i < q_data->fmt->colplanes; i++) { plane_fmt =3D q_data->pix_mp.plane_fmt[i]; + max_size =3D plane_fmt.sizeimage; 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Thu, 19 Mar 2026 10:21:58 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 19 Mar 2026 10:21:56 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 19 Mar 2026 10:21:56 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Nicolas Dufresne , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , Subject: [PATCH v13 03/12] media: mediatek: jpeg: fix buffer structure size and layout Date: Thu, 19 Mar 2026 10:21:42 +0800 Message-ID: <20260319022152.31313-4-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260319022152.31313-1-kyrie.wu@mediatek.com> References: <20260319022152.31313-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Updates the `buf_struct_size` in the JPEG driver to use the correct structure `mtk_jpeg_src_buf` instead of `v4l2_m2m_buffer`, ensuring proper handling of source buffers. The previous buffer size led to mismatches and potential issues during video buffer handling. Moves `frame_num` in the `mtk_jpeg_src_buf` structure to align with other members appropriately. The first field of the driver-specific buffer structure must be the subsystem-specificstruct (vb2_v4l2_buffer in the case of V4L2). Fixes: 5fb1c2361e56 ("mtk-jpegenc: add jpeg encode worker interface") Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 2 +- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index f12e7dc073f3..687354d76e6e 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1092,7 +1092,7 @@ static int mtk_jpeg_queue_init(void *priv, struct vb2= _queue *src_vq, dst_vq->type =3D V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; dst_vq->io_modes =3D VB2_DMABUF | VB2_MMAP; dst_vq->drv_priv =3D ctx; - dst_vq->buf_struct_size =3D sizeof(struct v4l2_m2m_buffer); + dst_vq->buf_struct_size =3D sizeof(struct mtk_jpeg_src_buf); dst_vq->ops =3D jpeg->variant->qops; dst_vq->mem_ops =3D &vb2_dma_contig_memops; dst_vq->timestamp_flags =3D V4L2_BUF_FLAG_TIMESTAMP_COPY; diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.h index 6be5cf30dea1..148fd41759b7 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h @@ -85,10 +85,10 @@ struct mtk_jpeg_variant { }; =20 struct mtk_jpeg_src_buf { - u32 frame_num; struct vb2_v4l2_buffer b; struct list_head list; u32 bs_size; + u32 frame_num; struct mtk_jpeg_dec_param dec_param; =20 struct mtk_jpeg_ctx *curr_ctx; --=20 2.45.2 From nobody Thu Apr 2 01:10:08 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B5991386C9; Thu, 19 Mar 2026 02:22:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; 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charset="utf-8" Enhances the Mediatek JPEG driver's stability and reliability by ensuring that all queued buffers are processed before stopping the streaming in multi-core environments. It introduces a call to `vb2_wait_for_all_buffers()` in the `mtk_jpeg_enc_stop_streaming()` and `mtk_jpeg_dec_stop_streaming()` functions when the `multi_core` variant is enabled. This change ensures that no buffers are left unprocessed, preventing potential data loss or corruption during multi-core flow. Fixes: 0fa49df4222f ("media: mtk-jpegdec: support jpegdec multi-hardware") Fixes: dedc21500334 ("media: mtk-jpegdec: add jpeg decode worker interface") Fixes: 934e8bccac95 ("mtk-jpegenc: support jpegenc multi-hardware") Fixes: 5fb1c2361e56 ("mtk-jpegenc: add jpeg encode worker interface") Signed-off-by: Kyrie Wu --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index 687354d76e6e..2e884aa31d1a 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -850,8 +850,12 @@ static struct vb2_v4l2_buffer *mtk_jpeg_buf_remove(str= uct mtk_jpeg_ctx *ctx, static void mtk_jpeg_enc_stop_streaming(struct vb2_queue *q) { struct mtk_jpeg_ctx *ctx =3D vb2_get_drv_priv(q); + struct mtk_jpeg_dev *jpeg =3D ctx->jpeg; struct vb2_v4l2_buffer *vb; =20 + if (jpeg->variant->multi_core) + vb2_wait_for_all_buffers(q); + while ((vb =3D mtk_jpeg_buf_remove(ctx, q->type))) v4l2_m2m_buf_done(vb, VB2_BUF_STATE_ERROR); } @@ -859,6 +863,7 @@ static void mtk_jpeg_enc_stop_streaming(struct vb2_queu= e *q) static void mtk_jpeg_dec_stop_streaming(struct vb2_queue *q) { struct mtk_jpeg_ctx *ctx =3D vb2_get_drv_priv(q); + struct mtk_jpeg_dev *jpeg =3D ctx->jpeg; struct vb2_v4l2_buffer *vb; =20 /* @@ -866,6 +871,9 @@ static void mtk_jpeg_dec_stop_streaming(struct vb2_queu= e *q) * Before STREAMOFF, we still have to return the old resolution and * subsampling. Update capture queue when the stream is off. */ + if (jpeg->variant->multi_core) + vb2_wait_for_all_buffers(q); + if (ctx->state =3D=3D MTK_JPEG_SOURCE_CHANGE && V4L2_TYPE_IS_CAPTURE(q->type)) { struct mtk_jpeg_src_buf *src_buf; --=20 2.45.2 From nobody Thu Apr 2 01:10:08 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A55D387361; Thu, 19 Mar 2026 02:22:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773886930; cv=none; b=t/UPYGpiHuZ6XsThtDDU5quOIe4++yredK0CKNOYsBHHBs1Uyy5VxfJeXKT1o21wkxqIo1o2fohPy91CpUiBgwD4eFh/goUDmpDpIwC7V9A1fiYGqNXNCboSCin3BUq9oJtIGTnTCkElkgh/4lvyj9sgT6OnRLGF3pZcQcUtV3Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773886930; c=relaxed/simple; bh=exNYQWFEWehk8Oqva2MEHtCAhRbvXR6fpvsE0yu97go=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=noNSTQGIsFoYYisi63lBFgZlc2qFhXUtmowMvdXQrcOcBkrdKaXh2znfhbojESNBNCcaGdurpSLY8VEpQ5737/Rfy9uHHMjXgFe29EIfqrFe/d8dfX2/QNlFmSGeiOjdhzic1kYu6d/8LoC1fg4EjbuHe/vTF5h26gUDkKWHNlk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=ahyfUS6Y; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="ahyfUS6Y" X-UUID: 685a9ade233a11f1a02d4725871ece0b-20260319 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From; bh=DZEXnAUOTgqSP/AYe8SzTtq6MPUe7lQFE+jJlLJzL0k=; b=ahyfUS6YtZC0Gk+nDdoBQ37p7AoLmODmIo6NTzOx4Yl+nESe+9ubRPgmX6LXSReZpwiGwa0JIoNuYaWujhpUw8SjWEADr5IXgx5BtlZoPggxiQh1HM+qXvhQJrUaK52N7Lbh6sRCB5Us7k4gXEJ9P6c7wrnZqaux/CPk9VSqVcg=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.12,REQID:733d47dd-3616-4b47-80e2-6a631ab59860,IP:0,U RL:0,TC:0,Content:-5,EDM:-20,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:-25 X-CID-META: VersionHash:e7bac3a,CLOUDID:7028de16-aa6b-4b2e-be76-373ef1a42b04,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:1,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI: 0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 685a9ade233a11f1a02d4725871ece0b-20260319 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2121683931; Thu, 19 Mar 2026 10:21:59 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS09N2.mediatek.inc (172.21.101.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 19 Mar 2026 10:21:58 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 19 Mar 2026 10:21:57 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Nicolas Dufresne , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , Subject: [PATCH v13 05/12] media: mediatek: jpeg: Fix multi-core clk suspend and resume setting Date: Thu, 19 Mar 2026 10:21:44 +0800 Message-ID: <20260319022152.31313-6-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260319022152.31313-1-kyrie.wu@mediatek.com> References: <20260319022152.31313-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The suspend/resume callback function is defined in the dev_pm_ops structure, which is defined in platform_driver. For multiple-core architecture, each hardware driver will register a platform_driver structure, so it is necessary to add a suspend/resume callback function for each hardware to support this operation. Fixes: 934e8bccac95 ("mtk-jpegenc: support jpegenc multi-hardware") Fixes: 0fa49df4222f ("media: mtk-jpegdec: support jpegdec multi-hardware") Signed-off-by: Kyrie Wu --- .../platform/mediatek/jpeg/mtk_jpeg_core.c | 28 +++------ .../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 62 +++++++++++++++++-- .../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 60 ++++++++++++++++-- 3 files changed, 121 insertions(+), 29 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index 2e884aa31d1a..5c88f34634f9 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1115,6 +1115,9 @@ static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpeg) { int ret; =20 + if (jpeg->variant->multi_core) + return; + ret =3D clk_bulk_prepare_enable(jpeg->variant->num_clks, jpeg->variant->clks); if (ret) @@ -1123,6 +1126,9 @@ static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpeg) =20 static void mtk_jpeg_clk_off(struct mtk_jpeg_dev *jpeg) { + if (jpeg->variant->multi_core) + return; + clk_bulk_disable_unprepare(jpeg->variant->num_clks, jpeg->variant->clks); } @@ -1645,13 +1651,6 @@ static void mtk_jpegenc_worker(struct work_struct *w= ork) goto enc_end; } =20 - ret =3D clk_prepare_enable(comp_jpeg[hw_id]->venc_clk.clks->clk); - if (ret) { - dev_err(jpeg->dev, "%s : %d, jpegenc clk_prepare_enable fail\n", - __func__, __LINE__); - goto enc_end; - } - v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); =20 @@ -1748,20 +1747,13 @@ static void mtk_jpegdec_worker(struct work_struct *= work) jpeg_dst_buf->frame_num =3D ctx->total_frame_num; =20 mtk_jpegdec_set_hw_param(ctx, hw_id, src_buf, dst_buf); - ret =3D pm_runtime_get_sync(comp_jpeg[hw_id]->dev); + ret =3D pm_runtime_resume_and_get(comp_jpeg[hw_id]->dev); if (ret < 0) { dev_err(jpeg->dev, "%s : %d, pm_runtime_get_sync fail !!!\n", __func__, __LINE__); goto dec_end; } =20 - ret =3D clk_prepare_enable(comp_jpeg[hw_id]->jdec_clk.clks->clk); - if (ret) { - dev_err(jpeg->dev, "%s : %d, jpegdec clk_prepare_enable fail\n", - __func__, __LINE__); - goto clk_end; - } - v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); =20 @@ -1771,7 +1763,7 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) &dst_buf->vb2_buf, &fb)) { dev_err(jpeg->dev, "%s : %d, mtk_jpeg_set_dec_dst fail\n", __func__, __LINE__); - goto setdst_end; + goto set_dst_fail; } =20 schedule_delayed_work(&comp_jpeg[hw_id]->job_timeout_work, @@ -1792,9 +1784,7 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) =20 return; =20 -setdst_end: - clk_disable_unprepare(comp_jpeg[hw_id]->jdec_clk.clks->clk); -clk_end: +set_dst_fail: pm_runtime_put(comp_jpeg[hw_id]->dev); dec_end: v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index 4534caeb104f..9a8dbca6af00 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -533,13 +533,12 @@ static void mtk_jpegdec_timeout_work(struct work_stru= ct *work) v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); =20 mtk_jpeg_dec_reset(cjpeg->reg_base); - clk_disable_unprepare(cjpeg->jdec_clk.clks->clk); - pm_runtime_put(cjpeg->dev); cjpeg->hw_state =3D MTK_JPEG_HW_IDLE; atomic_inc(&master_jpeg->hw_rdy); wake_up(&master_jpeg->hw_wq); v4l2_m2m_buf_done(src_buf, buf_state); mtk_jpegdec_put_buf(cjpeg); + pm_runtime_put(cjpeg->dev); } =20 static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, void *priv) @@ -547,7 +546,6 @@ static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, = void *priv) struct vb2_v4l2_buffer *src_buf, *dst_buf; struct mtk_jpeg_src_buf *jpeg_src_buf; enum vb2_buffer_state buf_state; - struct mtk_jpeg_ctx *ctx; u32 dec_irq_ret; u32 irq_status; int i; @@ -557,7 +555,6 @@ static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, = void *priv) =20 cancel_delayed_work(&jpeg->job_timeout_work); =20 - ctx =3D jpeg->hw_param.curr_ctx; src_buf =3D jpeg->hw_param.src_buffer; dst_buf =3D jpeg->hw_param.dst_buffer; v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); @@ -580,12 +577,11 @@ static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq= , void *priv) buf_state =3D VB2_BUF_STATE_DONE; v4l2_m2m_buf_done(src_buf, buf_state); mtk_jpegdec_put_buf(jpeg); - pm_runtime_put(ctx->jpeg->dev); - clk_disable_unprepare(jpeg->jdec_clk.clks->clk); =20 jpeg->hw_state =3D MTK_JPEG_HW_IDLE; wake_up(&master_jpeg->hw_wq); atomic_inc(&master_jpeg->hw_rdy); + pm_runtime_put(jpeg->dev); =20 return IRQ_HANDLED; } @@ -668,15 +664,69 @@ static int mtk_jpegdec_hw_probe(struct platform_devic= e *pdev) =20 platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); + ret =3D devm_clk_bulk_get(dev->dev, + jpegdec_clk->clk_num, + jpegdec_clk->clks); + if (ret) { + dev_err(&pdev->dev, "Failed to init clk\n"); + return ret; + } =20 return 0; } =20 +static int mtk_jpegdec_pm_suspend(struct device *dev) +{ + struct mtk_jpegdec_comp_dev *jpeg =3D dev_get_drvdata(dev); + + clk_bulk_disable_unprepare(jpeg->jdec_clk.clk_num, + jpeg->jdec_clk.clks); + + return 0; +} + +static int mtk_jpegdec_pm_resume(struct device *dev) +{ + struct mtk_jpegdec_comp_dev *jpeg =3D dev_get_drvdata(dev); + + return clk_bulk_prepare_enable(jpeg->jdec_clk.clk_num, + jpeg->jdec_clk.clks); +} + +static int mtk_jpegdec_suspend(struct device *dev) +{ + struct mtk_jpegdec_comp_dev *jpeg =3D dev_get_drvdata(dev); + + v4l2_m2m_suspend(jpeg->master_dev->m2m_dev); + + return pm_runtime_force_suspend(dev); +} + +static int mtk_jpegdec_resume(struct device *dev) +{ + struct mtk_jpegdec_comp_dev *jpeg =3D dev_get_drvdata(dev); + int ret; + + ret =3D pm_runtime_force_resume(dev); + if (ret < 0) + return ret; + + v4l2_m2m_resume(jpeg->master_dev->m2m_dev); + + return 0; +} + +static const struct dev_pm_ops mtk_jpegdec_pm_ops =3D { + SYSTEM_SLEEP_PM_OPS(mtk_jpegdec_suspend, mtk_jpegdec_resume) + RUNTIME_PM_OPS(mtk_jpegdec_pm_suspend, mtk_jpegdec_pm_resume, NULL) +}; + static struct platform_driver mtk_jpegdec_hw_driver =3D { .probe =3D mtk_jpegdec_hw_probe, .driver =3D { .name =3D "mtk-jpegdec-hw", .of_match_table =3D mtk_jpegdec_hw_ids, + .pm =3D &mtk_jpegdec_pm_ops, }, }; =20 diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index 2765dafab4ad..5d1c217fea0f 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -264,13 +264,12 @@ static void mtk_jpegenc_timeout_work(struct work_stru= ct *work) v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); =20 mtk_jpeg_enc_reset(cjpeg->reg_base); - clk_disable_unprepare(cjpeg->venc_clk.clks->clk); - pm_runtime_put(cjpeg->dev); cjpeg->hw_state =3D MTK_JPEG_HW_IDLE; atomic_inc(&master_jpeg->hw_rdy); wake_up(&master_jpeg->hw_wq); v4l2_m2m_buf_done(src_buf, buf_state); mtk_jpegenc_put_buf(cjpeg); + pm_runtime_put(cjpeg->dev); } =20 static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv) @@ -304,12 +303,11 @@ static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq= , void *priv) buf_state =3D VB2_BUF_STATE_DONE; v4l2_m2m_buf_done(src_buf, buf_state); mtk_jpegenc_put_buf(jpeg); - pm_runtime_put(ctx->jpeg->dev); - clk_disable_unprepare(jpeg->venc_clk.clks->clk); =20 jpeg->hw_state =3D MTK_JPEG_HW_IDLE; wake_up(&master_jpeg->hw_wq); atomic_inc(&master_jpeg->hw_rdy); + pm_runtime_put(jpeg->dev); =20 return IRQ_HANDLED; } @@ -390,15 +388,69 @@ static int mtk_jpegenc_hw_probe(struct platform_devic= e *pdev) =20 platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); + ret =3D devm_clk_bulk_get(dev->dev, + jpegenc_clk->clk_num, + jpegenc_clk->clks); + if (ret) { + dev_err(&pdev->dev, "Failed to init clk\n"); + return ret; + } + + return 0; +} + +static int mtk_jpegenc_pm_suspend(struct device *dev) +{ + struct mtk_jpegenc_comp_dev *jpeg =3D dev_get_drvdata(dev); + + clk_bulk_disable_unprepare(jpeg->venc_clk.clk_num, + jpeg->venc_clk.clks); =20 return 0; } =20 +static int mtk_jpegenc_pm_resume(struct device *dev) +{ + struct mtk_jpegenc_comp_dev *jpeg =3D dev_get_drvdata(dev); + + return clk_bulk_prepare_enable(jpeg->venc_clk.clk_num, + jpeg->venc_clk.clks); +} + +static int mtk_jpegenc_suspend(struct device *dev) +{ + struct mtk_jpegenc_comp_dev *jpeg =3D dev_get_drvdata(dev); + + v4l2_m2m_suspend(jpeg->master_dev->m2m_dev); + + return pm_runtime_force_suspend(dev); +} + +static int mtk_jpegenc_resume(struct device *dev) +{ + struct mtk_jpegenc_comp_dev *jpeg =3D dev_get_drvdata(dev); + int ret; + + ret =3D pm_runtime_force_resume(dev); + if (ret < 0) + return ret; + + v4l2_m2m_resume(jpeg->master_dev->m2m_dev); + + return 0; +} + +static const struct dev_pm_ops mtk_jpegenc_pm_ops =3D { + SYSTEM_SLEEP_PM_OPS(mtk_jpegenc_suspend, mtk_jpegenc_resume) + RUNTIME_PM_OPS(mtk_jpegenc_pm_suspend, mtk_jpegenc_pm_resume, NULL) +}; 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Thu, 19 Mar 2026 10:22:00 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 19 Mar 2026 10:21:59 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 19 Mar 2026 10:21:58 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Nicolas Dufresne , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , Subject: [PATCH v13 06/12] media: mediatek: jpeg: fix decoding buffer number setting timing issue Date: Thu, 19 Mar 2026 10:21:45 +0800 Message-ID: <20260319022152.31313-7-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260319022152.31313-1-kyrie.wu@mediatek.com> References: <20260319022152.31313-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The src buffer doesn't need set information and dst buf parameters only need to set when the power set succussed and protect the setting by spinlock ensuring that any later operations acting on this buffer reflect accurate state and frame data. Fixes: dedc21500334 ("media: mtk-jpegdec: add jpeg decode worker interface") Signed-off-by: Kyrie Wu --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 9 +++------ drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 1 + drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 1 + 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index 5c88f34634f9..2596c3453053 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1732,7 +1732,6 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) =20 v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); jpeg_src_buf =3D mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf); - jpeg_dst_buf =3D mtk_jpeg_vb2_to_srcbuf(&dst_buf->vb2_buf); =20 if (mtk_jpeg_check_resolution_change(ctx, &jpeg_src_buf->dec_param)) { @@ -1741,11 +1740,6 @@ static void mtk_jpegdec_worker(struct work_struct *w= ork) goto getbuf_fail; } =20 - jpeg_src_buf->curr_ctx =3D ctx; - jpeg_src_buf->frame_num =3D ctx->total_frame_num; - jpeg_dst_buf->curr_ctx =3D ctx; - jpeg_dst_buf->frame_num =3D ctx->total_frame_num; - mtk_jpegdec_set_hw_param(ctx, hw_id, src_buf, dst_buf); ret =3D pm_runtime_resume_and_get(comp_jpeg[hw_id]->dev); if (ret < 0) { @@ -1770,6 +1764,9 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) msecs_to_jiffies(MTK_JPEG_HW_TIMEOUT_MSEC)); =20 spin_lock_irqsave(&comp_jpeg[hw_id]->hw_lock, flags); + jpeg_dst_buf =3D mtk_jpeg_vb2_to_srcbuf(&dst_buf->vb2_buf); + jpeg_dst_buf->curr_ctx =3D ctx; + jpeg_dst_buf->frame_num =3D ctx->total_frame_num; ctx->total_frame_num++; mtk_jpeg_dec_reset(comp_jpeg[hw_id]->reg_base); mtk_jpeg_dec_set_config(comp_jpeg[hw_id]->reg_base, diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index 9a8dbca6af00..e4d2c5d4ec73 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -513,6 +513,7 @@ static void mtk_jpegdec_put_buf(struct mtk_jpegdec_comp= _dev *jpeg) v4l2_m2m_buf_done(&tmp_dst_done_buf->b, VB2_BUF_STATE_DONE); ctx->last_done_frame_num++; + break; } } } diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index 5d1c217fea0f..2adea3aca50b 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -242,6 +242,7 @@ static void mtk_jpegenc_put_buf(struct mtk_jpegenc_comp= _dev *jpeg) v4l2_m2m_buf_done(&tmp_dst_done_buf->b, VB2_BUF_STATE_DONE); ctx->last_done_frame_num++; + break; } } } --=20 2.45.2 From nobody Thu Apr 2 01:10:08 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 411E63859CF; Thu, 19 Mar 2026 02:22:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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charset="utf-8" This patch refines the handling of resolution change events within JPEG decoder worker. The `mtk_jpeg_set_queue_data` function is now called to set up queue data before signaling a source change through `mtk_jpeg_queue_src_chg_event`. By reorganizing these calls, the patch ensures that necessary queue information is updated prior to transitioning the context state to `MTK_JPEG_SOURCE_CHANGE`. A condition is added to exit early if the context is already in the `MTK_JPEG_SOURCE_CHANGE` state, preventing redundant operations and improving processing efficiency. Fixes: dedc21500334 ("media: mtk-jpegdec: add jpeg decode worker interface") Signed-off-by: Kyrie Wu --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index 2596c3453053..efcbad953be1 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1735,11 +1735,15 @@ static void mtk_jpegdec_worker(struct work_struct *= work) =20 if (mtk_jpeg_check_resolution_change(ctx, &jpeg_src_buf->dec_param)) { - mtk_jpeg_queue_src_chg_event(ctx); + mtk_jpeg_set_queue_data(ctx, &jpeg_src_buf->dec_param); ctx->state =3D MTK_JPEG_SOURCE_CHANGE; + mtk_jpeg_queue_src_chg_event(ctx); goto getbuf_fail; } =20 + if (ctx->state =3D=3D MTK_JPEG_SOURCE_CHANGE) + goto getbuf_fail; + mtk_jpegdec_set_hw_param(ctx, hw_id, src_buf, dst_buf); ret =3D pm_runtime_resume_and_get(comp_jpeg[hw_id]->dev); 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Thu, 19 Mar 2026 10:22:01 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 19 Mar 2026 10:22:00 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Nicolas Dufresne , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , Subject: [PATCH v13 08/12] media: mediatek: jpeg: fix remove buffer removal timing for multi-core Date: Thu, 19 Mar 2026 10:21:47 +0800 Message-ID: <20260319022152.31313-9-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260319022152.31313-1-kyrie.wu@mediatek.com> References: <20260319022152.31313-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Move calls to v4l2_m2m_src/dst_buf_remove() inside of the spinlock protected scope to ensure all necessary operations are performed before buffers are removed from their queues and ensure proper synchronization of buffer handling to avoid buffer lost. Fixes: 86379bd9d399 ("media: mtk-jpeg: Fixes jpeg enc&dec worker sw flow") Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index efcbad953be1..e67df5eb711b 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1651,9 +1651,6 @@ static void mtk_jpegenc_worker(struct work_struct *wo= rk) goto enc_end; } =20 - v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); - v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); - schedule_delayed_work(&comp_jpeg[hw_id]->job_timeout_work, msecs_to_jiffies(MTK_JPEG_HW_TIMEOUT_MSEC)); =20 @@ -1671,6 +1668,8 @@ static void mtk_jpegenc_worker(struct work_struct *wo= rk) &src_buf->vb2_buf); mtk_jpeg_set_enc_params(ctx, comp_jpeg[hw_id]->reg_base); mtk_jpeg_enc_start(comp_jpeg[hw_id]->reg_base); + v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); spin_unlock_irqrestore(&comp_jpeg[hw_id]->hw_lock, flags); =20 @@ -1752,9 +1751,6 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) goto dec_end; } =20 - v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); - v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); - mtk_jpeg_set_dec_src(ctx, &src_buf->vb2_buf, &bs); if (mtk_jpeg_set_dec_dst(ctx, &jpeg_src_buf->dec_param, @@ -1779,6 +1775,8 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) jpeg_src_buf->bs_size, &bs, &fb); + v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); mtk_jpeg_dec_start(comp_jpeg[hw_id]->reg_base); v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); spin_unlock_irqrestore(&comp_jpeg[hw_id]->hw_lock, flags); --=20 2.45.2 From nobody Thu Apr 2 01:10:08 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 873573845AF; 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charset="utf-8" Compared to the previous generation IC, the MT8196 uses SMMU instead of IOMMU and supports features such as dynamic voltage and frequency scaling. Therefore, add "mediatek,mt8196-jpgdec" compatible to the binding document. Signed-off-by: Kyrie Wu Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mt8195-jpegdec.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegde= c.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.ya= ml index e5448c60e3eb..28a9a9bfdbf8 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml @@ -14,7 +14,9 @@ description: =20 properties: compatible: - const: mediatek,mt8195-jpgdec + enum: + - mediatek,mt8195-jpgdec + - mediatek,mt8196-jpgdec =20 power-domains: maxItems: 1 @@ -44,7 +46,9 @@ patternProperties: =20 properties: compatible: - const: mediatek,mt8195-jpgdec-hw + enum: + - mediatek,mt8195-jpgdec-hw + - mediatek,mt8196-jpgdec-hw =20 reg: maxItems: 1 --=20 2.45.2 From nobody Thu Apr 2 01:10:08 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DEFE387562; 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charset="utf-8" Compared to the previous generation IC, the MT8196 uses SMMU instead of IOMMU and supports features such as dynamic voltage and frequency scaling. Therefore, add "mediatek,mt8196-jpgenc" compatible to the binding document. Signed-off-by: Kyrie Wu Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mt8195-jpegenc.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegen= c.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.ya= ml index 596186497b68..e2d772ea0fb0 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml @@ -14,7 +14,9 @@ description: =20 properties: compatible: - const: mediatek,mt8195-jpgenc + enum: + - mediatek,mt8195-jpgenc + - mediatek,mt8196-jpgenc =20 power-domains: maxItems: 1 @@ -44,7 +46,9 @@ patternProperties: =20 properties: compatible: - const: mediatek,mt8195-jpgenc-hw + enum: + - mediatek,mt8195-jpgenc-hw + - mediatek,mt8196-jpgenc-hw =20 reg: maxItems: 1 --=20 2.45.2 From nobody Thu Apr 2 01:10:08 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13CA6387341; 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charset="utf-8" Add jpeg dec and enc compatible for mt8196 Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- .../platform/mediatek/jpeg/mtk_jpeg_core.c | 34 +++++++++++++++++++ .../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 3 ++ .../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 3 ++ 3 files changed, 40 insertions(+) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index e67df5eb711b..287f6bd53ce6 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1916,6 +1916,19 @@ static struct mtk_jpeg_variant mtk8195_jpegenc_drvda= ta =3D { .jpeg_worker =3D mtk_jpegenc_worker, }; =20 +static struct mtk_jpeg_variant mtk8196_jpegenc_drvdata =3D { + .formats =3D mtk_jpeg_enc_formats, + .num_formats =3D MTK_JPEG_ENC_NUM_FORMATS, + .qops =3D &mtk_jpeg_enc_qops, + .m2m_ops =3D &mtk_jpeg_multicore_enc_m2m_ops, + .dev_name =3D "mtk-jpeg-enc", + .ioctl_ops =3D &mtk_jpeg_enc_ioctl_ops, + .out_q_default_fourcc =3D V4L2_PIX_FMT_YUYV, + .cap_q_default_fourcc =3D V4L2_PIX_FMT_JPEG, + .multi_core =3D true, + .jpeg_worker =3D mtk_jpegenc_worker, +}; + static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata =3D { .formats =3D mtk_jpeg_dec_formats, .num_formats =3D MTK_JPEG_DEC_NUM_FORMATS, @@ -1929,6 +1942,19 @@ static const struct mtk_jpeg_variant mtk8195_jpegdec= _drvdata =3D { .jpeg_worker =3D mtk_jpegdec_worker, }; =20 +static const struct mtk_jpeg_variant mtk8196_jpegdec_drvdata =3D { + .formats =3D mtk_jpeg_dec_formats, + .num_formats =3D MTK_JPEG_DEC_NUM_FORMATS, + .qops =3D &mtk_jpeg_dec_qops, + .m2m_ops =3D &mtk_jpeg_multicore_dec_m2m_ops, + .dev_name =3D "mtk-jpeg-dec", + .ioctl_ops =3D &mtk_jpeg_dec_ioctl_ops, + .out_q_default_fourcc =3D V4L2_PIX_FMT_JPEG, + .cap_q_default_fourcc =3D V4L2_PIX_FMT_YUV420M, + .multi_core =3D true, + .jpeg_worker =3D mtk_jpegdec_worker, +}; + static const struct of_device_id mtk_jpeg_match[] =3D { { .compatible =3D "mediatek,mt8173-jpgdec", @@ -1950,6 +1976,14 @@ static const struct of_device_id mtk_jpeg_match[] = =3D { .compatible =3D "mediatek,mt8195-jpgdec", .data =3D &mtk8195_jpegdec_drvdata, }, + { + .compatible =3D "mediatek,mt8196-jpgenc", + .data =3D &mtk8196_jpegenc_drvdata, + }, + { + .compatible =3D "mediatek,mt8196-jpgdec", + .data =3D &mtk8196_jpegdec_drvdata, + }, {}, }; =20 diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index e4d2c5d4ec73..5a485e905787 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -45,6 +45,9 @@ static const struct of_device_id mtk_jpegdec_hw_ids[] =3D= { { .compatible =3D "mediatek,mt8195-jpgdec-hw", }, + { + .compatible =3D "mediatek,mt8196-jpgdec-hw", + }, {}, }; MODULE_DEVICE_TABLE(of, mtk_jpegdec_hw_ids); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index 2adea3aca50b..1cfdfac98829 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -52,6 +52,9 @@ static const struct of_device_id mtk_jpegenc_drv_ids[] = =3D { { .compatible =3D "mediatek,mt8195-jpgenc-hw", }, + { + .compatible =3D "mediatek,mt8196-jpgenc-hw", + }, {}, }; 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Thu, 19 Mar 2026 10:22:04 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 19 Mar 2026 10:22:03 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Nicolas Dufresne , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , Subject: [PATCH v13 12/12] media: mediatek: jpeg: add jpeg smmu sid setting Date: Thu, 19 Mar 2026 10:21:51 +0800 Message-ID: <20260319022152.31313-13-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260319022152.31313-1-kyrie.wu@mediatek.com> References: <20260319022152.31313-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Add a configuration to set jpeg dec & enc smmu sid Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- .../platform/mediatek/jpeg/mtk_jpeg_core.c | 29 +++++++++++++++++++ .../platform/mediatek/jpeg/mtk_jpeg_core.h | 15 ++++++++++ .../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 23 +++++++++++++++ .../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 23 +++++++++++++++ 4 files changed, 90 insertions(+) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index 287f6bd53ce6..f854c73739b9 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1599,6 +1600,22 @@ static irqreturn_t mtk_jpeg_enc_done(struct mtk_jpeg= _dev *jpeg) return IRQ_HANDLED; } =20 +static void mtk_jpeg_set_smmu_sid(struct regmap *smmu_regmap, unsigned int= sid) +{ + if (sid =3D=3D JPG_REG_GUSER_ID_DEC_SID) + regmap_update_bits(smmu_regmap, JPEG_DEC_SMMU_SID, + JPG_REG_GUSER_ID_MASK << + JPG_REG_DEC_GUSER_ID_SHIFT, + JPG_REG_GUSER_ID_DEC_SID << + JPG_REG_DEC_GUSER_ID_SHIFT); + else + regmap_update_bits(smmu_regmap, JPEG_ENC_SMMU_SID, + JPG_REG_GUSER_ID_MASK << + JPG_REG_ENC_GUSER_ID_SHIFT, + JPG_REG_GUSER_ID_ENC_SID << + JPG_REG_ENC_GUSER_ID_SHIFT); +} + static void mtk_jpegenc_worker(struct work_struct *work) { struct mtk_jpegenc_comp_dev *comp_jpeg[MTK_JPEGENC_HW_MAX]; @@ -1660,6 +1677,11 @@ static void mtk_jpegenc_worker(struct work_struct *w= ork) jpeg_dst_buf->frame_num =3D ctx->total_frame_num; ctx->total_frame_num++; mtk_jpeg_enc_reset(comp_jpeg[hw_id]->reg_base); + + if (jpeg->variant->support_smmu && comp_jpeg[hw_id]->smmu_regmap) + mtk_jpeg_set_smmu_sid(comp_jpeg[hw_id]->smmu_regmap, + JPG_REG_GUSER_ID_ENC_SID); + mtk_jpeg_set_enc_dst(ctx, comp_jpeg[hw_id]->reg_base, &dst_buf->vb2_buf); @@ -1769,6 +1791,11 @@ static void mtk_jpegdec_worker(struct work_struct *w= ork) jpeg_dst_buf->frame_num =3D ctx->total_frame_num; ctx->total_frame_num++; mtk_jpeg_dec_reset(comp_jpeg[hw_id]->reg_base); + + if (jpeg->variant->support_smmu && comp_jpeg[hw_id]->smmu_regmap) + mtk_jpeg_set_smmu_sid(comp_jpeg[hw_id]->smmu_regmap, + JPG_REG_GUSER_ID_DEC_SID); + mtk_jpeg_dec_set_config(comp_jpeg[hw_id]->reg_base, jpeg->variant->support_34bit, &jpeg_src_buf->dec_param, @@ -1927,6 +1954,7 @@ static struct mtk_jpeg_variant mtk8196_jpegenc_drvdat= a =3D { .cap_q_default_fourcc =3D V4L2_PIX_FMT_JPEG, .multi_core =3D true, .jpeg_worker =3D mtk_jpegenc_worker, + .support_smmu =3D true, }; =20 static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata =3D { @@ -1953,6 +1981,7 @@ static const struct mtk_jpeg_variant mtk8196_jpegdec_= drvdata =3D { .cap_q_default_fourcc =3D V4L2_PIX_FMT_YUV420M, .multi_core =3D true, .jpeg_worker =3D mtk_jpegdec_worker, + .support_smmu =3D true, }; =20 static const struct of_device_id mtk_jpeg_match[] =3D { diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.h index 148fd41759b7..186cd1862028 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h @@ -11,6 +11,7 @@ =20 #include #include +#include #include #include #include @@ -34,6 +35,14 @@ =20 #define MTK_JPEG_MAX_EXIF_SIZE (64 * 1024) =20 +#define JPEG_DEC_SMMU_SID 0 +#define JPEG_ENC_SMMU_SID 0 +#define JPG_REG_GUSER_ID_MASK 0x7 +#define JPG_REG_GUSER_ID_DEC_SID 0x4 +#define JPG_REG_GUSER_ID_ENC_SID 0x5 +#define JPG_REG_DEC_GUSER_ID_SHIFT 8 +#define JPG_REG_ENC_GUSER_ID_SHIFT 4 + #define MTK_JPEG_ADDR_MASK GENMASK(1, 0) =20 /** @@ -65,6 +74,7 @@ enum mtk_jpeg_ctx_state { * @multi_core: mark jpeg hw is multi_core or not * @jpeg_worker: jpeg dec or enc worker * @support_34bit: flag to check support for 34-bit DMA address + * @support_smmu: flag to check if support smmu */ struct mtk_jpeg_variant { struct clk_bulk_data *clks; @@ -82,6 +92,7 @@ struct mtk_jpeg_variant { bool multi_core; void (*jpeg_worker)(struct work_struct *work); bool support_34bit; + bool support_smmu; }; =20 struct mtk_jpeg_src_buf { @@ -150,6 +161,7 @@ struct mtk_jpegdec_clk { * @hw_param: jpeg encode hw parameters * @hw_state: record hw state * @hw_lock: spinlock protecting the hw device resource + * @smmu_regmap: SMMU registers mapping */ struct mtk_jpegenc_comp_dev { struct device *dev; @@ -163,6 +175,7 @@ struct mtk_jpegenc_comp_dev { enum mtk_jpeg_hw_state hw_state; /* spinlock protecting the hw device resource */ spinlock_t hw_lock; + struct regmap *smmu_regmap; }; =20 /** @@ -177,6 +190,7 @@ struct mtk_jpegenc_comp_dev { * @hw_param: jpeg decode hw parameters * @hw_state: record hw state * @hw_lock: spinlock protecting hw + * @smmu_regmap: SMMU registers mapping */ struct mtk_jpegdec_comp_dev { struct device *dev; @@ -190,6 +204,7 @@ struct mtk_jpegdec_comp_dev { enum mtk_jpeg_hw_state hw_state; /* spinlock protecting the hw device resource */ spinlock_t hw_lock; + struct regmap *smmu_regmap; }; =20 /** diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index 5a485e905787..2e079a6e5d5d 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -613,6 +613,25 @@ static int mtk_jpegdec_hw_init_irq(struct mtk_jpegdec_= comp_dev *dev) return 0; } =20 +static int mtk_jpegdec_smmu_init(struct mtk_jpegdec_comp_dev *dev) +{ + struct mtk_jpeg_dev *master_dev =3D dev->master_dev; + + if (!master_dev->variant->support_smmu) + return 0; + + dev->smmu_regmap =3D + syscon_regmap_lookup_by_phandle(dev->plat_dev->dev.of_node, + "mediatek,smmu-config"); + if (IS_ERR(dev->smmu_regmap)) { + return dev_err_probe(dev->dev, PTR_ERR(dev->smmu_regmap), + "mmap smmu_base failed(%ld)\n", + PTR_ERR(dev->smmu_regmap)); + } + + return 0; +} + static int mtk_jpegdec_hw_probe(struct platform_device *pdev) { struct mtk_jpegdec_clk *jpegdec_clk; @@ -666,6 +685,10 @@ static int mtk_jpegdec_hw_probe(struct platform_device= *pdev) dev->master_dev =3D master_dev; master_dev->max_hw_count++; =20 + ret =3D mtk_jpegdec_smmu_init(dev); + if (ret) + return ret; + platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); ret =3D devm_clk_bulk_get(dev->dev, diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index 1cfdfac98829..0001d69ae7ba 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -339,6 +339,25 @@ static int mtk_jpegenc_hw_init_irq(struct mtk_jpegenc_= comp_dev *dev) return 0; } =20 +static int mtk_jpegenc_smmu_init(struct mtk_jpegenc_comp_dev *dev) +{ + struct mtk_jpeg_dev *master_dev =3D dev->master_dev; + + if (!master_dev->variant->support_smmu) + return 0; + + dev->smmu_regmap =3D + syscon_regmap_lookup_by_phandle(dev->plat_dev->dev.of_node, + "mediatek,smmu-config"); + if (IS_ERR(dev->smmu_regmap)) { + return dev_err_probe(dev->dev, PTR_ERR(dev->smmu_regmap), + "mmap smmu_base failed(%ld)\n", + PTR_ERR(dev->smmu_regmap)); + } + + return 0; +} + static int mtk_jpegenc_hw_probe(struct platform_device *pdev) { struct mtk_jpegenc_clk *jpegenc_clk; @@ -390,6 +409,10 @@ static int mtk_jpegenc_hw_probe(struct platform_device= *pdev) dev->master_dev =3D master_dev; master_dev->max_hw_count++; =20 + ret =3D mtk_jpegenc_smmu_init(dev); + if (ret) + return ret; + platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); ret =3D devm_clk_bulk_get(dev->dev, --=20 2.45.2