From nobody Mon Apr 6 18:29:08 2026 Received: from mail.imp.bg.ac.rs (mail.imp.bg.ac.rs [147.91.50.100]) by smtp.subspace.kernel.org (Postfix) with ESMTP id ED4043DA5A4; Wed, 18 Mar 2026 14:05:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=147.91.50.100 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773842749; cv=none; b=XEvvj2sw5NyftaDq0FF8jP4p3wzgImROQQQcC3pvXALdS3fuBjNxxRAssFDDhlopQov3sltr/aHUuO5SF/SJqaAFGaRiQUhHRDDDrnelXu3sAu58HkymZCrPAmEyjgX2ETS82aMKYoefzATjj5rRSbOUHQ/3VVKHUKLuSrKW0WI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773842749; c=relaxed/simple; bh=3RNXbHn2Cuzp6YtmHQ0QRNkor2RY5pfowKfuO+SgwMM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sPjW44VmHbQo74YgghWQmRVPh/YAqE8HQkbxBDez2B4Axxq+Y3U8jG1aiZZICD4wihAzMp6GYpKM6zUxR5TmMMH7EV4X5LnleWSwmnPoTj0e4pxL0W2quQusR0wbh1irtgDxjvxE1Y7Tjt84bRcwLSKZlGx2ZWnWAXno8tyLw9M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=pupin.rs; spf=pass smtp.mailfrom=pupin.rs; dkim=pass (1024-bit key) header.d=pupin.rs header.i=@pupin.rs header.b=Y+KN0dyG; arc=none smtp.client-ip=147.91.50.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=pupin.rs Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pupin.rs Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=pupin.rs header.i=@pupin.rs header.b="Y+KN0dyG" Received: from localhost (localhost [127.0.0.1]) by mail.imp.bg.ac.rs (Postfix) with ESMTP id C3C80140C2731; Wed, 18 Mar 2026 14:57:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pupin.rs; h= content-transfer-encoding:mime-version:references:in-reply-to :x-mailer:message-id:date:date:subject:subject:from:from :received:received; s=dkim20260301; t=1773842267; bh=3RNXbHn2Cuz p6YtmHQ0QRNkor2RY5pfowKfuO+SgwMM=; b=Y+KN0dyGUDANQU+PZeWkVdIF8Gn ZwdZ0/OHks/r9MBK0WlIU9eL0U4Aa68MfMAt+JjMqBXAhFeAhC/rb7h7jwxj3gEy wL89eoqIsxq4gHJFDtKK8gLwkoomeG+tKwmrN3uhDzpt13YwUwtZ2H0XLsNdBfl/ R2o4F4ZCEOqeskgo= X-Virus-Scanned: amavis at imp.bg.ac.rs Received: from mail.imp.bg.ac.rs ([127.0.0.1]) by localhost (mail.imp.bg.ac.rs [127.0.0.1]) (amavis, port 10024) with LMTP id suj9W2IABeR1; Wed, 18 Mar 2026 14:57:47 +0100 (CET) X-Comment: SPF check N/A for local connections - client-ip=147.91.52.78; helo=phyvm-virtualbox; envelope-from=david.marinovic@pupin.rs; receiver=jic23@kernel.org DKIM-Filter: OpenDKIM Filter v2.11.0 mail.imp.bg.ac.rs 9EAFA140C272A Received: from phyvm-VirtualBox (unknown [147.91.52.78]) by mail.imp.bg.ac.rs (Postfix) with ESMTPS id 9EAFA140C272A; Wed, 18 Mar 2026 14:57:47 +0100 (CET) From: =?UTF-8?q?David=20Marinovi=C4=87?= To: jic23@kernel.org Cc: andriy.shevchenko@intel.com, dlechner@baylibre.com, nuno.sa@analog.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, michael.hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Marinovic Subject: [PATCH 1/3] iio: dac: ltc2632: drop enum and use individual chip_info objects Date: Wed, 18 Mar 2026 14:57:30 +0100 Message-ID: <20260318135736.91564-2-david.marinovic@pupin.rs> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260318135736.91564-1-david.marinovic@pupin.rs> References: <5d4fb8998d9634c3e5a8ed17b80dae07@pupin.rs> <20260318135736.91564-1-david.marinovic@pupin.rs> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: David Marinovic Remove the ltc2632_chip_info_tbl[] array and related ltc2632_supported_device_ids enum used for looking up chip-specific information. Instead, use separate static const struct ltc2632_chip_info objects for each supported chip variant. Signed-off-by: David Marinovic Reviewed-by: Andy Shevchenko Suggested-by: Andy Shevchenko --- drivers/iio/dac/ltc2632.c | 327 +++++++++++++++++--------------------- 1 file changed, 142 insertions(+), 185 deletions(-) diff --git a/drivers/iio/dac/ltc2632.c b/drivers/iio/dac/ltc2632.c index 105f939f7e54..ca0b88285ce5 100644 --- a/drivers/iio/dac/ltc2632.c +++ b/drivers/iio/dac/ltc2632.c @@ -48,27 +48,6 @@ struct ltc2632_state { int vref_mv; }; =20 -enum ltc2632_supported_device_ids { - ID_LTC2632L12, - ID_LTC2632L10, - ID_LTC2632L8, - ID_LTC2632H12, - ID_LTC2632H10, - ID_LTC2632H8, - ID_LTC2634L12, - ID_LTC2634L10, - ID_LTC2634L8, - ID_LTC2634H12, - ID_LTC2634H10, - ID_LTC2634H8, - ID_LTC2636L12, - ID_LTC2636L10, - ID_LTC2636L8, - ID_LTC2636H12, - ID_LTC2636H10, - ID_LTC2636H8, -}; - static int ltc2632_spi_write(struct spi_device *spi, u8 cmd, u8 addr, u16 val, u8 shift) { @@ -210,97 +189,112 @@ static DECLARE_LTC2632_CHANNELS(ltc2632x12, 12); static DECLARE_LTC2632_CHANNELS(ltc2632x10, 10); static DECLARE_LTC2632_CHANNELS(ltc2632x8, 8); =20 -static const struct ltc2632_chip_info ltc2632_chip_info_tbl[] =3D { - [ID_LTC2632L12] =3D { - .channels =3D ltc2632x12_channels, - .num_channels =3D 2, - .vref_mv =3D 2500, - }, - [ID_LTC2632L10] =3D { - .channels =3D ltc2632x10_channels, - .num_channels =3D 2, - .vref_mv =3D 2500, - }, - [ID_LTC2632L8] =3D { - .channels =3D ltc2632x8_channels, - .num_channels =3D 2, - .vref_mv =3D 2500, - }, - [ID_LTC2632H12] =3D { - .channels =3D ltc2632x12_channels, - .num_channels =3D 2, - .vref_mv =3D 4096, - }, - [ID_LTC2632H10] =3D { - .channels =3D ltc2632x10_channels, - .num_channels =3D 2, - .vref_mv =3D 4096, - }, - [ID_LTC2632H8] =3D { - .channels =3D ltc2632x8_channels, - .num_channels =3D 2, - .vref_mv =3D 4096, - }, - [ID_LTC2634L12] =3D { - .channels =3D ltc2632x12_channels, - .num_channels =3D 4, - .vref_mv =3D 2500, - }, - [ID_LTC2634L10] =3D { - .channels =3D ltc2632x10_channels, - .num_channels =3D 4, - .vref_mv =3D 2500, - }, - [ID_LTC2634L8] =3D { - .channels =3D ltc2632x8_channels, - .num_channels =3D 4, - .vref_mv =3D 2500, - }, - [ID_LTC2634H12] =3D { - .channels =3D ltc2632x12_channels, - .num_channels =3D 4, - .vref_mv =3D 4096, - }, - [ID_LTC2634H10] =3D { - .channels =3D ltc2632x10_channels, - .num_channels =3D 4, - .vref_mv =3D 4096, - }, - [ID_LTC2634H8] =3D { - .channels =3D ltc2632x8_channels, - .num_channels =3D 4, - .vref_mv =3D 4096, - }, - [ID_LTC2636L12] =3D { - .channels =3D ltc2632x12_channels, - .num_channels =3D 8, - .vref_mv =3D 2500, - }, - [ID_LTC2636L10] =3D { - .channels =3D ltc2632x10_channels, - .num_channels =3D 8, - .vref_mv =3D 2500, - }, - [ID_LTC2636L8] =3D { - .channels =3D ltc2632x8_channels, - .num_channels =3D 8, - .vref_mv =3D 2500, - }, - [ID_LTC2636H12] =3D { - .channels =3D ltc2632x12_channels, - .num_channels =3D 8, - .vref_mv =3D 4096, - }, - [ID_LTC2636H10] =3D { - .channels =3D ltc2632x10_channels, - .num_channels =3D 8, - .vref_mv =3D 4096, - }, - [ID_LTC2636H8] =3D { - .channels =3D ltc2632x8_channels, - .num_channels =3D 8, - .vref_mv =3D 4096, - }, +static const struct ltc2632_chip_info ltc2632l12_chip_info =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 2, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2632l10_chip_info =3D { + .channels =3D ltc2632x10_channels, + .num_channels =3D 2, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2632l8_chip_info =3D { + .channels =3D ltc2632x8_channels, + .num_channels =3D 2, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2632h12_chip_info =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 2, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2632h10_chip_info =3D { + .channels =3D ltc2632x10_channels, + .num_channels =3D 2, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2632h8_chip_info =3D { + .channels =3D ltc2632x8_channels, + .num_channels =3D 2, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2634l12_chip_info =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 4, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2634l10_chip_info =3D { + .channels =3D ltc2632x10_channels, + .num_channels =3D 4, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2634l8_chip_info =3D { + .channels =3D ltc2632x8_channels, + .num_channels =3D 4, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2634h12_chip_info =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 4, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2634h10_chip_info =3D { + .channels =3D ltc2632x10_channels, + .num_channels =3D 4, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2634h8_chip_info =3D { + .channels =3D ltc2632x8_channels, + .num_channels =3D 4, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2636l12_chip_info =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 8, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2636l10_chip_info =3D { + .channels =3D ltc2632x10_channels, + .num_channels =3D 8, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2636l8_chip_info =3D { + .channels =3D ltc2632x8_channels, + .num_channels =3D 8, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2636h12_chip_info =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 8, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2636h10_chip_info =3D { + .channels =3D ltc2632x10_channels, + .num_channels =3D 8, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2636h8_chip_info =3D { + .channels =3D ltc2632x8_channels, + .num_channels =3D 8, + .vref_mv =3D 4096, }; =20 static int ltc2632_probe(struct spi_device *spi) @@ -354,84 +348,47 @@ static int ltc2632_probe(struct spi_device *spi) } =20 static const struct spi_device_id ltc2632_id[] =3D { - { "ltc2632-l12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L12] }, - { "ltc2632-l10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L10] }, - { "ltc2632-l8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L8] }, - { "ltc2632-h12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H12] }, - { "ltc2632-h10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H10] }, - { "ltc2632-h8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H8] }, - { "ltc2634-l12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634L12] }, - { "ltc2634-l10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634L10] }, - { "ltc2634-l8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634L8] }, - { "ltc2634-h12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634H12] }, - { "ltc2634-h10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634H10] }, - { "ltc2634-h8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634H8] }, - { "ltc2636-l12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L12] }, - { "ltc2636-l10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L10] }, - { "ltc2636-l8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L8] }, - { "ltc2636-h12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H12] }, - { "ltc2636-h10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H10] }, - { "ltc2636-h8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H8] }, + { "ltc2632-l12", (kernel_ulong_t)<c2632l12_chip_info }, + { "ltc2632-l10", (kernel_ulong_t)<c2632l10_chip_info }, + { "ltc2632-l8", (kernel_ulong_t)<c2632l8_chip_info }, + { "ltc2632-h12", (kernel_ulong_t)<c2632h12_chip_info }, + { "ltc2632-h10", (kernel_ulong_t)<c2632h10_chip_info }, + { "ltc2632-h8", (kernel_ulong_t)<c2632h8_chip_info }, + { "ltc2634-l12", (kernel_ulong_t)<c2634l12_chip_info }, + { "ltc2634-l10", (kernel_ulong_t)<c2634l10_chip_info }, + { "ltc2634-l8", (kernel_ulong_t)<c2634l8_chip_info }, + { "ltc2634-h12", (kernel_ulong_t)<c2634h12_chip_info }, + { "ltc2634-h10", (kernel_ulong_t)<c2634h10_chip_info }, + { "ltc2634-h8", (kernel_ulong_t)<c2634h8_chip_info }, + { "ltc2636-l12", (kernel_ulong_t)<c2636l12_chip_info }, + { "ltc2636-l10", (kernel_ulong_t)<c2636l10_chip_info }, + { "ltc2636-l8", (kernel_ulong_t)<c2636l8_chip_info }, + { "ltc2636-h12", (kernel_ulong_t)<c2636h12_chip_info }, + { "ltc2636-h10", (kernel_ulong_t)<c2636h10_chip_info }, + { "ltc2636-h8", (kernel_ulong_t)<c2636h8_chip_info }, { } }; MODULE_DEVICE_TABLE(spi, ltc2632_id); =20 static const struct of_device_id ltc2632_of_match[] =3D { - { - .compatible =3D "lltc,ltc2632-l12", - .data =3D <c2632_chip_info_tbl[ID_LTC2632L12] - }, { - .compatible =3D "lltc,ltc2632-l10", - .data =3D <c2632_chip_info_tbl[ID_LTC2632L10] - }, { - .compatible =3D "lltc,ltc2632-l8", - .data =3D <c2632_chip_info_tbl[ID_LTC2632L8] - }, { - .compatible =3D "lltc,ltc2632-h12", - .data =3D <c2632_chip_info_tbl[ID_LTC2632H12] - }, { - .compatible =3D "lltc,ltc2632-h10", - .data =3D <c2632_chip_info_tbl[ID_LTC2632H10] - }, { - .compatible =3D "lltc,ltc2632-h8", - .data =3D <c2632_chip_info_tbl[ID_LTC2632H8] - }, { - .compatible =3D "lltc,ltc2634-l12", - .data =3D <c2632_chip_info_tbl[ID_LTC2634L12] - }, { - .compatible =3D "lltc,ltc2634-l10", - .data =3D <c2632_chip_info_tbl[ID_LTC2634L10] - }, { - .compatible =3D "lltc,ltc2634-l8", - .data =3D <c2632_chip_info_tbl[ID_LTC2634L8] - }, { - .compatible =3D "lltc,ltc2634-h12", - .data =3D <c2632_chip_info_tbl[ID_LTC2634H12] - }, { - .compatible =3D "lltc,ltc2634-h10", - .data =3D <c2632_chip_info_tbl[ID_LTC2634H10] - }, { - .compatible =3D "lltc,ltc2634-h8", - .data =3D <c2632_chip_info_tbl[ID_LTC2634H8] - }, { - .compatible =3D "lltc,ltc2636-l12", - .data =3D <c2632_chip_info_tbl[ID_LTC2636L12] - }, { - .compatible =3D "lltc,ltc2636-l10", - .data =3D <c2632_chip_info_tbl[ID_LTC2636L10] - }, { - .compatible =3D "lltc,ltc2636-l8", - .data =3D <c2632_chip_info_tbl[ID_LTC2636L8] - }, { - .compatible =3D "lltc,ltc2636-h12", - .data =3D <c2632_chip_info_tbl[ID_LTC2636H12] - }, { - .compatible =3D "lltc,ltc2636-h10", - .data =3D <c2632_chip_info_tbl[ID_LTC2636H10] - }, { - .compatible =3D "lltc,ltc2636-h8", - .data =3D <c2632_chip_info_tbl[ID_LTC2636H8] - }, + { .compatible =3D "lltc,ltc2632-l12", .data =3D <c2632l12_chip_info }, + { .compatible =3D "lltc,ltc2632-l10", .data =3D <c2632l10_chip_info }, + { .compatible =3D "lltc,ltc2632-l8", .data =3D <c2632l8_chip_info }, + { .compatible =3D "lltc,ltc2632-h12", .data =3D <c2632h12_chip_info }, + { .compatible =3D "lltc,ltc2632-h10", .data =3D <c2632h10_chip_info }, + { .compatible =3D "lltc,ltc2632-h8", .data =3D <c2632h8_chip_info }, + { .compatible =3D "lltc,ltc2634-l12", .data =3D <c2634l12_chip_info }, + { .compatible =3D "lltc,ltc2634-l10", .data =3D <c2634l10_chip_info }, + { .compatible =3D "lltc,ltc2634-l8", .data =3D <c2634l8_chip_info }, + { .compatible =3D "lltc,ltc2634-h12", .data =3D <c2634h12_chip_info }, + { .compatible =3D "lltc,ltc2634-h10", .data =3D <c2634h10_chip_info }, + { .compatible =3D "lltc,ltc2634-h8", .data =3D <c2634h8_chip_info }, + { .compatible =3D "lltc,ltc2636-l12", .data =3D <c2636l12_chip_info }, + { .compatible =3D "lltc,ltc2636-l10", .data =3D <c2636l10_chip_info }, + { .compatible =3D "lltc,ltc2636-l8", .data =3D <c2636l8_chip_info }, + { .compatible =3D "lltc,ltc2636-h12", .data =3D <c2636h12_chip_info }, + { .compatible =3D "lltc,ltc2636-h10", .data =3D <c2636h10_chip_info }, + { .compatible =3D "lltc,ltc2636-h8", .data =3D <c2636h8_chip_info }, { } }; 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charset="utf-8" From: David Marinovic The LTC2654 is a quad-channel, 16-/12-bit DAC with internal reference voltage and SPI interface, sharing the same 24-bit SPI protocol as the LTC2632/2634/2636 family. Add compatible strings for the following variants: - lltc,ltc2654-l16: 16-bit, 2.5V internal reference - lltc,ltc2654-l12: 12-bit, 2.5V internal reference - lltc,ltc2654-h16: 16-bit, 4.096V internal reference - lltc,ltc2654-h12: 12-bit, 4.096V internal reference Signed-off-by: David Marinovic --- .../devicetree/bindings/iio/dac/lltc,ltc2632.yaml | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml b/= Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml index 733edc7d6d17..b22df24dee07 100644 --- a/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml +++ b/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml @@ -4,14 +4,16 @@ $id: http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Linear Technology LTC263x 12-/10-/8-Bit Rail-to-Rail DAC +title: Linear Technology LTC263x and LTC2654 Rail-to-Rail DAC =20 maintainers: - Michael Hennerich =20 description: | - Bindings for the Linear Technology LTC2632/2634/2636 DAC - Datasheet can be found here: https://www.analog.com/media/en/technical-d= ocumentation/data-sheets/LTC263[246].pdf + Bindings for the Linear Technology LTC2632/2634/2636/2654 DAC + Datasheet can be found here: + https://www.analog.com/media/en/technical-documentation/data-sheets/LT= C263[246].pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/26= 54f.pdf =20 properties: compatible: @@ -34,6 +36,10 @@ properties: - lltc,ltc2636-h12 - lltc,ltc2636-h10 - lltc,ltc2636-h8 + - lltc,ltc2654-l16 + - lltc,ltc2654-l12 + - lltc,ltc2654-h16 + - lltc,ltc2654-h12 =20 reg: maxItems: 1 --=20 2.50.1 From nobody Mon Apr 6 18:29:08 2026 Received: from mail.imp.bg.ac.rs (mail.imp.bg.ac.rs [147.91.50.100]) by smtp.subspace.kernel.org (Postfix) with ESMTP id ED2AF3D9DDB; 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Wed, 18 Mar 2026 14:57:48 +0100 (CET) X-Comment: SPF check N/A for local connections - client-ip=147.91.52.78; helo=phyvm-virtualbox; envelope-from=david.marinovic@pupin.rs; receiver=jic23@kernel.org DKIM-Filter: OpenDKIM Filter v2.11.0 mail.imp.bg.ac.rs E3006140C272A Received: from phyvm-VirtualBox (unknown [147.91.52.78]) by mail.imp.bg.ac.rs (Postfix) with ESMTPS id E3006140C272A; Wed, 18 Mar 2026 14:57:47 +0100 (CET) From: =?UTF-8?q?David=20Marinovi=C4=87?= To: jic23@kernel.org Cc: andriy.shevchenko@intel.com, dlechner@baylibre.com, nuno.sa@analog.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, michael.hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Marinovic Subject: [PATCH 3/3] iio: dac: ltc2632: add support for LTC2654 DAC family Date: Wed, 18 Mar 2026 14:57:32 +0100 Message-ID: <20260318135736.91564-4-david.marinovic@pupin.rs> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260318135736.91564-1-david.marinovic@pupin.rs> References: <5d4fb8998d9634c3e5a8ed17b80dae07@pupin.rs> <20260318135736.91564-1-david.marinovic@pupin.rs> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: David Marinovic Add support for the Linear Technology LTC2654 quad DAC family. The LTC2654 is a 4-channel, 16-/12-bit DAC with SPI interface, sharing the same 24-bit SPI protocol as the existing LTC2632/ LTC2634/LTC2636 devices supported by this driver. The LTC2654L-16 variant has been tested on a Phytec phyCORE-STM32MP1 board with the DAC connected via SPI1. The driver probes successfully and all 4 channels are accessible via the IIO sysfs interface. Add support for the following variants: - LTC2654L-16: 16-bit, 2.5V internal reference - LTC2654L-12: 12-bit, 2.5V internal reference - LTC2654H-16: 16-bit, 4.096V internal reference - LTC2654H-12: 12-bit, 4.096V internal reference Signed-off-by: David Marinovic --- drivers/iio/dac/ltc2632.c | 40 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) diff --git a/drivers/iio/dac/ltc2632.c b/drivers/iio/dac/ltc2632.c index ca0b88285ce5..c84a7e314f08 100644 --- a/drivers/iio/dac/ltc2632.c +++ b/drivers/iio/dac/ltc2632.c @@ -58,8 +58,9 @@ static int ltc2632_spi_write(struct spi_device *spi, * The input shift register is 24 bits wide. * The next four are the command bits, C3 to C0, * followed by the 4-bit DAC address, A3 to A0, and then the - * 12-, 10-, 8-bit data-word. The data-word comprises the 12-, - * 10-, 8-bit input code followed by 4, 6, or 8 don't care bits. + * 16-, 12-, 10-, 8-bit data-word. The data-word comprises the + * 16-, 12-, 10-, 8-bit input code followed by 0, 4, 6, or 8 + * don't care bits. */ data =3D (cmd << 20) | (addr << 16) | (val << shift); put_unaligned_be24(data, &msg[0]); @@ -185,6 +186,7 @@ static const struct iio_chan_spec_ext_info ltc2632_ext_= info[] =3D { LTC2632_CHANNEL(7, _bits), \ } =20 +static DECLARE_LTC2632_CHANNELS(ltc2632x16, 16); static DECLARE_LTC2632_CHANNELS(ltc2632x12, 12); static DECLARE_LTC2632_CHANNELS(ltc2632x10, 10); static DECLARE_LTC2632_CHANNELS(ltc2632x8, 8); @@ -297,6 +299,30 @@ static const struct ltc2632_chip_info ltc2636h8_chip_i= nfo =3D { .vref_mv =3D 4096, }; =20 +static const struct ltc2632_chip_info ltc2654l16_chip_info =3D { + .channels =3D ltc2632x16_channels, + .num_channels =3D 4, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2654l12_chip_info =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 4, + .vref_mv =3D 2500, +}; + +static const struct ltc2632_chip_info ltc2654h16_chip_info =3D { + .channels =3D ltc2632x16_channels, + .num_channels =3D 4, + .vref_mv =3D 4096, +}; + +static const struct ltc2632_chip_info ltc2654h12_chip_info =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 4, + .vref_mv =3D 4096, +}; + static int ltc2632_probe(struct spi_device *spi) { struct ltc2632_state *st; @@ -366,6 +392,10 @@ static const struct spi_device_id ltc2632_id[] =3D { { "ltc2636-h12", (kernel_ulong_t)<c2636h12_chip_info }, { "ltc2636-h10", (kernel_ulong_t)<c2636h10_chip_info }, { "ltc2636-h8", (kernel_ulong_t)<c2636h8_chip_info }, + { "ltc2654-l16", (kernel_ulong_t)<c2654l16_chip_info }, + { "ltc2654-l12", (kernel_ulong_t)<c2654l12_chip_info }, + { "ltc2654-h16", (kernel_ulong_t)<c2654h16_chip_info }, + { "ltc2654-h12", (kernel_ulong_t)<c2654h12_chip_info }, { } }; MODULE_DEVICE_TABLE(spi, ltc2632_id); @@ -389,6 +419,10 @@ static const struct of_device_id ltc2632_of_match[] = =3D { { .compatible =3D "lltc,ltc2636-h12", .data =3D <c2636h12_chip_info }, { .compatible =3D "lltc,ltc2636-h10", .data =3D <c2636h10_chip_info }, { .compatible =3D "lltc,ltc2636-h8", .data =3D <c2636h8_chip_info }, + { .compatible =3D "lltc,ltc2654-l16", .data =3D <c2654l16_chip_info }, + { .compatible =3D "lltc,ltc2654-l12", .data =3D <c2654l12_chip_info }, + { .compatible =3D "lltc,ltc2654-h16", .data =3D <c2654h16_chip_info }, + { .compatible =3D "lltc,ltc2654-h12", .data =3D <c2654h12_chip_info }, { } }; MODULE_DEVICE_TABLE(of, ltc2632_of_match); @@ -404,5 +438,5 @@ static struct spi_driver ltc2632_driver =3D { module_spi_driver(ltc2632_driver); =20 MODULE_AUTHOR("Maxime Roussin-Belanger "= ); -MODULE_DESCRIPTION("LTC2632 DAC SPI driver"); +MODULE_DESCRIPTION("LTC2632/LTC2654 DAC SPI driver"); MODULE_LICENSE("GPL v2"); --=20 2.50.1