From nobody Mon Apr 6 19:59:39 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 236AC395D85 for ; Wed, 18 Mar 2026 10:51:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773831097; cv=none; b=oXiu/LEUcvE4ZenyaRj4hv9T3CpwSyqgWOirYwG0U0Vh76s7ch/sgwottt4RxrNml2BXHQMsvZX/+cDigdQxE43lvevHVg4NmWfnev3ZT9fZaAtAJJwnP30Qi4F1EvmFBFnVhvO2p+rtINZXxbhaUYvIY/5V8FfrpLw/tcwmEMM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773831097; c=relaxed/simple; bh=UE8DLg0OmVNUS8QhDZnhmGITW1Sio+cYfmRHHPQL4sM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tmJSkKwXGwcvYIU1rbo96/J/YPga2y4pL8eA8m08VjGjND0JsDc4zchgcIriM2Fuytj+bFe3hh2Ehik544+gbFDhnvZhz1rMccD/vD3u/vexBV3W0m1hhKuue0bBkxeRpagDjflQP+wtYdqRae25hvVao2QnvBr+3uQXtEaHID8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1w2oUn-0001WP-Ey; Wed, 18 Mar 2026 11:51:25 +0100 Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac] helo=dude04) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1w2oUn-000tSY-0X; Wed, 18 Mar 2026 11:51:25 +0100 Received: from ore by dude04 with local (Exim 4.98.2) (envelope-from ) id 1w2oUn-00000003RJI-0IbV; Wed, 18 Mar 2026 11:51:25 +0100 From: Oleksij Rempel To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue Cc: David Jander , stable@vger.kernel.org, Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v1 7/7] ARM: dts: stm32: stm32mp15x-mecio1-io: Move expander gpio-line-names to board files Date: Wed, 18 Mar 2026 11:51:23 +0100 Message-ID: <20260318105123.819807-8-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260318105123.819807-1-o.rempel@pengutronix.de> References: <20260318105123.819807-1-o.rempel@pengutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: David Jander Move the gpio-line-names properties for the I2C GPIO expanders (gpio0 and gpio1) out of the common mecio1-io.dtsi file and into the specific board dts files. The layout originally defined in the common include file belonged to the mecio1r1 (Revision 1) hardware. This layout is moved 1:1 into the stm32mp153c-mecio1r1.dts file. The mecio1r0 (Revision 0) hardware utilizes a completely different pinout for these expanders. A new, accurate mapping reflecting the Revision 0 schematics is added to stm32mp151c-mecio1r0.dts. Fixes: 8267753c891c ("ARM: dts: stm32: Add MECIO1 and MECT1S board variants= ") Cc: stable@vger.kernel.org Signed-off-by: David Jander Co-developed-by: Oleksij Rempel Signed-off-by: Oleksij Rempel --- arch/arm/boot/dts/st/stm32mp151c-mecio1r0.dts | 14 ++++++++++++++ arch/arm/boot/dts/st/stm32mp153c-mecio1r1.dts | 14 ++++++++++++++ arch/arm/boot/dts/st/stm32mp15x-mecio1-io.dtsi | 8 -------- 3 files changed, 28 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp151c-mecio1r0.dts b/arch/arm/boot/= dts/st/stm32mp151c-mecio1r0.dts index 06ab77465816..862782d20d10 100644 --- a/arch/arm/boot/dts/st/stm32mp151c-mecio1r0.dts +++ b/arch/arm/boot/dts/st/stm32mp151c-mecio1r0.dts @@ -97,6 +97,20 @@ ðernet0 { st,eth-clk-sel; }; =20 +&gpio0 { + gpio-line-names =3D "HSIN0_BIAS", "HSIN1_BIAS", "HSIN2_BIAS", "HSIN3_BIAS= ", + "HSIN4_BIAS", "", "STP_VREF0_LVL", "HSIN_VREF0_LVL", + "STP0_FB_BIAS", "STP1_FB_BIAS", "STP2_FB_BIAS", "STP3_FB_BIAS", + "", "", "", ""; +}; + +&gpio1 { + gpio-line-names =3D "HSIN5_BIAS", "HSIN6_BIAS", "HSIN7_BIAS", "HSIN8_BIAS= ", + "HSIN9_BIAS", "", "STP_VREF1_LVL", "HSIN_VREF1_LVL", + "STP4_FB_BIAS", "STP5_FB_BIAS", "STP6_FB_BIAS", "", + "", "", "LSIN8_BIAS", "LSIN9_BIAS"; +}; + &gpiod { gpio-line-names =3D "", "", "", "", "", "", "", "", diff --git a/arch/arm/boot/dts/st/stm32mp153c-mecio1r1.dts b/arch/arm/boot/= dts/st/stm32mp153c-mecio1r1.dts index 2b3989303cd1..739cc18c3d3a 100644 --- a/arch/arm/boot/dts/st/stm32mp153c-mecio1r1.dts +++ b/arch/arm/boot/dts/st/stm32mp153c-mecio1r1.dts @@ -90,6 +90,20 @@ &clk_hse { clock-frequency =3D <24000000>; }; =20 +&gpio0 { + gpio-line-names =3D "HSIN0_BIAS", "HSIN1_BIAS", "HSIN2_BIAS", "HSIN3_BIAS= ", + "", "", "HSIN_VREF0_LVL", "HSIN_VREF1_LVL", + "HSIN4_BIAS", "HSIN5_BIAS", "HSIN6_BIAS", "HSIN7_BIAS", + "", "", "", ""; +}; + +&gpio1 { + gpio-line-names =3D "HSIN8_BIAS", "HSIN9_BIAS", "HSIN10_BIAS", "HSIN11_BI= AS", + "", "", "HSIN_VREF2_LVL", "HSIN_VREF3_LVL", + "HSIN12_BIAS", "HSIN13_BIAS", "HSIN14_BIAS", "HSIN15_BIAS", + "", "", "LSIN8_BIAS", "LSIN9_BIAS"; +}; + &gpioa { gpio-line-names =3D "", "", "", "", "", "", "", "", diff --git a/arch/arm/boot/dts/st/stm32mp15x-mecio1-io.dtsi b/arch/arm/boot= /dts/st/stm32mp15x-mecio1-io.dtsi index 1808289f8193..1a4f5a523eb3 100644 --- a/arch/arm/boot/dts/st/stm32mp15x-mecio1-io.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15x-mecio1-io.dtsi @@ -184,10 +184,6 @@ gpio0: gpio@20 { reg =3D <0x20>; gpio-controller; #gpio-cells =3D <2>; - gpio-line-names =3D "HSIN0_BIAS", "HSIN1_BIAS", "HSIN2_BIAS", "HSIN3_BIA= S", - "", "", "HSIN_VREF0_LVL", "HSIN_VREF1_LVL", - "HSIN4_BIAS", "HSIN5_BIAS", "HSIN6_BIAS", "HSIN7_BIAS", - "", "", "", ""; }; =20 gpio1: gpio@21 { @@ -195,10 +191,6 @@ gpio1: gpio@21 { reg =3D <0x21>; gpio-controller; #gpio-cells =3D <2>; - gpio-line-names =3D "HSIN8_BIAS", "HSIN9_BIAS", "HSIN10_BIAS", "HSIN11_B= IAS", - "", "", "HSIN_VREF2_LVL", "HSIN_VREF3_LVL", - "HSIN12_BIAS", "HSIN13_BIAS", "HSIN14_BIAS", "HSIN15_BIAS", - "", "", "LSIN8_BIAS", "LSIN9_BIAS"; }; }; =20 --=20 2.47.3