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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82a6bbe801csm1575768b3a.46.2026.03.18.00.14.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2026 00:14:40 -0700 (PDT) From: Kathiravan Thirumoorthy Date: Wed, 18 Mar 2026 12:44:30 +0530 Subject: [PATCH v2 1/2] dt-bindings: pinctrl: qcom: add IPQ5210 pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260318-ipq5210_tlmm-v2-1-182d47b3d540@oss.qualcomm.com> References: <20260318-ipq5210_tlmm-v2-0-182d47b3d540@oss.qualcomm.com> In-Reply-To: <20260318-ipq5210_tlmm-v2-0-182d47b3d540@oss.qualcomm.com> To: Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kathiravan Thirumoorthy , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773818072; l=5620; i=kathiravan.thirumoorthy@oss.qualcomm.com; s=20230906; h=from:subject:message-id; bh=VscofhmW8W5TCQyG/6Nf33e/Z1Qdxj7p1k3JP0RwNfk=; b=tnx5seOcqk3LcgGFsWtrt7qOpsD47WGrdatpAZgHM7V0LA07/56TKUhjFwGrlE3NgqP21siCJ D06h+VoUJ9RDTOqVYU92qbLLNZpKd5CMXN7zFBA3rEG3OUcCsPGEFCu X-Developer-Key: i=kathiravan.thirumoorthy@oss.qualcomm.com; a=ed25519; pk=xWsR7pL6ch+vdZ9MoFGEaP61JUaRf0XaZYWztbQsIiM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzE4MDA1OSBTYWx0ZWRfX+f+g/AQ5vuGi H9YqJNBAv1UqRLeb4XAWCWBAORz1fQre85WvoDNRaaZ+YMf+KEtDSHUOs9vqpIYC/WxmSG3vm+2 U7IlM2Ms6Yd5vjXoSgf9UV5yLuNfNpCvhi6iCphpUtX+zz3q0ZxG8Edx1eQZMczEnfxbpvGLIqv GnoMiluUpaIEZ2grGQ74XaJFMwijw2eorkm4+trjOj8TGIr0fj+iYCD7jKv7EKTh0CFWOtyzyd/ wrdP4h+0k7CKkcEnLvbqRaQLyQkEOdz4yEyzgKVp5Drs5TWLbH1hoNcK/j/6Qf9Q9X2x0Ba29UX Dtwed8Bo3KwqXjiv1npGyYiHN2IXMfKERhaH39Kfsznli5blEl+wlGa8b1WcCykQlmOgiHx0HmP 6zc8tWKNf5T/E97paphuNL5hWxczUuekcob4DuEn80URHwcgbiUKhgBfCpMuFPrL1VBEjkA7z6O vqLsAb3oqqb7Q41YGCA== X-Authority-Analysis: v=2.4 cv=Cd4FJbrl c=1 sm=1 tr=0 ts=69ba50e2 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=hD0fcazERHGK-ooIS8AA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-ORIG-GUID: 77HTcF3oa35oWGkhX6ASW2CEG923uvAa X-Proofpoint-GUID: 77HTcF3oa35oWGkhX6ASW2CEG923uvAa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-17_05,2026-03-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 adultscore=0 bulkscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603180059 Add device tree bindings for IPQ5210 TLMM block. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Kathiravan Thirumoorthy --- .../bindings/pinctrl/qcom,ipq5210-tlmm.yaml | 137 +++++++++++++++++= ++++ 1 file changed, 137 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.ya= ml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.yaml new file mode 100644 index 0000000000000000000000000000000000000000..a6e2c41049aac26b2a2ffb579dc= 217ffa4113e31 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5210-tlmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ5210 TLMM pin controller + +maintainers: + - Bjorn Andersson + - Kathiravan Thirumoorthy + +description: + Top Level Mode Multiplexer pin controller in Qualcomm IPQ5210 SoC. + +allOf: + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +properties: + compatible: + const: qcom,ipq5210-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-reserved-ranges: + minItems: 1 + maxItems: 27 + + gpio-line-names: + maxItems: 54 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-ipq5210-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-ipq5210-tlmm-state" + additionalProperties: false + +$defs: + qcom-ipq5210-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configura= tion. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-4][0-9]|5[0-3])$" + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specif= ied + pins. + + enum: [ atest_char_start, atest_char_status0, atest_char_status1, + atest_char_status2, atest_char_status3, atest_tic_en, audi= o_pri0, + audio_pri1, audio_pri2, audio_pri3, audio_pri_d0, audio_pr= i_d1, + audio_pri_fsync, audio_pri_pclk, audio_sec0, audio_sec1, + audio_sec2, audio_sec3, audio_sec_d0, audio_sec_d1, + audio_sec_fsync, audio_sec_pclk, core_voltage_0, cri_trng0, + cri_trng1, cri_trng2, cri_trng3, dbg_out_clk, dg_out, + gcc_plltest_bypassnl, gcc_plltest_resetn, gcc_tlmm, gpio, = led0, + led1, led2, mdc_mst, mdc_slv0, mdc_slv1, mdc_slv2, mdio_ms= t, + mdio_slv0, mdio_slv1, mdio_slv2, mux_tod_out, pcie0_clk_re= q_n, + pcie0_wake, pcie1_clk_req_n, pcie1_wake, pll_test, + pon_active_led, pon_mux_sel, pon_rx, pon_rx_los, pon_tx, + pon_tx_burst, pon_tx_dis, pon_tx_fault, pon_tx_sd, gpn_rx_= los, + gpn_tx_burst, gpn_tx_dis, gpn_tx_fault, gpn_tx_sd, pps, + pwm, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, + qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_ou= t_a0, + qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, + qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_tracectl_a, + qdss_tracedata_a, qrng_rosc0, qrng_rosc1, qrng_rosc2, + qspi_data, qspi_clk, qspi_cs_n, qup_se0_l0, qup_se0_l1, + qup_se0_l2, qup_se0_l3, qup_se0_l4, qup_se0_l5, qup_se1_l0, + qup_se1_l1, qup_se1_l2, qup_se1_l3, qup_se2_l00, qup_se2_l= 01, + qup_se2_l10, qup_se2_l11, qup_se2_l2, qup_se2_l3, qup_se3_= l0, + qup_se3_l1, qup_se3_l2, qup_se3_l3, qup_se4_l0, qup_se4_l1, + qup_se4_l2, qup_se4_l3, qup_se4_l4, qup_se4_l5, qup_se5_l0= 0, + qup_se5_l01, qup_se5_l10, qup_se5_l11, qup_se5_l2, qup_se5= _l3, + qup_se5_l4, qup_se5_l5, resout, rx_los00, rx_los01, rx_los= 10, + rx_los11, rx_los20, rx_los21, sdc_clk, sdc_cmd, sdc_data, + tsens_max ] + + required: + - pins + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + + tlmm: pinctrl@1000000 { + compatible =3D "qcom,ipq5210-tlmm"; + reg =3D <0x01000000 0x300000>; + gpio-controller; + #gpio-cells =3D <0x2>; + gpio-ranges =3D <&tlmm 0 0 54>; + interrupts =3D ; + interrupt-controller; + #interrupt-cells =3D <0x2>; + + qup-uart1-default-state { + tx-pins { + pins =3D "gpio39"; + function =3D "qup_se1_l2"; + drive-strength =3D <6>; + bias-pull-down; + }; + + rx-pins { + pins =3D "gpio38"; + function =3D "qup_se1_l3"; + drive-strength =3D <6>; + bias-pull-down; + }; + }; + }; --=20 2.34.1