From nobody Tue Apr 7 00:45:49 2026 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15D653B585F; Tue, 17 Mar 2026 11:56:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773748620; cv=none; b=YeAfoXil+mWS+hfskQ+VTCzucApOsn1Jm4PYbK5NujN3yVVY5PfBadtyR0gQzrB5A4QCP2eyUv12Mhn4FCE6IkkJnctw4yDxc/rI2hSc6grVHoyKqWkahXHaEnOf3sWCk//xE4yFs3FSf46e3FajcK9UyyxblVOVCJALLtV2fmw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773748620; c=relaxed/simple; bh=sRH6L4sI3dN0ECxA9AZuIzEgQvxniNZ74wkuUQGkF+A=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=iS+0on5VzJKcZ6GDNpXUZf35k6iRpl69t3aE0JfdaTOsAIc48XsQkHo1fVWSRwhCo+lfVh2MekhsRo8ZrRF/Bdek6S1P/45NB7ecNSyYVtEaVhmvS9Lqikqil9iZVpultDKRT08HxciUOUAkSGwD+DhxvB9Ic44b2OWTO9Hksyk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b=X67PPYW5; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b="X67PPYW5" X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 62HBsBYp93851626, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realtek.com; s=dkim; t=1773748451; bh=2aitv+diaBDKY5MPp0jsIKdqBX3LlsT0qETl3P1pWDM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=X67PPYW5xhiV90p6+gPMHWokUWmw1THu94rxslK6Q7Yr4EAfVUbrQfMlKtIF2WsN8 YNpWNqtMh7xTLoWNe6B30SMXNIsK53wVi2dCwYrGnDvRASU+T2wZUCSPiJVktNxHx4 Bbgc+p5DLC/uIZSNwj0HjVRkF0QxDdYhR+h2zLidjir7x5W13m8KUykjvWKs27oIMb WT8l5HGWPX7WtsgBQAIIZ/IU1BjuzNxdxqqzjegu6FiVSSk97dnN9rSHFB4Fup8loU k+pQqZaPDq+7vFyuZJr04/IliTQTZoyQMrGJSLx1GlZQzzo+Z99JMyscP3JB0c+plx RfobtWC3kXwqQ== Received: from mail.realtek.com (rtkexhmbs03.realtek.com.tw[10.21.1.53]) by rtits2.realtek.com.tw (8.15.2/3.21/5.94) with ESMTPS id 62HBsBYp93851626 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 17 Mar 2026 19:54:11 +0800 Received: from RTKEXHMBS05.realtek.com.tw (10.21.1.55) by RTKEXHMBS03.realtek.com.tw (10.21.1.53) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 17 Mar 2026 19:54:11 +0800 Received: from cn1dhc-k02 (172.21.252.101) by RTKEXHMBS05.realtek.com.tw (10.21.1.55) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 17 Mar 2026 19:54:11 +0800 From: Yu-Chun Lin To: , , , , CC: , , , , , , , , , , Subject: [PATCH v4 3/8] pinctrl: pinconf-generic: Add properties 'input-threshold-voltage-microvolt' Date: Tue, 17 Mar 2026 19:54:05 +0800 Message-ID: <20260317115411.2154365-4-eleanor.lin@realtek.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260317115411.2154365-1-eleanor.lin@realtek.com> References: <20260317115411.2154365-1-eleanor.lin@realtek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Tzuyi Chang Add a new generic pin configuration parameter PIN_CONFIG_INPUT_VOLTAGE_UV. This parameter is used to specify the input voltage level of a pin in microvolts, which corresponds to the 'input-voltage-microvolt' property in Device Tree. Reviewed-by: Linus Walleij Signed-off-by: Tzuyi Chang Co-developed-by: Yu-Chun Lin Signed-off-by: Yu-Chun Lin --- Changes in v4: - Add Reviewed-by tag from Linus. - Sync pinconf-generic with the property name change. --- drivers/pinctrl/pinconf-generic.c | 2 ++ include/linux/pinctrl/pinconf-generic.h | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-ge= neric.c index 855ca973a1c8..e14371cfa57f 100644 --- a/drivers/pinctrl/pinconf-generic.c +++ b/drivers/pinctrl/pinconf-generic.c @@ -57,6 +57,7 @@ static const struct pin_config_item conf_items[] =3D { PCONFDUMP(PIN_CONFIG_SKEW_DELAY, "skew delay", NULL, true), PCONFDUMP(PIN_CONFIG_SKEW_DELAY_INPUT_PS, "input skew delay", "ps", true), PCONFDUMP(PIN_CONFIG_SKEW_DELAY_OUTPUT_PS, "output skew delay", "ps", tru= e), + PCONFDUMP(PIN_CONFIG_INPUT_VOLTAGE_UV, "input voltage in microvolt", "uV"= , true), }; =20 static void pinconf_generic_dump_one(struct pinctrl_dev *pctldev, @@ -203,6 +204,7 @@ static const struct pinconf_generic_params dt_params[] = =3D { { "skew-delay", PIN_CONFIG_SKEW_DELAY, 0 }, { "skew-delay-input-ps", PIN_CONFIG_SKEW_DELAY_INPUT_PS, 0 }, { "skew-delay-output-ps", PIN_CONFIG_SKEW_DELAY_OUTPUT_PS, 0 }, + { "input-threshold-voltage-microvolt", PIN_CONFIG_INPUT_VOLTAGE_UV, 0 }, }; =20 /** diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctr= l/pinconf-generic.h index 531dc3e9b3f7..a5d4b2d8633a 100644 --- a/include/linux/pinctrl/pinconf-generic.h +++ b/include/linux/pinctrl/pinconf-generic.h @@ -83,6 +83,8 @@ struct pinctrl_map; * schmitt-trigger mode is disabled. * @PIN_CONFIG_INPUT_SCHMITT_UV: this will configure an input pin to run in * schmitt-trigger mode. The argument is in uV. + * @PIN_CONFIG_INPUT_VOLTAGE_UV: this will configure the input voltage lev= el of + * the pin. The argument is specified in microvolts. * @PIN_CONFIG_MODE_LOW_POWER: this will configure the pin for low power * operation, if several modes of operation are supported these can be * passed in the argument on a custom form, else just use argument 1 @@ -145,6 +147,7 @@ enum pin_config_param { PIN_CONFIG_INPUT_SCHMITT, PIN_CONFIG_INPUT_SCHMITT_ENABLE, PIN_CONFIG_INPUT_SCHMITT_UV, + PIN_CONFIG_INPUT_VOLTAGE_UV, PIN_CONFIG_MODE_LOW_POWER, PIN_CONFIG_MODE_PWM, PIN_CONFIG_LEVEL, --=20 2.34.1