From nobody Tue Apr 7 01:02:02 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F79B3803D1; Tue, 17 Mar 2026 05:56:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773727015; cv=none; b=UgxMlyYXQJz421Xgh9BnZmZgS9jAqslM2N6uoI7un39UUOLs265UySXvrcQ/VGg8fAIwuR4gUYgVkaO/hyR6n6pVTSiRGCOWYQlh3o7bIZZ22DVWTf6s4Vmi22mx7pmg1ntsH8HfWu43noEzNkdwx9/AUh3U39DoYEspKxi86l0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773727015; c=relaxed/simple; bh=r1t1AZJ8z8H7pfOnc5U9FTp34IAllMI9HGRGoRCQodA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=l0EMSUIkwR1Ti8Qv06S3zrgyYHqHT1VEbN08+Luw4MaO0qKZQwQdmkvbUMtgezTbEYMB5rjyrc6pzr38pbmfwEncPpEYRV8zJ6AwgjMZHmcGS54JmQ701on9FccEf81SwOGXwwm7whsyVuETlJ/+nAEfND+fC1FTaiCL9nDYW6A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 17 Mar 2026 13:56:42 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 17 Mar 2026 13:56:42 +0800 From: Ryan Chen Date: Tue, 17 Mar 2026 13:56:42 +0800 Subject: [PATCH v2 1/2] mmc: dt-bindings: sdhci-of-aspeed: Add AST2700 fallback compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260317-sdhci-v2-1-39b1f063061b@aspeedtech.com> References: <20260317-sdhci-v2-0-39b1f063061b@aspeedtech.com> In-Reply-To: <20260317-sdhci-v2-0-39b1f063061b@aspeedtech.com> To: Andrew Jeffery , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Ryan Chen , Adrian Hunter , Philipp Zabel CC: Andrew Jeffery , , , , , , , Ryan Chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773727002; l=2276; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=r1t1AZJ8z8H7pfOnc5U9FTp34IAllMI9HGRGoRCQodA=; b=0FGyjAaMtMOrLQQgrAvtSsvbidn/Q/mka34Kb4XpmawERthR0b1oiv51HX39qaNydpLidjVp3 2U5Yx8sqaQ9DAY3cHhUeDpaQ+OXdjNNIXPBP6RYTPubsGHxz/uSBwi6 X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= Describe AST2700 as compatible with the existing AST2600 SD controller and SDHCI bindings by requiring fallback compatibles in the device tree. Also require `resets` on the AST2700 SD controller node. Signed-off-by: Ryan Chen --- Changes in v2: - add missing blank line - modify ast2700 compatible items const --- .../devicetree/bindings/mmc/aspeed,sdhci.yaml | 39 +++++++++++++++++-= ---- 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Docu= mentation/devicetree/bindings/mmc/aspeed,sdhci.yaml index d24950ccea95..9c8e068964a1 100644 --- a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml @@ -22,10 +22,14 @@ description: |+ =20 properties: compatible: - enum: - - aspeed,ast2400-sd-controller - - aspeed,ast2500-sd-controller - - aspeed,ast2600-sd-controller + oneOf: + - const: aspeed,ast2400-sd-controller + - const: aspeed,ast2500-sd-controller + - const: aspeed,ast2600-sd-controller + - items: + - const: aspeed,ast2700-sd-controller + - const: aspeed,ast2600-sd-controller + reg: maxItems: 1 description: Common configuration registers @@ -38,6 +42,21 @@ properties: maxItems: 1 description: The SD/SDIO controller clock gate =20 + resets: + maxItems: 1 + +if: + properties: + compatible: + contains: + const: aspeed,ast2700-sd-controller +then: + required: + - resets +else: + properties: + resets: false + patternProperties: "^sdhci@[0-9a-f]+$": type: object @@ -46,10 +65,14 @@ patternProperties: =20 properties: compatible: - enum: - - aspeed,ast2400-sdhci - - aspeed,ast2500-sdhci - - aspeed,ast2600-sdhci + oneOf: + - const: aspeed,ast2400-sdhci + - const: aspeed,ast2500-sdhci + - const: aspeed,ast2600-sdhci + - items: + - const: aspeed,ast2700-sdhci + - const: aspeed,ast2600-sdhci + reg: maxItems: 1 description: The SDHCI registers --=20 2.34.1 From nobody Tue Apr 7 01:02:02 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E7DF3803C4; Tue, 17 Mar 2026 05:56:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773727016; cv=none; b=HZjiOMbM+q+5uruOpmt3SwvOZJ5WwMbOF32wZkXTNPyW9w51SrXPTR2OU3bCllbYnDsrOS3gsb9Mb5d9hq/xntSgHfpz9OkIDk9yDCMDs6mx8ywFCXGsC+vZoLYOX4riZXzhd5rnNWeHFCFVOtxAwofYbgQxIIAiKckqsZxEyZs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773727016; c=relaxed/simple; bh=DSoqlna8u7OCuF3/5m/l2C6jTM9r0dUx3ka7UV6Fe8A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=iAJMW73tssGuUu1/YfeVwv7i9lMCGnmJy2fMIjjGE6Q8vmMsc2dYm2A8fp6lNN5+Zoga++EJzW5jNFkCVlNT8gO3nQhn3WHlbaT6RG7kfYp0kyH3dAihflyg4UYiD2y86PECcSmTGIvicelwrrqONc+41uhqrnSbgQpSXDkvOJI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 17 Mar 2026 13:56:42 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 17 Mar 2026 13:56:42 +0800 From: Ryan Chen Date: Tue, 17 Mar 2026 13:56:43 +0800 Subject: [PATCH v2 2/2] mmc: sdhci-of-aspeed: Handle optional controller reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260317-sdhci-v2-2-39b1f063061b@aspeedtech.com> References: <20260317-sdhci-v2-0-39b1f063061b@aspeedtech.com> In-Reply-To: <20260317-sdhci-v2-0-39b1f063061b@aspeedtech.com> To: Andrew Jeffery , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Ryan Chen , Adrian Hunter , Philipp Zabel CC: Andrew Jeffery , , , , , , , Ryan Chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773727002; l=1614; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=DSoqlna8u7OCuF3/5m/l2C6jTM9r0dUx3ka7UV6Fe8A=; b=VbYwjGJsR8J3X3Nl8Beo94UfMy+DhfmM5ZwdouDHm49volC5Ts/2ld8y1hSW5+kPrm8Y4R7Ay OQHgXV3c3EuBTmaGZQ5PkgTqZyk2fIwFpDNDZ9zVCB0mO5TQwMMT3q+ X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= Get the optional reset line for the ASPEED SD controller during probe by using devm_reset_control_get_optional_exclusive_deasserted(). This allows platforms such as AST2700, which require the SD controller to be taken out of reset before use, to work with the existing driver. Signed-off-by: Ryan Chen --- Changes in v2: - use devm_reset_control_get_optional_exclusive_deasserted replace reset_control_get_optional_exclusive. - add include reset.h --- drivers/mmc/host/sdhci-of-aspeed.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of= -aspeed.c index ca97b01996b1..8f638ffb55ae 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -13,6 +13,7 @@ #include #include #include +#include #include =20 #include "sdhci-pltfm.h" @@ -520,6 +521,7 @@ static int aspeed_sdc_probe(struct platform_device *pde= v) =20 { struct device_node *parent, *child; + struct reset_control *reset; struct aspeed_sdc *sdc; int ret; =20 @@ -529,6 +531,10 @@ static int aspeed_sdc_probe(struct platform_device *pd= ev) =20 spin_lock_init(&sdc->lock); =20 + reset =3D devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev= , NULL); + if (IS_ERR(reset)) + return dev_err_probe(&pdev->dev, PTR_ERR(reset), "unable to acquire rese= t\n"); + sdc->clk =3D devm_clk_get(&pdev->dev, NULL); if (IS_ERR(sdc->clk)) return PTR_ERR(sdc->clk); --=20 2.34.1