From nobody Tue Apr 7 02:38:09 2026 Received: from www3579.sakura.ne.jp (www3579.sakura.ne.jp [49.212.243.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A67C92C375A; Tue, 17 Mar 2026 06:38:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=49.212.243.89 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773729533; cv=none; b=fbnPjtwUA4Tqz0WSY3JXdwVzEKebGbfC8sfvnrXJT02czPcjgmgUkI/RZgWq++tpW6CUoQoB737rljta03SMqo4q+/kLvT4ygimxzFLv1KfJZsSBiR3UrE021NAnreM48IDUAg37Su5pin7y+RpuOLUhRr1hjPoVvOYLxcpwmig= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773729533; c=relaxed/simple; bh=iJr5toA1/CsmmyI6M1AbODpx/FMJj4ZMpGVZAMCOEe4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bBmmPKkrQ/LowA0iuo1sTaX+jz+TxV4Qi5VSMUcN1ZKKLjJY/XV5Xm2euw3rtRrihMBHNKVrCrk6wGqJ4L3nRmGVSQfQ61cEnTBc+D6575tl7bS2yPjrW7eXEYoDbaLFjDJxUWQBBoFYn03IKsD00xsnAgXCBEURmURMGJjJBMY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rsg.ci.i.u-tokyo.ac.jp; spf=pass smtp.mailfrom=rsg.ci.i.u-tokyo.ac.jp; dkim=fail (0-bit key) header.d=rsg.ci.i.u-tokyo.ac.jp header.i=@rsg.ci.i.u-tokyo.ac.jp header.b=prNPtYgO reason="key not found in DNS"; arc=none smtp.client-ip=49.212.243.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rsg.ci.i.u-tokyo.ac.jp Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rsg.ci.i.u-tokyo.ac.jp Authentication-Results: smtp.subspace.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=rsg.ci.i.u-tokyo.ac.jp header.i=@rsg.ci.i.u-tokyo.ac.jp header.b="prNPtYgO" Received: from h205.csg.ci.i.u-tokyo.ac.jp (h205.csg.ci.i.u-tokyo.ac.jp [133.11.54.205]) (authenticated bits=0) by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 62H6aoNm004343 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Tue, 17 Mar 2026 15:37:01 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) DKIM-Signature: a=rsa-sha256; bh=y+sZrQAT5sl0rgEx/XygAhgEwYefEMRbED57gjaRUBQ=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1773729421; v=1; b=prNPtYgOb0kRHVVO+qYQCoPGRtRDqErmbPK7rZEzvSFdJidQBn5DApw5UHPuE/aa I/NPsULveI+RfE+xEqMib2pG51TqlEMPFunA8p7A+nFjYdZ94HSUzaqMfOsUs1mg 2RLLMiSyzTuy65NpguLp89GsV2ztlznXH0JYopyAopVVBKj1VtEzjeu4/jqd+O9m q5ff6mhbm9cRa22twR7r+WqmRj3MdeV5DTWDtzd/4vx/MCO7pdvcvirzty1LrKx8 XtSrMg/Bf/fWB6gw0G/bDf2W4JzEm9+CGmU0a3q7DDf08RqVTJi2UYUAVR6ToyHN /O7nnUEvsj+sjLV2nyYoJA== From: Akihiko Odaki Date: Tue, 17 Mar 2026 15:36:50 +0900 Subject: [PATCH v4 2/4] KVM: arm64: PMU: Protect the list of PMUs with RCU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260317-hybrid-v4-2-bd62bcd48644@rsg.ci.i.u-tokyo.ac.jp> References: <20260317-hybrid-v4-0-bd62bcd48644@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260317-hybrid-v4-0-bd62bcd48644@rsg.ci.i.u-tokyo.ac.jp> To: Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Kees Cook , "Gustavo A. R. Silva" , Paolo Bonzini , Jonathan Corbet , Shuah Khan Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org, devel@daynix.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, Akihiko Odaki X-Mailer: b4 0.15-dev-5ab4c Convert the list of PMUs to a RCU-protected list that has primitives to avoid read-side contention. Signed-off-by: Akihiko Odaki --- arch/arm64/kvm/pmu-emul.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c index 59ec96e09321..ef5140bbfe28 100644 --- a/arch/arm64/kvm/pmu-emul.c +++ b/arch/arm64/kvm/pmu-emul.c @@ -7,9 +7,9 @@ #include #include #include -#include #include #include +#include #include #include #include @@ -26,7 +26,6 @@ static bool kvm_pmu_counter_is_enabled(struct kvm_pmc *pm= c); =20 bool kvm_supports_guest_pmuv3(void) { - guard(mutex)(&arm_pmus_lock); return !list_empty(&arm_pmus); } =20 @@ -808,7 +807,7 @@ void kvm_host_pmu_init(struct arm_pmu *pmu) return; =20 entry->arm_pmu =3D pmu; - list_add_tail(&entry->entry, &arm_pmus); + list_add_tail_rcu(&entry->entry, &arm_pmus); } =20 static struct arm_pmu *kvm_pmu_probe_armpmu(void) @@ -817,7 +816,7 @@ static struct arm_pmu *kvm_pmu_probe_armpmu(void) struct arm_pmu *pmu; int cpu; =20 - guard(mutex)(&arm_pmus_lock); + guard(rcu)(); =20 /* * It is safe to use a stale cpu to iterate the list of PMUs so long as @@ -837,7 +836,7 @@ static struct arm_pmu *kvm_pmu_probe_armpmu(void) * carried here. */ cpu =3D raw_smp_processor_id(); - list_for_each_entry(entry, &arm_pmus, entry) { + list_for_each_entry_rcu(entry, &arm_pmus, entry) { pmu =3D entry->arm_pmu; =20 if (cpumask_test_cpu(cpu, &pmu->supported_cpus)) @@ -1088,9 +1087,9 @@ static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vc= pu, int pmu_id) int ret =3D -ENXIO; =20 lockdep_assert_held(&kvm->arch.config_lock); - mutex_lock(&arm_pmus_lock); + guard(rcu)(); =20 - list_for_each_entry(entry, &arm_pmus, entry) { + list_for_each_entry_rcu(entry, &arm_pmus, entry) { arm_pmu =3D entry->arm_pmu; if (arm_pmu->pmu.type =3D=3D pmu_id) { if (kvm_vm_has_ran_once(kvm) || @@ -1106,7 +1105,6 @@ static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vc= pu, int pmu_id) } } =20 - mutex_unlock(&arm_pmus_lock); return ret; } =20 --=20 2.53.0