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Mon, 16 Mar 2026 14:23:27 -0700 (PDT) From: Nelson Johnson To: linux-mmc@vger.kernel.org Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-kernel@vger.kernel.org, Nelson Johnson Subject: [PATCH 1/3] mmc: sdhci-pci: disable aggressive runtime PM for Braswell SD on Lenovo N22 Date: Mon, 16 Mar 2026 16:23:23 -0500 Message-ID: <20260316212325.4207-2-nzjfr547@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260316212325.4207-1-nzjfr547@gmail.com> References: <20260316212325.4207-1-nzjfr547@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Lenovo N22 systems with the Braswell SD controller (PCI ID 8086:2296) regre= ss on kernels newer than 4.9. On this machine the SD slot is exposed throug= h both PCI and ACPI firmware nodes, and enabling the newer aggressive runti= me PM/card-detect wake path causes the controller to stop behaving like the= older working configuration. Keep the Lenovo N22 on the pre-4.14 behavior by skipping MMC_CAP_AGGRESSIVE= _PM and MMC_CAP_CD_WAKE for the 8086:2296 slot on this DMI match, and disab= le runtime PM for that host. This preserves the rest of the Braswell/Atom handling while restoring the p= ower-management behavior that allows the slot to function on the Lenovo N22. Fixes: 6cf4156c0988 ("mmc: sdhci-pci: Enable card detect wake for Intel BYT= -related SD controllers") Signed-off-by: Nelson Johnson --- drivers/mmc/host/sdhci-pci-core.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci= -core.c index 47a0a7388..4b3c61609 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -923,6 +923,13 @@ static bool jsl_broken_hs400es(struct sdhci_pci_slot *= slot) dmi_match(DMI_BIOS_VENDOR, "ASUSTeK COMPUTER INC."); } =20 +static bool sdhci_pci_is_lenovo_n22_bsw_sd(struct sdhci_pci_slot *slot) +{ + return slot->chip->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_BSW_SD && + dmi_match(DMI_SYS_VENDOR, "LENOVO") && + dmi_match(DMI_BOARD_NAME, "N22"); +} + static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot) { int ret =3D byt_emmc_probe_slot(slot); @@ -1120,9 +1127,13 @@ static void byt_needs_pwr_off(struct sdhci_pci_slot = *slot) =20 static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) { + bool runtime_pm_ok =3D !sdhci_pci_is_lenovo_n22_bsw_sd(slot); + byt_probe_slot(slot); - slot->host->mmc->caps |=3D MMC_CAP_WAIT_WHILE_BUSY | - MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE; + slot->host->mmc->caps |=3D MMC_CAP_WAIT_WHILE_BUSY; + if (runtime_pm_ok) + slot->host->mmc->caps |=3D MMC_CAP_AGGRESSIVE_PM | + MMC_CAP_CD_WAKE; slot->cd_idx =3D 0; slot->cd_override_level =3D true; if (slot->chip->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_BXT_SD || @@ -1135,7 +1146,10 @@ static int byt_sd_probe_slot(struct sdhci_pci_slot *= slot) slot->chip->pdev->subsystem_device =3D=3D PCI_SUBDEVICE_ID_NI_78E3) slot->host->mmc->caps2 |=3D MMC_CAP2_AVOID_3_3V; =20 - byt_needs_pwr_off(slot); + if (runtime_pm_ok) + byt_needs_pwr_off(slot); + else + slot->chip->allow_runtime_pm =3D false; =20 return 0; } --=20 2.47.3