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Mon, 16 Mar 2026 14:23:27 -0700 (PDT) From: Nelson Johnson To: linux-mmc@vger.kernel.org Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-kernel@vger.kernel.org, Nelson Johnson Subject: [PATCH 1/3] mmc: sdhci-pci: disable aggressive runtime PM for Braswell SD on Lenovo N22 Date: Mon, 16 Mar 2026 16:23:23 -0500 Message-ID: <20260316212325.4207-2-nzjfr547@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260316212325.4207-1-nzjfr547@gmail.com> References: <20260316212325.4207-1-nzjfr547@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Lenovo N22 systems with the Braswell SD controller (PCI ID 8086:2296) regre= ss on kernels newer than 4.9. On this machine the SD slot is exposed throug= h both PCI and ACPI firmware nodes, and enabling the newer aggressive runti= me PM/card-detect wake path causes the controller to stop behaving like the= older working configuration. Keep the Lenovo N22 on the pre-4.14 behavior by skipping MMC_CAP_AGGRESSIVE= _PM and MMC_CAP_CD_WAKE for the 8086:2296 slot on this DMI match, and disab= le runtime PM for that host. This preserves the rest of the Braswell/Atom handling while restoring the p= ower-management behavior that allows the slot to function on the Lenovo N22. Fixes: 6cf4156c0988 ("mmc: sdhci-pci: Enable card detect wake for Intel BYT= -related SD controllers") Signed-off-by: Nelson Johnson --- drivers/mmc/host/sdhci-pci-core.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci= -core.c index 47a0a7388..4b3c61609 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -923,6 +923,13 @@ static bool jsl_broken_hs400es(struct sdhci_pci_slot *= slot) dmi_match(DMI_BIOS_VENDOR, "ASUSTeK COMPUTER INC."); } =20 +static bool sdhci_pci_is_lenovo_n22_bsw_sd(struct sdhci_pci_slot *slot) +{ + return slot->chip->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_BSW_SD && + dmi_match(DMI_SYS_VENDOR, "LENOVO") && + dmi_match(DMI_BOARD_NAME, "N22"); +} + static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot) { int ret =3D byt_emmc_probe_slot(slot); @@ -1120,9 +1127,13 @@ static void byt_needs_pwr_off(struct sdhci_pci_slot = *slot) =20 static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) { + bool runtime_pm_ok =3D !sdhci_pci_is_lenovo_n22_bsw_sd(slot); + byt_probe_slot(slot); - slot->host->mmc->caps |=3D MMC_CAP_WAIT_WHILE_BUSY | - MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE; + slot->host->mmc->caps |=3D MMC_CAP_WAIT_WHILE_BUSY; + if (runtime_pm_ok) + slot->host->mmc->caps |=3D MMC_CAP_AGGRESSIVE_PM | + MMC_CAP_CD_WAKE; slot->cd_idx =3D 0; slot->cd_override_level =3D true; if (slot->chip->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_BXT_SD || @@ -1135,7 +1146,10 @@ static int byt_sd_probe_slot(struct sdhci_pci_slot *= slot) slot->chip->pdev->subsystem_device =3D=3D PCI_SUBDEVICE_ID_NI_78E3) slot->host->mmc->caps2 |=3D MMC_CAP2_AVOID_3_3V; =20 - byt_needs_pwr_off(slot); + if (runtime_pm_ok) + byt_needs_pwr_off(slot); + else + slot->chip->allow_runtime_pm =3D false; =20 return 0; } --=20 2.47.3 From nobody Tue Apr 7 02:34:18 2026 Received: from mail-yx1-f48.google.com (mail-yx1-f48.google.com [74.125.224.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C05463644C6 for ; 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Mon, 16 Mar 2026 14:23:28 -0700 (PDT) Received: from Starblazer007.localdomain ([12.206.154.114]) by smtp.gmail.com with ESMTPSA id 00721157ae682-79a5e1ae50asm8180437b3.2.2026.03.16.14.23.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2026 14:23:28 -0700 (PDT) From: Nelson Johnson To: linux-mmc@vger.kernel.org Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-kernel@vger.kernel.org, Nelson Johnson Subject: [PATCH 2/3] mmc: sdhci-pci: force polling card detect for Braswell SD on Lenovo N22 Date: Mon, 16 Mar 2026 16:23:24 -0500 Message-ID: <20260316212325.4207-3-nzjfr547@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260316212325.4207-1-nzjfr547@gmail.com> References: <20260316212325.4207-1-nzjfr547@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Lenovo N22 uses the Braswell SD controller at PCI ID 8086:2296, but its= firmware exposes a broken card-detect path. On modern kernels the slot rep= eatedly fails to come up because the normal GPIO card-detect path never bec= omes usable on this machine. Force the Lenovo N22 to skip the firmware GPIO card-detect path for the Bra= swell SD slot and use polling instead. This keeps the quirk tightly scoped = to the affected DMI match while leaving the default behavior unchanged on o= ther Braswell systems. With the polling fallback in place, the PCI SDHCI path can detect card inse= rtion reliably again on the Lenovo N22. Fixes: 6cf4156c0988 ("mmc: sdhci-pci: Enable card detect wake for Intel BYT= -related SD controllers") Signed-off-by: Nelson Johnson --- drivers/mmc/host/sdhci-pci-core.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci= -core.c index 4b3c61609..05ab17e72 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -1134,8 +1134,17 @@ static int byt_sd_probe_slot(struct sdhci_pci_slot *= slot) if (runtime_pm_ok) slot->host->mmc->caps |=3D MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE; - slot->cd_idx =3D 0; - slot->cd_override_level =3D true; + if (!runtime_pm_ok) { + /* + * Lenovo N22 Braswell card-detect bypass: ignore the broken + * firmware GPIO path and poll the slot instead. + */ + slot->cd_idx =3D -1; + slot->host->mmc->caps |=3D MMC_CAP_NEEDS_POLL; + } else { + slot->cd_idx =3D 0; + slot->cd_override_level =3D true; + } if (slot->chip->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_BXT_SD || slot->chip->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_BXTM_SD || slot->chip->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_APL_SD || --=20 2.47.3 From nobody Tue Apr 7 02:34:18 2026 Received: from mail-yw1-f175.google.com (mail-yw1-f175.google.com [209.85.128.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B77B3364E8B for ; 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Mon, 16 Mar 2026 14:23:29 -0700 (PDT) Received: from Starblazer007.localdomain ([12.206.154.114]) by smtp.gmail.com with ESMTPSA id 00721157ae682-79a5e1ae50asm8180437b3.2.2026.03.16.14.23.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2026 14:23:29 -0700 (PDT) From: Nelson Johnson To: linux-mmc@vger.kernel.org Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-kernel@vger.kernel.org, Nelson Johnson Subject: [PATCH 3/3] mmc: sdhci-acpi: exclude INT33BB:00 from ACPI binding on Lenovo N22 Date: Mon, 16 Mar 2026 16:23:25 -0500 Message-ID: <20260316212325.4207-4-nzjfr547@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260316212325.4207-1-nzjfr547@gmail.com> References: <20260316212325.4207-1-nzjfr547@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On the Lenovo N22, the firmware exposes the Braswell SD controller through = both PCI 0000:00:12.0 and ACPI INT33BB:00. The ACPI path for INT33BB:00 nev= er finishes probing on this machine and repeatedly defers, which leaves the= slot in the broken ACPI path instead of letting the working PCI path own t= he controller. Return -ENODEV early for INT33BB:00 on the Lenovo N22 so that sdhci-acpi do= es not bind this machine-specific firmware node. That leaves the controller= to the PCI SDHCI driver, which is the path that works once the N22-specifi= c runtime PM and card-detect quirks are applied. Scope the exclusion to the Lenovo N22 DMI match so other INT33BB systems co= ntinue to use the normal ACPI handling. Fixes: 6cf4156c0988 ("mmc: sdhci-pci: Enable card detect wake for Intel BYT= -related SD controllers") Signed-off-by: Nelson Johnson --- drivers/mmc/host/sdhci-acpi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c index 84c705460..3badf1c87 100644 --- a/drivers/mmc/host/sdhci-acpi.c +++ b/drivers/mmc/host/sdhci-acpi.c @@ -814,6 +814,12 @@ static const struct sdhci_acpi_slot *sdhci_acpi_get_sl= ot(struct acpi_device *ade return NULL; } =20 +static bool sdhci_acpi_is_lenovo_n22(void) +{ + return dmi_match(DMI_SYS_VENDOR, "LENOVO") && + dmi_match(DMI_BOARD_NAME, "N22"); +} + static int sdhci_acpi_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -834,6 +840,10 @@ static int sdhci_acpi_probe(struct platform_device *pd= ev) if (id) quirks =3D (long)id->driver_data; =20 + if (sdhci_acpi_is_lenovo_n22() && + acpi_dev_hid_uid_match(device, "INT33BB", "2")) + return -ENODEV; + slot =3D sdhci_acpi_get_slot(device); =20 /* Power on the SDHCI controller and its children */ --=20 2.47.3