From nobody Tue Apr 7 04:21:19 2026 Received: from MA0PR01CU012.outbound.protection.outlook.com (mail-southindiaazon11021075.outbound.protection.outlook.com [40.107.57.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 382A8384244; Mon, 16 Mar 2026 09:01:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.57.75 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773651702; cv=fail; b=D1KIqExSl78vxsjPDpLczsOPLV276QPUTlDqyMjGyE02yOKvjbfMBNt1cGu2p1oFOeEENkHqyhoLj1ZMfAoulgjJgr1ipg8q9E4dTbRPaVIahSIp1VfBufArGDM2nMatveXwPmxSd0MtpgFEhOod3SJAsZbX6sCEvZUGUegWR+s= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773651702; c=relaxed/simple; bh=bh1yco4j5pEIqulV/7MeOId8lfWaDVcGSIhuhL69UcE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Content-Type:MIME-Version; b=FxNk3aBd6aVti5l7q7wyNyzY9rAfcMDoXmBV03/vIZLx/OOnqHKYSBhhl+gHc3AeenVjjmI9dTF6W7rMw/XAvxxAUKfU/H6qIR1EZ6gA2WMkOFFJqHPQcBb3Nnw4DU3pdhLZWzesYrP27TCKeoSBFAhKOyTxl9NKH1jtGtyMDnQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=siliconsignals.io; spf=pass smtp.mailfrom=siliconsignals.io; dkim=pass (2048-bit key) header.d=siliconsignals.io header.i=@siliconsignals.io header.b=dTuHl/qU; arc=fail smtp.client-ip=40.107.57.75 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=siliconsignals.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=siliconsignals.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siliconsignals.io header.i=@siliconsignals.io header.b="dTuHl/qU" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=fE5Ue8IqmTgulbkLHoyLnABoEEy1pSChq0AhNaibzXHgiWKZgONsmuG7FAQwHDUEXACyl3AhZSWkMXIW+lRor5RMQh2d5jAW2Di3Echa/UzuOOq/58p91b01RSop9/ByNpSb/iKwL6ChM1hZsJFt9rUTsh9c4J4AovPKr4c6e/9v9jYe7VSLxKAbJ7VvZG2pYRl/f4GF+ARdpedK8KE2yRl8rITG4qDqqAJqfdrvgBSOMmOQMACZKlU0SYnxcQHrcRK1/ep2cm7iZLW1TjZ7O1DhNGj5URQp4UrGbAKt0dG5zFu7bIrAMTgvOTtS75zDrv2GAlc2yG0kBM+d83cTwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ssdrlisL50z+Bbjnu2pAlfm+fgtw++0i5XwoGUjNjpA=; b=nFSpd8XFNJURVtZ3g96ZMRDdvd+qjTd/7aLhjwO/1QW6MAKGbHMzwVTdqB5M4J/VrSYTK82aXigKKktUEg3d3fcPymuZIRVfTaFd/O5qGZJbmUGlAOjCsot4q1l4s1YP2y6GYNiYwql+ywOke4pKsun35Fi6Optv4pDVeyhj7tZ/Vkk8Cn8wFGcXAGYbfhpJlo2auTzFgoLJ0CVRrhE2jUyZEDYpcSjTyPzPbCkWWfQrxsPWynqY1MmjuWCtjhKHhxE7Yq0SJ8k7m47uq6M6onnmtTwakr0Bu4cy0C/tZzgaUjUnOwAGPEPrL2cGe9xdkRpQkZqYkRxt9FbnriD3pg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=siliconsignals.io; dmarc=pass action=none header.from=siliconsignals.io; dkim=pass header.d=siliconsignals.io; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=siliconsignals.io; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ssdrlisL50z+Bbjnu2pAlfm+fgtw++0i5XwoGUjNjpA=; b=dTuHl/qUdzVIv1fg7oHhDulZ/bdk5Sgv+FwMCfSMJkhcj0QO1RqsqIK42mB345JrxWYhxPNJl0L0NYbdv8OY5cjFdJTdABjDjKGr6EMWEVIWJ8jh5TaJUX36CVXYXdp6QMi6Itv9jEUgPI7FFB2/PsiNBn8DY2R86LbH9UNeNVtOrKVbuQrckR/sm/1jRlT7wAzPUhCIVR9ApR85vJfUoSM/AopmzPMXDh5CPLyGy1WWk+jKqxx0lqQ0dbm0vx1RIC6CBfUtlpOCDkNm/WimlWlVk7j9XSO93R59NzRs3wMLznc3ytQ392Ndo1Ky45d064P77EL2JpyNxYivINekDw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=siliconsignals.io; Received: from MA0P287MB2178.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:11e::14) by MA0P287MB1615.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:ff::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9700.24; Mon, 16 Mar 2026 09:01:36 +0000 Received: from MA0P287MB2178.INDP287.PROD.OUTLOOK.COM ([fe80::f8da:c075:cde1:e167]) by MA0P287MB2178.INDP287.PROD.OUTLOOK.COM ([fe80::f8da:c075:cde1:e167%4]) with mapi id 15.20.9700.022; Mon, 16 Mar 2026 09:01:36 +0000 From: Elgin Perumbilly To: sakari.ailus@linux.intel.com, linux-media@vger.kernel.org Cc: tarang.raval@siliconsignals.io, Elgin Perumbilly , Mauro Carvalho Chehab , Hans Verkuil , Hans de Goede , Vladimir Zapolskiy , Mehdi Djait , Xiaolei Wang , Laurent Pinchart , Sylvain Petinot , Benjamin Mugnier , Svyatoslav Ryhel , linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] media: i2c: imx412: Convert to CCI register access helpers Date: Mon, 16 Mar 2026 14:30:54 +0530 Message-Id: <20260316090059.121605-2-elgin.perumbilly@siliconsignals.io> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260316090059.121605-1-elgin.perumbilly@siliconsignals.io> References: <20260316090059.121605-1-elgin.perumbilly@siliconsignals.io> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: BM1PR01CA0165.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:68::35) To MA0P287MB2178.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:11e::14) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MA0P287MB2178:EE_|MA0P287MB1615:EE_ X-MS-Office365-Filtering-Correlation-Id: 43990dbe-97ae-4ae2-cd1f-08de833aa0b3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|52116014|18002099003|22082099003|56012099003|38350700014; X-Microsoft-Antispam-Message-Info: /jsc4HyJKlxz+53M+NygFSk/N3rO6TxGOa2n3NjRUImYrFmkvM3YveM3OxXghr0I/gIYGm+MqFZzEXB/hE90ZL5HtPfP/hFdPfT+oi1x03P23IWkGUWDZ68vPpa6bEBgSzutfGhwmxU7F5QkOgEgG4ZpA2VMcLliJ6mRTSK3uRQgh7EtQ0UqGBPIOyRG3bfsihZ8sWqi7LgvmgEIc28YETeIPblmC0EqNAl/frpK+N5pd+fb3HHWuS5CVlRgMzkdmQWRnPPSQZMQnJofssirN+NPx945sk6tbKj0Xja6iPGlpW0U7GakoM4W+1waJV1hRUSh9m8dzUPLyOZfnitCYuRYqasY3D4gQzgbZw55GIlv9fz1M3nqm6FZwZdvsjAsaVH9pkIEL7HNjMcFGJ9MhXIB74VGPNs2YNlYBJK7OguixGGu3VJHSjEkY0OEnJ3/w+/iff1Q3NZK78piSfS5oymSDXdkWQhMDyvu7e60ii9LAwOEmkaFO3QtarstHneUKxGF7o9uJdbCQgU1QKxr2tqUjOqTbPTWnUtudoCdHSNA6JdhCjd1nbMn2c/rWdR8V12orz7JCsjyyed9IXlVefbBn2rj9ztXeYdNOALkLN0gJrY/p1dzFgrg6z0MIn3VUrdMLCj0BvM7tcZ7WpOeJ9kvdZh1Kc5tsocv63Mqe41LrKW6dYcDzuJ5EOplLh95cfEhcaGeVDEAkYF/vIbyxpUrADotGWuHbEyXzaqLONdOtd/+Q9V0JYgmQBoKYrEM+Da4ePG8m430N5sIwz2Czz9uih4/x+A2j68CUgFQalo= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MA0P287MB2178.INDP287.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(7416014)(52116014)(18002099003)(22082099003)(56012099003)(38350700014);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?7TbpNwGDvAJoB4skW9n63CSKdsCXBq2VF3d74+JIUsOKGEWCYz3PBMB4PIsD?= =?us-ascii?Q?KLrFqY81yoObYTmnBmiJl6TSPUCmceQ0mN9M9as0evvMrw1q2FveoKBQJehY?= =?us-ascii?Q?0XTByIGPI6HMQY+agK7FlWPBg8YHhWS70b9wyOJvqHJytENjJL84nj6pr4s8?= =?us-ascii?Q?7yaYuSsjJEwCqUiML++6mTF5I0G6akn+7R3guPPERGX7zWblyTxx4369mq+U?= =?us-ascii?Q?/JzOMBwxtLhpv7aQuJni++V4ymrJL8kPrWb3TiLdtXZBWSR04IcI8I+gRtVa?= =?us-ascii?Q?+MIZsmKEhAwKTeHkScBB7W3bdTz6+KHYzJb8K28b/Az2P6LW5jtCgSooqJsm?= =?us-ascii?Q?xlLF5aPgMTYUzq1l7WENXR+o5I9AMHY6Ixad1V25I0SnJ8ByEWAx89PxQRBx?= =?us-ascii?Q?d0I1k07fvkKLYCDEK6qTqWx60GtJ9FqhDHmVEcunq7spcJcMAKwZQ9Keu5bi?= =?us-ascii?Q?HYAZ1GWhr/PGOxaR5HIcPG9TuHIv9CaZpJ0nefr155u8rR3MJhj3iA/zBDo4?= =?us-ascii?Q?GLYSjNPjqL5qvRVAKlE5PC0JbMv+dG8M/insGek2Ki1vHdYO0kU3Qj/7O/qo?= =?us-ascii?Q?Kn3Q9g6VwyneFjHPPlAaeOVRy+CzuZJgpTcQmvzdANyvWXNGbL2Gho7xALwi?= =?us-ascii?Q?C/wz1XgTNXPVB3EuzsP5eyF71lB9DsMKuIpFCX6LhTek9/R9dzUN4Rx1u5cn?= =?us-ascii?Q?pR9Pnw6hMQtD7s+469wNuFOgLL9E0sS10t9jcb9iNaTwOUgcMrEdWI8pCUC6?= =?us-ascii?Q?MZnCwdGWnDE8VGlH6LlfpgVrejH01Z/rbmtnW4ZZk+hjc0wxsZ+HNl3YlIAK?= =?us-ascii?Q?d3NoHfn1LAPzTGw/29rCbo16w8KPsEHACCpgcX6Ec7UQ5Ei1JwDA7kRKKs2o?= =?us-ascii?Q?7JMASrJr8W2Qb35qBm74d9frVocC9ZrOnWKDTyK5gWvWwChuYIjCEx4+Yczb?= =?us-ascii?Q?UyPrxR5SH/X4k45HtD2G5nlZz0WCWlL3eminfXgnNBgRadJjglVRenj3vWor?= =?us-ascii?Q?QGaKBlVMtfVuz9lFXV7yNx8uQlcrMKSTBwt7ZGYsFCQiflIa4FzJqBEP9rac?= =?us-ascii?Q?xtPRdM++JChgVU6KC+rqJZvaey96MXDHoJJR73wAQtaTwxZoiJACQjNaqvKw?= =?us-ascii?Q?LZuKbgxaEXIB8WEHv/YJkjSD8deSfFxOzyQl/aAq4cDj5QnEo+XAoXmPcumO?= =?us-ascii?Q?xN7ejZQkU/WxmDgMUPRc0HfCK2J+arr0bwnybTjnZELruP1dC4af9o4HvKu9?= =?us-ascii?Q?TBK/AKRHxP3zpuW6eeTh3OoBoLtQHZ2V/p69CDvfe7ChIaF6YAQ2nhHBTZNP?= =?us-ascii?Q?wt3GLh5wPx8yBN8FEe/MqNdAqri0Zb/BlkRHjckhqkKcAFDxHuOAYtJV2kiy?= =?us-ascii?Q?y1cyfgwb+SUMQ9jwqRspNYCoIA9jCk5MPVIshpNR7quw45pbQvuCuijgLp4w?= =?us-ascii?Q?o5DjMoFjGdsGmZ63Rfk8TD6gbJmMO6BbRsWs7rfQACxuLXY13JCT+vD4EEG1?= =?us-ascii?Q?8M350MtTNs3ckitvYduH0OjvwMm4LXJHrAsXZbN8vMa26x4AqVVlQ6mHh0tl?= =?us-ascii?Q?SSYp3D3gcJ2D5Q3K6BlW2GPApn6/jn401za5NBqRJ6ya9mz+125zjF6Mec3a?= =?us-ascii?Q?NU//bEOJ9BIBBvpOdYL6bSmv7dB8eLomgqrfhSU4isRP6a88bzpTEe9S4s7L?= =?us-ascii?Q?/kO/jIhmTH/2L4OR0ieluRKFidcu3RB+ptVJDHSw+ZMo8Cj2PF5g/AfnV/HR?= =?us-ascii?Q?cE1qa78mEn+5J0SbKHHLF26Y4e8dS78=3D?= X-OriginatorOrg: siliconsignals.io X-MS-Exchange-CrossTenant-Network-Message-Id: 43990dbe-97ae-4ae2-cd1f-08de833aa0b3 X-MS-Exchange-CrossTenant-AuthSource: MA0P287MB2178.INDP287.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2026 09:01:36.2112 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 7ec5089e-a433-4bd1-a638-82ee62e21d37 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: K7HZrEV1RzNTaI1Vp/YPLE/YusYWrPDtpSLXM7NlICPYdqKyjaSj+zbBWba79iNaYVhIYnFJk7GYOrpZbW6YPUtMAgQvmmofGliyBIsfvkk5gVuvMcuRZly4m7QXTSin X-MS-Exchange-Transport-CrossTenantHeadersStamped: MA0P287MB1615 Content-Type: text/plain; charset="utf-8" Use the new common CCI register access helpers to replace the private register access helpers in the imx412 driver. This simplifies the driver by reducing the amount of code. Signed-off-by: Elgin Perumbilly Reviewed-by: Tarang Raval --- drivers/media/i2c/Kconfig | 1 + drivers/media/i2c/imx412.c | 635 ++++++++++++++++--------------------- 2 files changed, 271 insertions(+), 365 deletions(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 20482be35f26..1881da7a3967 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -269,6 +269,7 @@ config VIDEO_IMX355 config VIDEO_IMX412 tristate "Sony IMX412 sensor support" depends on OF_GPIO + select V4L2_CCI_I2C help This is a Video4Linux2 sensor driver for the Sony IMX412 camera. diff --git a/drivers/media/i2c/imx412.c b/drivers/media/i2c/imx412.c index e25e0a9ff65c..13d6fe79dcf7 100644 --- a/drivers/media/i2c/imx412.c +++ b/drivers/media/i2c/imx412.c @@ -13,38 +13,39 @@ #include #include +#include #include #include #include /* Streaming Mode */ -#define IMX412_REG_MODE_SELECT 0x0100 +#define IMX412_REG_MODE_SELECT CCI_REG8(0x0100) #define IMX412_MODE_STANDBY 0x00 #define IMX412_MODE_STREAMING 0x01 /* Lines per frame */ -#define IMX412_REG_LPFR 0x0340 +#define IMX412_REG_LPFR CCI_REG16(0x0340) /* Chip ID */ -#define IMX412_REG_ID 0x0016 +#define IMX412_REG_ID CCI_REG16(0x0016) #define IMX412_ID 0x577 /* Exposure control */ -#define IMX412_REG_EXPOSURE_CIT 0x0202 +#define IMX412_REG_EXPOSURE_CIT CCI_REG16(0x0202) #define IMX412_EXPOSURE_MIN 8 #define IMX412_EXPOSURE_OFFSET 22 #define IMX412_EXPOSURE_STEP 1 #define IMX412_EXPOSURE_DEFAULT 0x0648 /* Analog gain control */ -#define IMX412_REG_AGAIN 0x0204 +#define IMX412_REG_AGAIN CCI_REG16(0x0204) #define IMX412_AGAIN_MIN 0 #define IMX412_AGAIN_MAX 978 #define IMX412_AGAIN_STEP 1 #define IMX412_AGAIN_DEFAULT 0 /* Group hold register */ -#define IMX412_REG_HOLD 0x0104 +#define IMX412_REG_HOLD CCI_REG8(0x0104) /* Input clock rate */ #define IMX412_INCLK_RATE 24000000 @@ -56,16 +57,6 @@ #define IMX412_REG_MIN 0x00 #define IMX412_REG_MAX 0xffff -/** - * struct imx412_reg - imx412 sensor register - * @address: Register address - * @val: Register value - */ -struct imx412_reg { - u16 address; - u8 val; -}; - /** * struct imx412_reg_list - imx412 sensor register list * @num_of_regs: Number of registers in the list @@ -73,7 +64,7 @@ struct imx412_reg { */ struct imx412_reg_list { u32 num_of_regs; - const struct imx412_reg *regs; + const struct cci_reg_sequence *regs; }; /** @@ -111,6 +102,7 @@ static const char * const imx412_supply_names[] =3D { /** * struct imx412 - imx412 sensor device structure * @dev: Pointer to generic device + * @cci: CCI register map * @client: Pointer to i2c client * @sd: V4L2 sub-device * @pad: Media pad. Only one pad supported @@ -130,6 +122,7 @@ static const char * const imx412_supply_names[] =3D { */ struct imx412 { struct device *dev; + struct regmap *cci; struct i2c_client *client; struct v4l2_subdev sd; struct media_pad pad; @@ -155,238 +148,238 @@ static const s64 link_freq[] =3D { }; /* Sensor mode registers */ -static const struct imx412_reg mode_4056x3040_regs[] =3D { - {0x0136, 0x18}, - {0x0137, 0x00}, - {0x3c7e, 0x08}, - {0x3c7f, 0x02}, - {0x38a8, 0x1f}, - {0x38a9, 0xff}, - {0x38aa, 0x1f}, - {0x38ab, 0xff}, - {0x55d4, 0x00}, - {0x55d5, 0x00}, - {0x55d6, 0x07}, - {0x55d7, 0xff}, - {0x55e8, 0x07}, - {0x55e9, 0xff}, - {0x55ea, 0x00}, - {0x55eb, 0x00}, - {0x575c, 0x07}, - {0x575d, 0xff}, - {0x575e, 0x00}, - {0x575f, 0x00}, - {0x5764, 0x00}, - {0x5765, 0x00}, - {0x5766, 0x07}, - {0x5767, 0xff}, - {0x5974, 0x04}, - {0x5975, 0x01}, - {0x5f10, 0x09}, - {0x5f11, 0x92}, - {0x5f12, 0x32}, - {0x5f13, 0x72}, - {0x5f14, 0x16}, - {0x5f15, 0xba}, - {0x5f17, 0x13}, - {0x5f18, 0x24}, - {0x5f19, 0x60}, - {0x5f1a, 0xe3}, - {0x5f1b, 0xad}, - {0x5f1c, 0x74}, - {0x5f2d, 0x25}, - {0x5f5c, 0xd0}, - {0x6a22, 0x00}, - {0x6a23, 0x1d}, - {0x7ba8, 0x00}, - {0x7ba9, 0x00}, - {0x886b, 0x00}, - {0x9002, 0x0a}, - {0x9004, 0x1a}, - {0x9214, 0x93}, - {0x9215, 0x69}, - {0x9216, 0x93}, - {0x9217, 0x6b}, - {0x9218, 0x93}, - {0x9219, 0x6d}, - {0x921a, 0x57}, - {0x921b, 0x58}, - {0x921c, 0x57}, - {0x921d, 0x59}, - {0x921e, 0x57}, - {0x921f, 0x5a}, - {0x9220, 0x57}, - {0x9221, 0x5b}, - {0x9222, 0x93}, - {0x9223, 0x02}, - {0x9224, 0x93}, - {0x9225, 0x03}, - {0x9226, 0x93}, - {0x9227, 0x04}, - {0x9228, 0x93}, - {0x9229, 0x05}, - {0x922a, 0x98}, - {0x922b, 0x21}, - {0x922c, 0xb2}, - {0x922d, 0xdb}, - {0x922e, 0xb2}, - {0x922f, 0xdc}, - {0x9230, 0xb2}, - {0x9231, 0xdd}, - {0x9232, 0xe2}, - {0x9233, 0xe1}, - {0x9234, 0xb2}, - {0x9235, 0xe2}, - {0x9236, 0xb2}, - {0x9237, 0xe3}, - {0x9238, 0xb7}, - {0x9239, 0xb9}, - {0x923a, 0xb7}, - {0x923b, 0xbb}, - {0x923c, 0xb7}, - {0x923d, 0xbc}, - {0x923e, 0xb7}, - {0x923f, 0xc5}, - {0x9240, 0xb7}, - {0x9241, 0xc7}, - {0x9242, 0xb7}, - {0x9243, 0xc9}, - {0x9244, 0x98}, - {0x9245, 0x56}, - {0x9246, 0x98}, - {0x9247, 0x55}, - {0x9380, 0x00}, - {0x9381, 0x62}, - {0x9382, 0x00}, - {0x9383, 0x56}, - {0x9384, 0x00}, - {0x9385, 0x52}, - {0x9388, 0x00}, - {0x9389, 0x55}, - {0x938a, 0x00}, - {0x938b, 0x55}, - {0x938c, 0x00}, - {0x938d, 0x41}, - {0x5078, 0x01}, - {0x0112, 0x0a}, - {0x0113, 0x0a}, - {0x0114, 0x03}, - {0x0342, 0x11}, - {0x0343, 0xa0}, - {0x0340, 0x0d}, - {0x0341, 0xda}, - {0x3210, 0x00}, - {0x0344, 0x00}, - {0x0345, 0x00}, - {0x0346, 0x00}, - {0x0347, 0x00}, - {0x0348, 0x0f}, - {0x0349, 0xd7}, - {0x034a, 0x0b}, - {0x034b, 0xdf}, - {0x00e3, 0x00}, - {0x00e4, 0x00}, - {0x00e5, 0x01}, - {0x00fc, 0x0a}, - {0x00fd, 0x0a}, - {0x00fe, 0x0a}, - {0x00ff, 0x0a}, - {0xe013, 0x00}, - {0x0220, 0x00}, - {0x0221, 0x11}, - {0x0381, 0x01}, - {0x0383, 0x01}, - {0x0385, 0x01}, - {0x0387, 0x01}, - {0x0900, 0x00}, - {0x0901, 0x11}, - {0x0902, 0x00}, - {0x3140, 0x02}, - {0x3241, 0x11}, - {0x3250, 0x03}, - {0x3e10, 0x00}, - {0x3e11, 0x00}, - {0x3f0d, 0x00}, - {0x3f42, 0x00}, - {0x3f43, 0x00}, - {0x0401, 0x00}, - {0x0404, 0x00}, - {0x0405, 0x10}, - {0x0408, 0x00}, - {0x0409, 0x00}, - {0x040a, 0x00}, - {0x040b, 0x00}, - {0x040c, 0x0f}, - {0x040d, 0xd8}, - {0x040e, 0x0b}, - {0x040f, 0xe0}, - {0x034c, 0x0f}, - {0x034d, 0xd8}, - {0x034e, 0x0b}, - {0x034f, 0xe0}, - {0x0301, 0x05}, - {0x0303, 0x02}, - {0x0305, 0x04}, - {0x0306, 0x00}, - {0x0307, 0xc8}, - {0x0309, 0x0a}, - {0x030b, 0x01}, - {0x030d, 0x02}, - {0x030e, 0x01}, - {0x030f, 0x5e}, - {0x0310, 0x00}, - {0x0820, 0x12}, - {0x0821, 0xc0}, - {0x0822, 0x00}, - {0x0823, 0x00}, - {0x3e20, 0x01}, - {0x3e37, 0x00}, - {0x3f50, 0x00}, - {0x3f56, 0x00}, - {0x3f57, 0xe2}, - {0x3c0a, 0x5a}, - {0x3c0b, 0x55}, - {0x3c0c, 0x28}, - {0x3c0d, 0x07}, - {0x3c0e, 0xff}, - {0x3c0f, 0x00}, - {0x3c10, 0x00}, - {0x3c11, 0x02}, - {0x3c12, 0x00}, - {0x3c13, 0x03}, - {0x3c14, 0x00}, - {0x3c15, 0x00}, - {0x3c16, 0x0c}, - {0x3c17, 0x0c}, - {0x3c18, 0x0c}, - {0x3c19, 0x0a}, - {0x3c1a, 0x0a}, - {0x3c1b, 0x0a}, - {0x3c1c, 0x00}, - {0x3c1d, 0x00}, - {0x3c1e, 0x00}, - {0x3c1f, 0x00}, - {0x3c20, 0x00}, - {0x3c21, 0x00}, - {0x3c22, 0x3f}, - {0x3c23, 0x0a}, - {0x3e35, 0x01}, - {0x3f4a, 0x03}, - {0x3f4b, 0xbf}, - {0x3f26, 0x00}, - {0x0202, 0x0d}, - {0x0203, 0xc4}, - {0x0204, 0x00}, - {0x0205, 0x00}, - {0x020e, 0x01}, - {0x020f, 0x00}, - {0x0210, 0x01}, - {0x0211, 0x00}, - {0x0212, 0x01}, - {0x0213, 0x00}, - {0x0214, 0x01}, - {0x0215, 0x00}, - {0xbcf1, 0x00}, +static const struct cci_reg_sequence mode_4056x3040_regs[] =3D { + { CCI_REG8(0x0136), 0x18 }, + { CCI_REG8(0x0137), 0x00 }, + { CCI_REG8(0x3c7e), 0x08 }, + { CCI_REG8(0x3c7f), 0x02 }, + { CCI_REG8(0x38a8), 0x1f }, + { CCI_REG8(0x38a9), 0xff }, + { CCI_REG8(0x38aa), 0x1f }, + { CCI_REG8(0x38ab), 0xff }, + { CCI_REG8(0x55d4), 0x00 }, + { CCI_REG8(0x55d5), 0x00 }, + { CCI_REG8(0x55d6), 0x07 }, + { CCI_REG8(0x55d7), 0xff }, + { CCI_REG8(0x55e8), 0x07 }, + { CCI_REG8(0x55e9), 0xff }, + { CCI_REG8(0x55ea), 0x00 }, + { CCI_REG8(0x55eb), 0x00 }, + { CCI_REG8(0x575c), 0x07 }, + { CCI_REG8(0x575d), 0xff }, + { CCI_REG8(0x575e), 0x00 }, + { CCI_REG8(0x575f), 0x00 }, + { CCI_REG8(0x5764), 0x00 }, + { CCI_REG8(0x5765), 0x00 }, + { CCI_REG8(0x5766), 0x07 }, + { CCI_REG8(0x5767), 0xff }, + { CCI_REG8(0x5974), 0x04 }, + { CCI_REG8(0x5975), 0x01 }, + { CCI_REG8(0x5f10), 0x09 }, + { CCI_REG8(0x5f11), 0x92 }, + { CCI_REG8(0x5f12), 0x32 }, + { CCI_REG8(0x5f13), 0x72 }, + { CCI_REG8(0x5f14), 0x16 }, + { CCI_REG8(0x5f15), 0xba }, + { CCI_REG8(0x5f17), 0x13 }, + { CCI_REG8(0x5f18), 0x24 }, + { CCI_REG8(0x5f19), 0x60 }, + { CCI_REG8(0x5f1a), 0xe3 }, + { CCI_REG8(0x5f1b), 0xad }, + { CCI_REG8(0x5f1c), 0x74 }, + { CCI_REG8(0x5f2d), 0x25 }, + { CCI_REG8(0x5f5c), 0xd0 }, + { CCI_REG8(0x6a22), 0x00 }, + { CCI_REG8(0x6a23), 0x1d }, + { CCI_REG8(0x7ba8), 0x00 }, + { CCI_REG8(0x7ba9), 0x00 }, + { CCI_REG8(0x886b), 0x00 }, + { CCI_REG8(0x9002), 0x0a }, + { CCI_REG8(0x9004), 0x1a }, + { CCI_REG8(0x9214), 0x93 }, + { CCI_REG8(0x9215), 0x69 }, + { CCI_REG8(0x9216), 0x93 }, + { CCI_REG8(0x9217), 0x6b }, + { CCI_REG8(0x9218), 0x93 }, + { CCI_REG8(0x9219), 0x6d }, + { CCI_REG8(0x921a), 0x57 }, + { CCI_REG8(0x921b), 0x58 }, + { CCI_REG8(0x921c), 0x57 }, + { CCI_REG8(0x921d), 0x59 }, + { CCI_REG8(0x921e), 0x57 }, + { CCI_REG8(0x921f), 0x5a }, + { CCI_REG8(0x9220), 0x57 }, + { CCI_REG8(0x9221), 0x5b }, + { CCI_REG8(0x9222), 0x93 }, + { CCI_REG8(0x9223), 0x02 }, + { CCI_REG8(0x9224), 0x93 }, + { CCI_REG8(0x9225), 0x03 }, + { CCI_REG8(0x9226), 0x93 }, + { CCI_REG8(0x9227), 0x04 }, + { CCI_REG8(0x9228), 0x93 }, + { CCI_REG8(0x9229), 0x05 }, + { CCI_REG8(0x922a), 0x98 }, + { CCI_REG8(0x922b), 0x21 }, + { CCI_REG8(0x922c), 0xb2 }, + { CCI_REG8(0x922d), 0xdb }, + { CCI_REG8(0x922e), 0xb2 }, + { CCI_REG8(0x922f), 0xdc }, + { CCI_REG8(0x9230), 0xb2 }, + { CCI_REG8(0x9231), 0xdd }, + { CCI_REG8(0x9232), 0xe2 }, + { CCI_REG8(0x9233), 0xe1 }, + { CCI_REG8(0x9234), 0xb2 }, + { CCI_REG8(0x9235), 0xe2 }, + { CCI_REG8(0x9236), 0xb2 }, + { CCI_REG8(0x9237), 0xe3 }, + { CCI_REG8(0x9238), 0xb7 }, + { CCI_REG8(0x9239), 0xb9 }, + { CCI_REG8(0x923a), 0xb7 }, + { CCI_REG8(0x923b), 0xbb }, + { CCI_REG8(0x923c), 0xb7 }, + { CCI_REG8(0x923d), 0xbc }, + { CCI_REG8(0x923e), 0xb7 }, + { CCI_REG8(0x923f), 0xc5 }, + { CCI_REG8(0x9240), 0xb7 }, + { CCI_REG8(0x9241), 0xc7 }, + { CCI_REG8(0x9242), 0xb7 }, + { CCI_REG8(0x9243), 0xc9 }, + { CCI_REG8(0x9244), 0x98 }, + { CCI_REG8(0x9245), 0x56 }, + { CCI_REG8(0x9246), 0x98 }, + { CCI_REG8(0x9247), 0x55 }, + { CCI_REG8(0x9380), 0x00 }, + { CCI_REG8(0x9381), 0x62 }, + { CCI_REG8(0x9382), 0x00 }, + { CCI_REG8(0x9383), 0x56 }, + { CCI_REG8(0x9384), 0x00 }, + { CCI_REG8(0x9385), 0x52 }, + { CCI_REG8(0x9388), 0x00 }, + { CCI_REG8(0x9389), 0x55 }, + { CCI_REG8(0x938a), 0x00 }, + { CCI_REG8(0x938b), 0x55 }, + { CCI_REG8(0x938c), 0x00 }, + { CCI_REG8(0x938d), 0x41 }, + { CCI_REG8(0x5078), 0x01 }, + { CCI_REG8(0x0112), 0x0a }, + { CCI_REG8(0x0113), 0x0a }, + { CCI_REG8(0x0114), 0x03 }, + { CCI_REG8(0x0342), 0x11 }, + { CCI_REG8(0x0343), 0xa0 }, + { CCI_REG8(0x0340), 0x0d }, + { CCI_REG8(0x0341), 0xda }, + { CCI_REG8(0x3210), 0x00 }, + { CCI_REG8(0x0344), 0x00 }, + { CCI_REG8(0x0345), 0x00 }, + { CCI_REG8(0x0346), 0x00 }, + { CCI_REG8(0x0347), 0x00 }, + { CCI_REG8(0x0348), 0x0f }, + { CCI_REG8(0x0349), 0xd7 }, + { CCI_REG8(0x034a), 0x0b }, + { CCI_REG8(0x034b), 0xdf }, + { CCI_REG8(0x00e3), 0x00 }, + { CCI_REG8(0x00e4), 0x00 }, + { CCI_REG8(0x00e5), 0x01 }, + { CCI_REG8(0x00fc), 0x0a }, + { CCI_REG8(0x00fd), 0x0a }, + { CCI_REG8(0x00fe), 0x0a }, + { CCI_REG8(0x00ff), 0x0a }, + { CCI_REG8(0xe013), 0x00 }, + { CCI_REG8(0x0220), 0x00 }, + { CCI_REG8(0x0221), 0x11 }, + { CCI_REG8(0x0381), 0x01 }, + { CCI_REG8(0x0383), 0x01 }, + { CCI_REG8(0x0385), 0x01 }, + { CCI_REG8(0x0387), 0x01 }, + { CCI_REG8(0x0900), 0x00 }, + { CCI_REG8(0x0901), 0x11 }, + { CCI_REG8(0x0902), 0x00 }, + { CCI_REG8(0x3140), 0x02 }, + { CCI_REG8(0x3241), 0x11 }, + { CCI_REG8(0x3250), 0x03 }, + { CCI_REG8(0x3e10), 0x00 }, + { CCI_REG8(0x3e11), 0x00 }, + { CCI_REG8(0x3f0d), 0x00 }, + { CCI_REG8(0x3f42), 0x00 }, + { CCI_REG8(0x3f43), 0x00 }, + { CCI_REG8(0x0401), 0x00 }, + { CCI_REG8(0x0404), 0x00 }, + { CCI_REG8(0x0405), 0x10 }, + { CCI_REG8(0x0408), 0x00 }, + { CCI_REG8(0x0409), 0x00 }, + { CCI_REG8(0x040a), 0x00 }, + { CCI_REG8(0x040b), 0x00 }, + { CCI_REG8(0x040c), 0x0f }, + { CCI_REG8(0x040d), 0xd8 }, + { CCI_REG8(0x040e), 0x0b }, + { CCI_REG8(0x040f), 0xe0 }, + { CCI_REG8(0x034c), 0x0f }, + { CCI_REG8(0x034d), 0xd8 }, + { CCI_REG8(0x034e), 0x0b }, + { CCI_REG8(0x034f), 0xe0 }, + { CCI_REG8(0x0301), 0x05 }, + { CCI_REG8(0x0303), 0x02 }, + { CCI_REG8(0x0305), 0x04 }, + { CCI_REG8(0x0306), 0x00 }, + { CCI_REG8(0x0307), 0xc8 }, + { CCI_REG8(0x0309), 0x0a }, + { CCI_REG8(0x030b), 0x01 }, + { CCI_REG8(0x030d), 0x02 }, + { CCI_REG8(0x030e), 0x01 }, + { CCI_REG8(0x030f), 0x5e }, + { CCI_REG8(0x0310), 0x00 }, + { CCI_REG8(0x0820), 0x12 }, + { CCI_REG8(0x0821), 0xc0 }, + { CCI_REG8(0x0822), 0x00 }, + { CCI_REG8(0x0823), 0x00 }, + { CCI_REG8(0x3e20), 0x01 }, + { CCI_REG8(0x3e37), 0x00 }, + { CCI_REG8(0x3f50), 0x00 }, + { CCI_REG8(0x3f56), 0x00 }, + { CCI_REG8(0x3f57), 0xe2 }, + { CCI_REG8(0x3c0a), 0x5a }, + { CCI_REG8(0x3c0b), 0x55 }, + { CCI_REG8(0x3c0c), 0x28 }, + { CCI_REG8(0x3c0d), 0x07 }, + { CCI_REG8(0x3c0e), 0xff }, + { CCI_REG8(0x3c0f), 0x00 }, + { CCI_REG8(0x3c10), 0x00 }, + { CCI_REG8(0x3c11), 0x02 }, + { CCI_REG8(0x3c12), 0x00 }, + { CCI_REG8(0x3c13), 0x03 }, + { CCI_REG8(0x3c14), 0x00 }, + { CCI_REG8(0x3c15), 0x00 }, + { CCI_REG8(0x3c16), 0x0c }, + { CCI_REG8(0x3c17), 0x0c }, + { CCI_REG8(0x3c18), 0x0c }, + { CCI_REG8(0x3c19), 0x0a }, + { CCI_REG8(0x3c1a), 0x0a }, + { CCI_REG8(0x3c1b), 0x0a }, + { CCI_REG8(0x3c1c), 0x00 }, + { CCI_REG8(0x3c1d), 0x00 }, + { CCI_REG8(0x3c1e), 0x00 }, + { CCI_REG8(0x3c1f), 0x00 }, + { CCI_REG8(0x3c20), 0x00 }, + { CCI_REG8(0x3c21), 0x00 }, + { CCI_REG8(0x3c22), 0x3f }, + { CCI_REG8(0x3c23), 0x0a }, + { CCI_REG8(0x3e35), 0x01 }, + { CCI_REG8(0x3f4a), 0x03 }, + { CCI_REG8(0x3f4b), 0xbf }, + { CCI_REG8(0x3f26), 0x00 }, + { CCI_REG8(0x0202), 0x0d }, + { CCI_REG8(0x0203), 0xc4 }, + { CCI_REG8(0x0204), 0x00 }, + { CCI_REG8(0x0205), 0x00 }, + { CCI_REG8(0x020e), 0x01 }, + { CCI_REG8(0x020f), 0x00 }, + { CCI_REG8(0x0210), 0x01 }, + { CCI_REG8(0x0211), 0x00 }, + { CCI_REG8(0x0212), 0x01 }, + { CCI_REG8(0x0213), 0x00 }, + { CCI_REG8(0x0214), 0x01 }, + { CCI_REG8(0x0215), 0x00 }, + { CCI_REG8(0xbcf1), 0x00 }, }; /* Supported sensor mode configurations */ @@ -417,97 +410,6 @@ static inline struct imx412 *to_imx412(struct v4l2_sub= dev *subdev) return container_of(subdev, struct imx412, sd); } -/** - * imx412_read_reg() - Read registers. - * @imx412: pointer to imx412 device - * @reg: register address - * @len: length of bytes to read. Max supported bytes is 4 - * @val: pointer to register value to be filled. - * - * Return: 0 if successful, error code otherwise. - */ -static int imx412_read_reg(struct imx412 *imx412, u16 reg, u32 len, u32 *v= al) -{ - struct i2c_client *client =3D v4l2_get_subdevdata(&imx412->sd); - struct i2c_msg msgs[2] =3D {0}; - u8 addr_buf[2] =3D {0}; - u8 data_buf[4] =3D {0}; - int ret; - - if (WARN_ON(len > 4)) - return -EINVAL; - - put_unaligned_be16(reg, addr_buf); - - /* Write register address */ - msgs[0].addr =3D client->addr; - msgs[0].flags =3D 0; - msgs[0].len =3D ARRAY_SIZE(addr_buf); - msgs[0].buf =3D addr_buf; - - /* Read data from register */ - msgs[1].addr =3D client->addr; - msgs[1].flags =3D I2C_M_RD; - msgs[1].len =3D len; - msgs[1].buf =3D &data_buf[4 - len]; - - ret =3D i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); - if (ret !=3D ARRAY_SIZE(msgs)) - return -EIO; - - *val =3D get_unaligned_be32(data_buf); - - return 0; -} - -/** - * imx412_write_reg() - Write register - * @imx412: pointer to imx412 device - * @reg: register address - * @len: length of bytes. Max supported bytes is 4 - * @val: register value - * - * Return: 0 if successful, error code otherwise. - */ -static int imx412_write_reg(struct imx412 *imx412, u16 reg, u32 len, u32 v= al) -{ - struct i2c_client *client =3D v4l2_get_subdevdata(&imx412->sd); - u8 buf[6] =3D {0}; - - if (WARN_ON(len > 4)) - return -EINVAL; - - put_unaligned_be16(reg, buf); - put_unaligned_be32(val << (8 * (4 - len)), buf + 2); - if (i2c_master_send(client, buf, len + 2) !=3D len + 2) - return -EIO; - - return 0; -} - -/** - * imx412_write_regs() - Write a list of registers - * @imx412: pointer to imx412 device - * @regs: list of registers to be written - * @len: length of registers array - * - * Return: 0 if successful, error code otherwise. - */ -static int imx412_write_regs(struct imx412 *imx412, - const struct imx412_reg *regs, u32 len) -{ - unsigned int i; - int ret; - - for (i =3D 0; i < len; i++) { - ret =3D imx412_write_reg(imx412, regs[i].address, 1, regs[i].val); - if (ret) - return ret; - } - - return 0; -} - /** * imx412_update_controls() - Update control ranges based on streaming mode * @imx412: pointer to imx412 device @@ -543,29 +445,25 @@ static int imx412_update_controls(struct imx412 *imx4= 12, static int imx412_update_exp_gain(struct imx412 *imx412, u32 exposure, u32= gain) { u32 lpfr; - int ret; + int ret =3D 0; + int ret_hold; lpfr =3D imx412->vblank + imx412->cur_mode->height; dev_dbg(imx412->dev, "Set exp %u, analog gain %u, lpfr %u\n", exposure, gain, lpfr); - ret =3D imx412_write_reg(imx412, IMX412_REG_HOLD, 1, 1); - if (ret) - return ret; + cci_write(imx412->cci, IMX412_REG_HOLD, 1, &ret); - ret =3D imx412_write_reg(imx412, IMX412_REG_LPFR, 2, lpfr); - if (ret) - goto error_release_group_hold; + cci_write(imx412->cci, IMX412_REG_LPFR, lpfr, &ret); - ret =3D imx412_write_reg(imx412, IMX412_REG_EXPOSURE_CIT, 2, exposure); - if (ret) - goto error_release_group_hold; + cci_write(imx412->cci, IMX412_REG_EXPOSURE_CIT, exposure, &ret); - ret =3D imx412_write_reg(imx412, IMX412_REG_AGAIN, 2, gain); + cci_write(imx412->cci, IMX412_REG_AGAIN, gain, &ret); -error_release_group_hold: - imx412_write_reg(imx412, IMX412_REG_HOLD, 1, 0); + ret_hold =3D cci_write(imx412->cci, IMX412_REG_HOLD, 0, NULL); + if (ret_hold) + return ret_hold; return ret; } @@ -800,8 +698,8 @@ static int imx412_start_streaming(struct imx412 *imx412) /* Write sensor mode registers */ reg_list =3D &imx412->cur_mode->reg_list; - ret =3D imx412_write_regs(imx412, reg_list->regs, - reg_list->num_of_regs); + ret =3D cci_multi_reg_write(imx412->cci, reg_list->regs, + reg_list->num_of_regs, NULL); if (ret) { dev_err(imx412->dev, "fail to write initial registers\n"); return ret; @@ -818,8 +716,8 @@ static int imx412_start_streaming(struct imx412 *imx412) usleep_range(7400, 8000); /* Start streaming */ - ret =3D imx412_write_reg(imx412, IMX412_REG_MODE_SELECT, - 1, IMX412_MODE_STREAMING); + ret =3D cci_write(imx412->cci, IMX412_REG_MODE_SELECT, + IMX412_MODE_STREAMING, NULL); if (ret) { dev_err(imx412->dev, "fail to start streaming\n"); return ret; @@ -836,8 +734,8 @@ static int imx412_start_streaming(struct imx412 *imx412) */ static int imx412_stop_streaming(struct imx412 *imx412) { - return imx412_write_reg(imx412, IMX412_REG_MODE_SELECT, - 1, IMX412_MODE_STANDBY); + return cci_write(imx412->cci, IMX412_REG_MODE_SELECT, + IMX412_MODE_STANDBY, NULL); } /** @@ -888,16 +786,18 @@ static int imx412_set_stream(struct v4l2_subdev *sd, = int enable) static int imx412_detect(struct imx412 *imx412) { int ret; - u32 val; + u64 val; - ret =3D imx412_read_reg(imx412, IMX412_REG_ID, 2, &val); + ret =3D cci_read(imx412->cci, IMX412_REG_ID, &val, NULL); if (ret) - return ret; + return dev_err_probe(imx412->dev, ret, + "failed to read chip id %x\n", + IMX412_ID); if (val !=3D IMX412_ID) { - dev_err(imx412->dev, "chip id mismatch: %x!=3D%x\n", - IMX412_ID, val); - return -ENXIO; + return dev_err_probe(imx412->dev, -ENODEV, + "chip id mismatch: %x!=3D%llx", + IMX412_ID, val); } return 0; @@ -1180,6 +1080,11 @@ static int imx412_probe(struct i2c_client *client) if (!name) return -ENODEV; + imx412->cci =3D devm_cci_regmap_init_i2c(client, 16); + if (IS_ERR(imx412->cci)) + return dev_err_probe(imx412->dev, PTR_ERR(imx412->cci), + "Failed to init CCI\n"); + /* Initialize subdev */ v4l2_i2c_subdev_init(&imx412->sd, client, &imx412_subdev_ops); imx412->sd.internal_ops =3D &imx412_internal_ops; -- 2.34.1 From nobody Tue Apr 7 04:21:19 2026 Received: from MA0PR01CU012.outbound.protection.outlook.com (mail-southindiaazon11021142.outbound.protection.outlook.com [40.107.57.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F11483859C2; Mon, 16 Mar 2026 09:01:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.57.142 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773651713; cv=fail; b=W6KOtmL9ROaN2/HoOKv0CaXpQPAgyB1bg3yPkVdFZ/6SeIVk65zaQ8JRnkwVeU5x3yIDjA7yAX7m1TdS0KHH6J0xuhyoXSDDhTSvn8dBgEqq3xFJODe318RRXFCo26/sKBpyvW4RGNtpSB7LaVXiJ1thZ8udT2nj2jo2VWMsr6c= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773651713; c=relaxed/simple; bh=eyOQ4ANMl9YL8LxvR27HC3Ja7/KiOICbDH6MylCRQ9U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Content-Type:MIME-Version; b=ObaCVu57AzhQxvIXzyjGrX7/O1LRJNmq80HLMuxNMc4hqgs0+abfwf+3gcOq3/QYkGMUClqjaJ7g9AjugU2PWYQs4ZCmbDp9c899CfM1oCYXZP6n9+0wukq2VGYREEZxui+ojphizWJ/h8NmO7RdXjQhJlCF+qTbpuuWSCN30AQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=siliconsignals.io; spf=pass smtp.mailfrom=siliconsignals.io; dkim=pass (2048-bit key) header.d=siliconsignals.io header.i=@siliconsignals.io header.b=YdPnyj1i; arc=fail smtp.client-ip=40.107.57.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=siliconsignals.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=siliconsignals.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siliconsignals.io header.i=@siliconsignals.io header.b="YdPnyj1i" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=AP+tdr9W2TDs8tluzxzoH6HoArb9ozb4ZjFPeyP0f8VfgLpq7Jedin1uCzLztkf6CDJ9KlmF9uOeWhLBnT0YIJKhnAtUI7bohqhMQnO1q2EifCU3fSi5gqwWKB3tEiqfenMv2nUqsmTMnMaZ/BZ4HNMcbV/6ojUUREPFmwnkIDClzAQg1WRp0i8OImjjp3u+ww2c9QrLqlCFZgQLPAUQriQuoeBIAxDP4sdOqO+nIv+JT0sJWqClZWimwdQBot230qLbjiXFXt8MmreVi9WNLMePFQb16d5oiJlO+qSwN7nXOF3d3etLarfHi3aTiF5oyKDV8pVCCgV+7c4+S8ZVUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ZRcFtKNMbHTatdlHDZ4z4Uz7p75c+D3k+i/x9gZzjA4=; b=dDCG4mux0VPhfzMYoivpbQocOmr0a/oNP02LS2MoOZn3shVBWd+uvLb+KILhCFXS/zyGNmYKBWD9tyHCOHgdvbWv8/W09hNfNxQc3HWsee/ydnj4Rc7w2H4UFoXdsqghIz7/GMbQ7rDPUmd1miQPgIbuVRntiuFxNtR5XVNKQfR5rzexiTzo0XiTGshvkPLe6Bn+oTnbABHTIp8WJvB44lmWHvzw8+tmBFTLXkNHZikae7lLGoxbzidHZ/GgnNT9XQFyYfw00J4jkcH8xpXLsNddXLb7g32/SbCzDs1YlmmyLiWNv4r8bgNDWn5CA2gW3T6mwEmDuOzK7oADnEbuqA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=siliconsignals.io; dmarc=pass action=none header.from=siliconsignals.io; dkim=pass header.d=siliconsignals.io; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=siliconsignals.io; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZRcFtKNMbHTatdlHDZ4z4Uz7p75c+D3k+i/x9gZzjA4=; b=YdPnyj1iDvI/AsIzjSIwKXRUAqUIL9GijpGXJDyJbsYAn6dP3XtNBTPrsblK5mMeEVR7Z3UiL4zUb9M2XmiOH8tDD7QFZI618OEOhpPEjBXOt2jVdNOkdxWuqaK3CZmQ9LeQx7xbRraFT5aTlha9u9to/UgqPA0hJPr/EopDDS5KEvL2ZKht75X+fs/NKBwrCv5hK+YCh03QD+mfRdg6e+z3EWcS6VCLRv6lUuf6faLqx2z3xh83UosJKO09V+Zj9ZYT2SK0lOhkD51Ks+nEOLxicVZ4qL4RvBzSFsqBsqS/IeBCw3kYt+Y4pVfRW1eZoPHUkk8qk7Xm/c4oA+qzxQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=siliconsignals.io; Received: from MA0P287MB2178.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:11e::14) by PN3P287MB1479.INDP287.PROD.OUTLOOK.COM (2603:1096:c01:1a3::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9700.24; Mon, 16 Mar 2026 09:01:47 +0000 Received: from MA0P287MB2178.INDP287.PROD.OUTLOOK.COM ([fe80::f8da:c075:cde1:e167]) by MA0P287MB2178.INDP287.PROD.OUTLOOK.COM ([fe80::f8da:c075:cde1:e167%4]) with mapi id 15.20.9700.022; Mon, 16 Mar 2026 09:01:47 +0000 From: Elgin Perumbilly To: sakari.ailus@linux.intel.com, linux-media@vger.kernel.org Cc: tarang.raval@siliconsignals.io, Elgin Perumbilly , Mauro Carvalho Chehab , Hans Verkuil , Hans de Goede , Vladimir Zapolskiy , Mehdi Djait , Laurent Pinchart , Xiaolei Wang , Sylvain Petinot , Benjamin Mugnier , Heimir Thor Sverrisson , linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] media: i2c: imx412: Switch to using the sub-device state lock Date: Mon, 16 Mar 2026 14:30:55 +0530 Message-Id: <20260316090059.121605-3-elgin.perumbilly@siliconsignals.io> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260316090059.121605-1-elgin.perumbilly@siliconsignals.io> References: <20260316090059.121605-1-elgin.perumbilly@siliconsignals.io> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: BM1PR01CA0165.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:68::35) To MA0P287MB2178.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:11e::14) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MA0P287MB2178:EE_|PN3P287MB1479:EE_ X-MS-Office365-Filtering-Correlation-Id: 9b7834c1-df33-46d6-0578-08de833aa79a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|7416014|376014|366016|1800799024|18002099003|22082099003|56012099003|38350700014; X-Microsoft-Antispam-Message-Info: RhpI7f4GyycU3YVgJCIHLVKbRjKdWrOeDuGhd4kKXhpBoCUJO8J1IQt4r8BijpvXV4ZIKBlz04CR28msXaS1NedRljXJx2RBGgeC+wurxOuo41joCpXIaazZbkcOfS0IxMqiH4BZBicF0SgOehPup7sAAhUVUGkJbLNnDnMC92KCpSMbySFc9kglsPind/hDuN8Qge6mz+V/E6d1bngrylwvgp4qD7/NqGPLzDIGToj5agv5jCXORWIoDI3LR1AtOGbHKDFso3YYtdYGGCHqdXh6gdZ9JSXw12hRXwfQe7m5NjCyaBptjvdsT36fRsumBiYZRPR0HO5WDmA6wtBz1vn34QrKZltVWHMogmYlD6ITE1wDaYSpARoD0EdwA3dcdzGVvOyzcAIVVHwPsj98C8jRFRJIu2UImfK1L9Lf+hQhD2aGGcBRBCpkYirDH01KhyvgvVr4ZRhs7VmUiQCCrBPpezl2fqnaMdthl0rfPA105VUQdyIwj6b3MwqYKqQxiReoHGJksIfIkqZqYGDZP3LxJt5ac0XXjUQRce3q1XM6kERjwPFy4728FJL42etsmtW8Q7iO1ihq6uQrhxoK7wQDoT/LY0s3JULsc87tsL9M2SNy+BglAvR3fKg1C3fGBdY5ygGCAjy1QLQLykyUl6VXMdl8yu3UpF0/XvxVvrDoDnzhhPGHKLeemfsNEzplKUlGIq0pxAejGSezEkDA7ylDLzUXU8yRlmet07l5r6gtNTWizr8PCKAQEvxGy4RLkHLmNdkbKgSw12MwCulEstzdLSh2k+vpPmn6eZMAZxQ= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MA0P287MB2178.INDP287.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(52116014)(7416014)(376014)(366016)(1800799024)(18002099003)(22082099003)(56012099003)(38350700014);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?SVfgZiY9nu/hq0TEo2eYT3N46sAtW+XQyoiDoj0S7JGqWYZiiq0HYxP8cryS?= =?us-ascii?Q?Q3w+gK/yxc90XitTGvTI7BPLiPbPMRdXmFkUM/tdWBarOI40ep7htRGyka12?= =?us-ascii?Q?pQaPDTTjQ42PchxOSxKA0Hz/4Z6EM9hhp4aOi6LoWWOgGIqCsXN7G/UaLvHi?= =?us-ascii?Q?tXe8Chtl20JEWPS/ApBZU2kPHcw/RtQA9SGH4npnscAGSst2WWTU+FVBYm6E?= =?us-ascii?Q?nboWrlauMgl36ePmZXoT/YBfiDy9OJwqZjYFoGgWbygmJbbTRm/OGtmuz338?= =?us-ascii?Q?62R3DLR0EQ3tCn2xoLoJfyIWHo5nWsuru4Hp/zExbL4LSsDGKaRGBq9NAX+K?= =?us-ascii?Q?jKfrzs+ZX4gCC9VrDBlht8sVHHSIsemHowyQrOB+nsVAx3eGszOryclZi2Nb?= =?us-ascii?Q?+5IDW4uU292zMNn223OeyxkN4JDVpWnzlWT/R9Ue+dKdLZYR3Vk4YZ3qjLvF?= =?us-ascii?Q?VB3H35i8NRKVrx6AciloXnIU841Ehz4ezIorvcT3RXfuR5qvR16fZjEcUzKM?= =?us-ascii?Q?lRrTj/H9SmiITST1Ev6e8PPi0r2OWu8yAzSo2sY4S/MI4olM9Wj8ojzFXaLh?= =?us-ascii?Q?kpxB9W+vAVw3dmB0nQ5rLRjzPdcWJ9kIxaJEl9Npkkp69Iv0b8eYP0N2/JNy?= =?us-ascii?Q?+adT7xsvsmAG5YnUirdmm3oB84RvLAvVTd8cforewytHYWdW44LED3RE256F?= =?us-ascii?Q?hc1+zfyBIb4dc8YpOCvkPWztH7e1n8wamrhFr5dqIbbN9KklpwEnEFHLKViq?= =?us-ascii?Q?D1yaikHJg/IfaGz+CF3G28snonR3j4pTqflSWqL/Sfn/c8t0oypb49W7fNw0?= =?us-ascii?Q?rX0kapmmOgqPHrFJgCSioLeKvxorwziVZ5cBC1xdJcpnBMJT5gzwfukxWOP7?= =?us-ascii?Q?Y2e7MdokPulHnigPX4y8WFhXC+Epu6R4n01/2WSVjOC76bR7ICgZlL76n6mX?= =?us-ascii?Q?Bml4CjhjaQnhqCHInEnTAT+90FDTJRR2P2kn66XzEpu7lsno7ao5D51EtCSI?= =?us-ascii?Q?Vtu3oFowQFzTiEFkBrz1IEIzmA7vcI8QsW+Q8hpH+YcLY/jYH2UnHPXimDD+?= =?us-ascii?Q?ah/yEB+ni5JbDE0CcYSrZPR0fzfiXOLtlvVTTVjl62jfDrFrrMmACv/mEUQq?= =?us-ascii?Q?FJE7MNSERBBKhqFrWoqjr3n8HDykgXIONZjozVmpfRFDcryeRdS4PCv5A7k0?= =?us-ascii?Q?/bH6841FaOhTkObcrlv5pfIvUcnS/Z80ntyEImuv5bHzx9jhp8DXbMQgYOzp?= =?us-ascii?Q?sQR7bBUPOIEC4E6He21iIEx6L6SkYgbKTd7UdeLGN2niOBZMnsSNJ7Fnu/gA?= =?us-ascii?Q?R6srBDlEs4fCOw+qykGsbqSUKpNcltyilSJLTMLbynCkd9jEF9YBLO3Z7A1Y?= =?us-ascii?Q?wshlRnhX4mWzxo6Emtb7RC7VUm5syWGgGOVmO+RibaZU0nmRxOJM0BBhjFic?= =?us-ascii?Q?iOBwI3i/j2QKK0KpZO0fJJbe9S9GsIFczYpm1VxjsnIugKIcuYLZjlpJxu/E?= =?us-ascii?Q?e+HkiDqEG9htjYVsMkMFvU0BJNmCQCLL4UYd/tZc6IJoZaPP8k7CQReivKUc?= =?us-ascii?Q?S4X0W8gSx0a8Paw0mxIszgBDoHR/wYQC3AfVVMLgZ4gr3UqDJGzApc6J/lkm?= =?us-ascii?Q?7I72sfh+gtaalHnYkBHkLX/kdDMJR39Ts2/baU+pokrHwDidLiqTHoYdQuln?= =?us-ascii?Q?NBUUIlDKrvmlja2/4qiIiLmoRIaqAgsq9rvU73/wax4Ece9a8t0CDi4ndB3c?= =?us-ascii?Q?2QeSUWqa8HRZJdyIx7g9HaXxtIdvlQA=3D?= X-OriginatorOrg: siliconsignals.io X-MS-Exchange-CrossTenant-Network-Message-Id: 9b7834c1-df33-46d6-0578-08de833aa79a X-MS-Exchange-CrossTenant-AuthSource: MA0P287MB2178.INDP287.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2026 09:01:47.7559 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 7ec5089e-a433-4bd1-a638-82ee62e21d37 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 46YWXwIHFCAZQiRMcogSe22HBAnz6VnQzqdaKBxuxWrJnfcxKbCZLiZI1dAVicA7jpbK+P+ICZ+ewPr8FZJQ+9E2ScfLRjGYhSZKyCn2uQC/17Of2YMXr8lp+YrjijVl X-MS-Exchange-Transport-CrossTenantHeadersStamped: PN3P287MB1479 Content-Type: text/plain; charset="utf-8" Switch to using the sub-device state lock and properly call v4l2_subdev_init_finalize() / v4l2_subdev_cleanup() on probe() / remove(). Signed-off-by: Elgin Perumbilly Reviewed-by: Tarang Raval --- drivers/media/i2c/imx412.c | 53 +++++++++++++++++--------------------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/drivers/media/i2c/imx412.c b/drivers/media/i2c/imx412.c index 13d6fe79dcf7..42440bc5e0f3 100644 --- a/drivers/media/i2c/imx412.c +++ b/drivers/media/i2c/imx412.c @@ -118,7 +118,6 @@ static const char * const imx412_supply_names[] =3D { * @again_ctrl: Pointer to analog gain control * @vblank: Vertical blanking in lines * @cur_mode: Pointer to current selected sensor mode - * @mutex: Mutex for serializing sensor controls */ struct imx412 { struct device *dev; @@ -140,7 +139,6 @@ struct imx412 { }; u32 vblank; const struct imx412_mode *cur_mode; - struct mutex mutex; }; static const s64 link_freq[] =3D { @@ -613,8 +611,6 @@ static int imx412_get_pad_format(struct v4l2_subdev *sd, { struct imx412 *imx412 =3D to_imx412(sd); - mutex_lock(&imx412->mutex); - if (fmt->which =3D=3D V4L2_SUBDEV_FORMAT_TRY) { struct v4l2_mbus_framefmt *framefmt; @@ -624,8 +620,6 @@ static int imx412_get_pad_format(struct v4l2_subdev *sd, imx412_fill_pad_format(imx412, imx412->cur_mode, fmt); } - mutex_unlock(&imx412->mutex); - return 0; } @@ -645,8 +639,6 @@ static int imx412_set_pad_format(struct v4l2_subdev *sd, const struct imx412_mode *mode; int ret =3D 0; - mutex_lock(&imx412->mutex); - mode =3D &supported_mode; imx412_fill_pad_format(imx412, mode, fmt); @@ -661,8 +653,6 @@ static int imx412_set_pad_format(struct v4l2_subdev *sd, imx412->cur_mode =3D mode; } - mutex_unlock(&imx412->mutex); - return ret; } @@ -748,9 +738,10 @@ static int imx412_stop_streaming(struct imx412 *imx412) static int imx412_set_stream(struct v4l2_subdev *sd, int enable) { struct imx412 *imx412 =3D to_imx412(sd); + struct v4l2_subdev_state *state; int ret; - mutex_lock(&imx412->mutex); + state =3D v4l2_subdev_lock_and_get_active_state(sd); if (enable) { ret =3D pm_runtime_resume_and_get(imx412->dev); @@ -765,14 +756,14 @@ static int imx412_set_stream(struct v4l2_subdev *sd, = int enable) pm_runtime_put(imx412->dev); } - mutex_unlock(&imx412->mutex); + v4l2_subdev_unlock_state(state); return 0; error_power_off: pm_runtime_put(imx412->dev); error_unlock: - mutex_unlock(&imx412->mutex); + v4l2_subdev_unlock_state(state); return ret; } @@ -991,9 +982,6 @@ static int imx412_init_controls(struct imx412 *imx412) if (ret) return ret; - /* Serialize controls with sensor device */ - ctrl_hdlr->lock =3D &imx412->mutex; - /* Initialize exposure and gain */ lpfr =3D mode->vblank + mode->height; imx412->exp_ctrl =3D v4l2_ctrl_new_std(ctrl_hdlr, @@ -1095,13 +1083,10 @@ static int imx412_probe(struct i2c_client *client) return ret; } - mutex_init(&imx412->mutex); - ret =3D imx412_power_on(imx412->dev); - if (ret) { - dev_err(imx412->dev, "failed to power-on the sensor\n"); - goto error_mutex_destroy; - } + if (ret) + return dev_err_probe(imx412->dev, ret, + "failed to power-on the sensor\n"); /* Check module identity */ ret =3D imx412_detect(imx412); @@ -1134,27 +1119,37 @@ static int imx412_probe(struct i2c_client *client) goto error_handler_free; } - ret =3D v4l2_async_register_subdev_sensor(&imx412->sd); + imx412->sd.state_lock =3D imx412->ctrl_handler.lock; + ret =3D v4l2_subdev_init_finalize(&imx412->sd); if (ret < 0) { - dev_err(imx412->dev, - "failed to register async subdev: %d\n", ret); + dev_err_probe(imx412->dev, ret, "subdev init error\n"); goto error_media_entity; } pm_runtime_set_active(imx412->dev); pm_runtime_enable(imx412->dev); + + ret =3D v4l2_async_register_subdev_sensor(&imx412->sd); + if (ret < 0) { + dev_err_probe(imx412->dev, ret, + "failed to register sub-device\n"); + goto error_subdev_cleanup; + } + pm_runtime_idle(imx412->dev); return 0; +error_subdev_cleanup: + v4l2_subdev_cleanup(&imx412->sd); + pm_runtime_disable(imx412->dev); + pm_runtime_set_suspended(imx412->dev); error_media_entity: media_entity_cleanup(&imx412->sd.entity); error_handler_free: v4l2_ctrl_handler_free(imx412->sd.ctrl_handler); error_power_off: imx412_power_off(imx412->dev); -error_mutex_destroy: - mutex_destroy(&imx412->mutex); return ret; } @@ -1168,9 +1163,9 @@ static int imx412_probe(struct i2c_client *client) static void imx412_remove(struct i2c_client *client) { struct v4l2_subdev *sd =3D i2c_get_clientdata(client); - struct imx412 *imx412 =3D to_imx412(sd); v4l2_async_unregister_subdev(sd); + v4l2_subdev_cleanup(sd); media_entity_cleanup(&sd->entity); v4l2_ctrl_handler_free(sd->ctrl_handler); @@ -1178,8 +1173,6 @@ static void imx412_remove(struct i2c_client *client) if (!pm_runtime_status_suspended(&client->dev)) imx412_power_off(&client->dev); pm_runtime_set_suspended(&client->dev); - - mutex_destroy(&imx412->mutex); } static const struct dev_pm_ops imx412_pm_ops =3D { -- 2.34.1 From nobody Tue Apr 7 04:21:19 2026 Received: from PNZPR01CU001.outbound.protection.outlook.com (mail-centralindiaazon11021084.outbound.protection.outlook.com [40.107.51.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4EAE38425F; Mon, 16 Mar 2026 09:01:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.51.84 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773651720; cv=fail; b=BaiGKwQPzdkHQUez3bGGiLlhUiYYVJtwFsP/Q5dVohXQWOq3fwn2lZWmGBut1HeSERcCufzhdGRKaTdPs4bCl5Hehar0wqVmyyGA/hmO6fFy6ujnx9vdOAuLC92NcQImL89nu4YfercoJVbxZbspijZaHown8kkQYf9JrTL4USk= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773651720; c=relaxed/simple; bh=zmVu3HoqOWOZRssVicSi9TNDFrtMnOnibF4th8sRsFY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Content-Type:MIME-Version; b=oqbrAFuA5rSOxD/5xS9h3xrPyabOGEcL5EKRaIT7QJ82QYUxR6Rk/oWhv+0umXSHAesStl6crTyAVEbUD9i1XAbPxMXIgRQeZTGWpGDLiZ+H3vlBtEMnTX0ViVapzT6tw9DRbs5+6p10k29ANs1QsvW+eNzrfOOAt2PlTmjhFx0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=siliconsignals.io; spf=pass smtp.mailfrom=siliconsignals.io; dkim=pass (2048-bit key) header.d=siliconsignals.io header.i=@siliconsignals.io header.b=HuV52/Su; arc=fail smtp.client-ip=40.107.51.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=siliconsignals.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=siliconsignals.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siliconsignals.io header.i=@siliconsignals.io header.b="HuV52/Su" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=we79llDIq0h7Mt/Cn4z6t8PwrvODMSXLhIvPJxV1dBOqbIbvHChEiwKCSu0knwKDuON5yXy33qwpoXo+udemIp+y3zGeMxoY3+wkXuRoLSli9GhM3FbtCUUPGwY3Gb+ZARIN2RIyUL5R1gQJJucqQsCtmfwnMSQzcHsU6pf2saJm3bUOuor3j4+OO1/Om39+YHU6sYACoFE4Hp1jarU80hLxN3+kEihXb9afRdzIdAr7ctZSUsrdQgVqifQX5gnASVXapfLahi5DroXa4I0UjgyPE5uim1pXzmOHevXXrUtOz/HNhwMu2EPZVw+wCL2tgIh71eH5t7eQE4aqfD4t0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=C4gs4WUE9sj3BpaO9dtrd+soL3GgTjSlxaDedoBhzIE=; b=dAmkmuayXBbHegoyVGQ8SGNIyjbxOdIPTvyxxQPFWaqTuC7v/zBtP5LofIgBxZFQQ/CI4RCsMXCZDRtBzt8yKnbXKb+inaT/hKwdC7Z230FWqgsPk21L7cvhznAysN0tGyjxEDzgwBcJ8nG4JelDqFEwo2JcK0pjHbS9XgGAdaaYtN+93iLMPkP5vbiSpQ7sL9/WetsHyRGnKX7Jl6dPi8JwEIdWJWX//9bzrpntz3iEEyw6E5FP7ndyXOH0ju+YMmwFzDPD2uHRdL2IkWkwO3IK12ZyTXfjJdO8uBiWXT/monQOlw5IRnW+R2aWW/BMHKy4h8y835GUu/tiSBLsHA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=siliconsignals.io; dmarc=pass action=none header.from=siliconsignals.io; dkim=pass header.d=siliconsignals.io; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=siliconsignals.io; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=C4gs4WUE9sj3BpaO9dtrd+soL3GgTjSlxaDedoBhzIE=; b=HuV52/SuxtPNjXDC5oE7+7DOpePQ4eVZ0CH8BXQndqg7zK3T21cXjsdxPrpDA0eSDpg9XEdiNIYf2JFYn8V6xqijoYy/1sqjif2QDrhWIGB5aenQCfLqx2ipW5cooWk2+tor+PjrfKSljd7Xq7+gr59nJLj08PGTE5NeKYWHxeY7VrxMlfmUcyUPbhLjZeO3uNLZKrwl3k+Ye5IS2U0fs2iz4tZObL4rYL8zEcMdpINakF4s1jrYq1ox6PhQuif8MGj0azUUuDbMZ8vg/P+0zChZPSs7nS3S5aq2WYjT0o7lTZ+xSLNrBvpuEbOL8IVR31/1XN2COMD2craZZbfdTQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=siliconsignals.io; Received: from MA0P287MB2178.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:11e::14) by PN3P287MB1479.INDP287.PROD.OUTLOOK.COM (2603:1096:c01:1a3::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9700.24; Mon, 16 Mar 2026 09:01:55 +0000 Received: from MA0P287MB2178.INDP287.PROD.OUTLOOK.COM ([fe80::f8da:c075:cde1:e167]) by MA0P287MB2178.INDP287.PROD.OUTLOOK.COM ([fe80::f8da:c075:cde1:e167%4]) with mapi id 15.20.9700.022; Mon, 16 Mar 2026 09:01:55 +0000 From: Elgin Perumbilly To: sakari.ailus@linux.intel.com, linux-media@vger.kernel.org Cc: tarang.raval@siliconsignals.io, Elgin Perumbilly , Mauro Carvalho Chehab , Hans Verkuil , Hans de Goede , Vladimir Zapolskiy , Mehdi Djait , Laurent Pinchart , Xiaolei Wang , Sylvain Petinot , Benjamin Mugnier , Heimir Thor Sverrisson , linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] media: i2c: imx412: switch to {enable,disable}_streams Date: Mon, 16 Mar 2026 14:30:56 +0530 Message-Id: <20260316090059.121605-4-elgin.perumbilly@siliconsignals.io> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260316090059.121605-1-elgin.perumbilly@siliconsignals.io> References: <20260316090059.121605-1-elgin.perumbilly@siliconsignals.io> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: BM1PR01CA0165.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:68::35) To MA0P287MB2178.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:11e::14) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MA0P287MB2178:EE_|PN3P287MB1479:EE_ X-MS-Office365-Filtering-Correlation-Id: c1ad272a-cf10-455d-bb69-08de833aac69 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|7416014|376014|366016|1800799024|18002099003|22082099003|56012099003|38350700014; X-Microsoft-Antispam-Message-Info: D5goNTDzXtpxI7TqUxWK5Cut+mg2UVq86YReb6mz5t3k3NUOfRN7isq89haJdbyi68qHyvRb35BnCYpl4Xo97TO2D8bXImi4ICsjS9fMz8z5qovTtKxoP1tnWlKq3JLcxFZdnWjY4JVs2JqWpuOttMrZJCvKWxv18X9CgDHsJLUjvSpgOTvxB2ukBZ0VIDlGZNgp54oOQ5l06olayGRfxUKDlDYENe9/MrejMIjnq033+w6eNizqYAXs2lGnVzjM0f6zswWtr/PaguO8/EkzrqvKNp80oKgLZHL83leb/8iIZGwxu4soxvqW6lpl5McXToHHDDfjnYyq+PBMBbJAOtbFtZtuMsiIzyrVS/X1RWh+NwAWMdx0JbfzZzPjomPl25t1SKrJfcGvF/pK78FXTm+BR304DMq1xu+OxknPYwOuQyDnO+pkhPEJBr9FZPmNKDRuz0xqfIHsVdvB+Ro8MiagN4HU+kh/NA1XmWaSt8VDhUBoJCfG11E6cj4FLrzCG8kfkubwvDck3IZVESuvbaV9G1vDIPP6xAJvg3WyCI9487EV/NGccnfzB75vngSpTh9rficjXZShWxOEHpZmsxVmTjiMPD3uv3YCYsU6/CF9jdjIcqaf9SGYCn//F1fX2QdmcWVxf0lA6VRPMzFs3TsZU7EjDfjWxdTtX7f2AGKxVZVbx4hJFjjVFUDY1C/CvWwWk5xHR3Zh+ywRiktDa0F0xlonMaZsCCbLRU5Xo9K0rJEdFJvsO+LdDmQsY0GGZK9UU1kym0Lhp+IK5ooctR5VhwbabzaAp7dnn4YnyyY= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MA0P287MB2178.INDP287.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(52116014)(7416014)(376014)(366016)(1800799024)(18002099003)(22082099003)(56012099003)(38350700014);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?DMeBLGZncay/FbmlotRfF4R0vyUB91JEKV+NiFguMgbEZSlpeb0/5pNg4PYw?= =?us-ascii?Q?PH0wsaQj1NSst8Rn4rimhykk5JZRfUR8KOViOLMV0jOcHe8iEloTxV+qKjQv?= =?us-ascii?Q?owWPevDs8b3aj04oMQtFZt20gVagulMvyYSQRqE4LBXeK1OuEbZbUpCNqWtX?= =?us-ascii?Q?ZF8OW+p/g6x+T8pub5qD94X8TUL3N2XN1rmqs77ktqUtFTImgACi3lylj9h6?= =?us-ascii?Q?miWpNAighz/4/Ig42madSDaJ9/d55XgWBM+65jRu4CaT5sEbFkDOALpcrG05?= =?us-ascii?Q?oysOKAEZ7T0ahPiFdJmUraNTubOwJYsf1IFq+f6xkqvf1dVan5hVTc7gaq9I?= =?us-ascii?Q?J+pUNYjraSofTJlRGAdDbfPads/cmh6fBMe4QzYBh/P/CrWb0Q0fWhqPTl3p?= =?us-ascii?Q?E+A98UPcQ3IKQRcszP7QsyLADJWr8K3kUC59RoeekbZVXDR4tlOhEe17wR9w?= =?us-ascii?Q?av8+C2wLuMoq81XgGN5tsdm4DgwoNpP1ev4Yb2QM4PPyteOrT9Yu1DxsK6pz?= =?us-ascii?Q?hFn1YVtFmxwmd07fwQoE4lJofnfhUHITQAlyKiTaRDvQJS+/JZbuOT+/L7aI?= =?us-ascii?Q?OPrZU5AMMYftscOi0jFrfaQTgS/hlotek11ooB5EMVv5L/tdHL7TOU128t7G?= =?us-ascii?Q?QAIJkiieMK/L/qd2wOHZPMpSXTWFiho5fbMeqzB+H84YeBwjKHhKMS7dgmzy?= =?us-ascii?Q?V+t8o/9B77P8n3QHl2dwRycoAfPXAS3NAlYagH3vxJePNnCiegfdGIgiSl0D?= =?us-ascii?Q?ikiTjiluw9QkhSpnQAKwrXQkEZ/sqZLXpksacLBXN7grtxT1zOQDOq7/bwqt?= =?us-ascii?Q?uKi5En8EsxVyLtcQ6tSNC/QCryCp2oYQ1KC/gIVJWsWWSw/T0Skmb1vmdQ4D?= =?us-ascii?Q?9keonrQYftBbekF5qShOjj9M3g8REkDpgNpxW5CI2nM8l4qERFdOz5MwI8Cq?= =?us-ascii?Q?afpEgx4exhvW1d64PDb+/Kyp3NlWf3tAYGUx2j56h7WTgDp9YREZqE2mRB6T?= =?us-ascii?Q?ynZicc7E5Kkm+n2SA+5LS4gc02aX1qtKcruw6+xMGnzQN6ZOvuuzQk7lvYgC?= =?us-ascii?Q?bRuYrEPqeoBnxya10C8cp7CPPod1oOiQR9K0NF1IM05e0bodvmgqEetOOZZZ?= =?us-ascii?Q?McWOxEfmIiag24bEdQBYvME6di7v6o6DhEqipO0bIs0NeeIeNEifwPKJFbCU?= =?us-ascii?Q?hjlb2xqK+//r44/tACOrkvPzeDEi/eS7yX2KIyguKNsUQXJmlpFAWoGSATC1?= =?us-ascii?Q?BsZMJfuAHPV9MSKESxd2Z4tXlcq246G+FW5g1bD1QGkDJ+QuJlwBZZ66MXaY?= =?us-ascii?Q?yWhHYCNMYQBAy411R0bdhGd6IY/4UvALAEkRzPL70t8gC+mxRYFGS6TKem+4?= =?us-ascii?Q?ZpIUSI2TCBbbfzhskKZS3x2utkVkpKBya+wLUJefvnsPa0UnjXToOzETnHBX?= =?us-ascii?Q?zboklcf8O47lsp87orKj6oPuhiuhKSTLPf5P77xjZ2LUNqmey1o+fGGiN+Xk?= =?us-ascii?Q?BZhZQ06S6s7bzAdFbw7XvQbQyN1+U8uCOY/pYKXtg7t3Tzp4RMBxWR2xKjLH?= =?us-ascii?Q?EUqAXsXG1k6bCKjrK/XFpu9ltfIldD5FcaXm/8WQCZzH4wK7J1DX5uVB1Fkq?= =?us-ascii?Q?ggt/Xc+KE6BH4bjv5BAqQoIyzLOdQ6ECLbNctE/aPrdxiIbs3pXri0yWftJN?= =?us-ascii?Q?y5wIXRfeLIiMq5y0TTONTOslYfFxEzsW7XuAM8af6qatfDp8BqQuQ4/VDWNE?= =?us-ascii?Q?i/wfB9eH9GwltpioOAkoZzrVsRJ33PE=3D?= X-OriginatorOrg: siliconsignals.io X-MS-Exchange-CrossTenant-Network-Message-Id: c1ad272a-cf10-455d-bb69-08de833aac69 X-MS-Exchange-CrossTenant-AuthSource: MA0P287MB2178.INDP287.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2026 09:01:55.8627 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 7ec5089e-a433-4bd1-a638-82ee62e21d37 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jos8pQeRHKz3q+9flkQdiTyuH6lbmMl5XebioGFTXO4wxZYpBcW3BJr5qhsXkeniiU+xvAm8S0pgg/m2MrTPYE1HK+lKt/mMpLFuFj2g9tUOpiT10ujiEext23OFTD7n X-MS-Exchange-Transport-CrossTenantHeadersStamped: PN3P287MB1479 Content-Type: text/plain; charset="utf-8" Switch from s_stream to enable_streams and disable_streams callbacks. Signed-off-by: Elgin Perumbilly --- drivers/media/i2c/imx412.c | 80 +++++++++++++++++--------------------- 1 file changed, 36 insertions(+), 44 deletions(-) diff --git a/drivers/media/i2c/imx412.c b/drivers/media/i2c/imx412.c index 42440bc5e0f3..f922fb5cc47a 100644 --- a/drivers/media/i2c/imx412.c +++ b/drivers/media/i2c/imx412.c @@ -676,30 +676,40 @@ static int imx412_init_state(struct v4l2_subdev *sd, } /** - * imx412_start_streaming() - Start sensor stream - * @imx412: pointer to imx412 device + * imx412_enable_streams() - Enable specified streams for the sensor + * @sd: pointer to the V4L2 subdevice + * @state: pointer to the subdevice state + * @pad: pad number for which streams are enabled + * @streams_mask: bitmask specifying the streams to enable * * Return: 0 if successful, error code otherwise. */ -static int imx412_start_streaming(struct imx412 *imx412) +static int imx412_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + u32 pad, u64 streams_mask) { const struct imx412_reg_list *reg_list; + struct imx412 *imx412 =3D to_imx412(sd); int ret; + ret =3D pm_runtime_resume_and_get(imx412->dev); + if (ret < 0) + return ret; + /* Write sensor mode registers */ reg_list =3D &imx412->cur_mode->reg_list; ret =3D cci_multi_reg_write(imx412->cci, reg_list->regs, reg_list->num_of_regs, NULL); if (ret) { dev_err(imx412->dev, "fail to write initial registers\n"); - return ret; + goto err_rpm_put; } /* Setup handler will write actual exposure and gain */ ret =3D __v4l2_ctrl_handler_setup(imx412->sd.ctrl_handler); if (ret) { dev_err(imx412->dev, "fail to setup handler\n"); - return ret; + goto err_rpm_put; } /* Delay is required before streaming*/ @@ -710,62 +720,42 @@ static int imx412_start_streaming(struct imx412 *imx4= 12) IMX412_MODE_STREAMING, NULL); if (ret) { dev_err(imx412->dev, "fail to start streaming\n"); - return ret; + goto err_rpm_put; } return 0; -} -/** - * imx412_stop_streaming() - Stop sensor stream - * @imx412: pointer to imx412 device - * - * Return: 0 if successful, error code otherwise. - */ -static int imx412_stop_streaming(struct imx412 *imx412) -{ - return cci_write(imx412->cci, IMX412_REG_MODE_SELECT, - IMX412_MODE_STANDBY, NULL); +err_rpm_put: + pm_runtime_put(imx412->dev); + + return ret; } /** - * imx412_set_stream() - Enable sensor streaming - * @sd: pointer to imx412 subdevice - * @enable: set to enable sensor streaming + * imx412_disable_streams() - Enable specified streams for the sensor + * @sd: pointer to the V4L2 subdevice + * @state: pointer to the subdevice state + * @pad: pad number for which streams are disabled + * @streams_mask: bitmask specifying the streams to disable * * Return: 0 if successful, error code otherwise. */ -static int imx412_set_stream(struct v4l2_subdev *sd, int enable) +static int imx412_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + u32 pad, u64 streams_mask) { struct imx412 *imx412 =3D to_imx412(sd); - struct v4l2_subdev_state *state; int ret; - state =3D v4l2_subdev_lock_and_get_active_state(sd); - - if (enable) { - ret =3D pm_runtime_resume_and_get(imx412->dev); - if (ret) - goto error_unlock; - - ret =3D imx412_start_streaming(imx412); - if (ret) - goto error_power_off; - } else { - imx412_stop_streaming(imx412); - pm_runtime_put(imx412->dev); - } - - v4l2_subdev_unlock_state(state); + ret =3D cci_write(imx412->cci, IMX412_REG_MODE_SELECT, + IMX412_MODE_STANDBY, NULL); - return 0; + if (ret) + dev_err(imx412->dev, "failed to set stream off\n"); -error_power_off: pm_runtime_put(imx412->dev); -error_unlock: - v4l2_subdev_unlock_state(state); - return ret; + return 0; } /** @@ -882,7 +872,7 @@ static int imx412_parse_hw_config(struct imx412 *imx412) /* V4l2 subdevice ops */ static const struct v4l2_subdev_video_ops imx412_video_ops =3D { - .s_stream =3D imx412_set_stream, + .s_stream =3D v4l2_subdev_s_stream_helper, }; static const struct v4l2_subdev_pad_ops imx412_pad_ops =3D { @@ -890,6 +880,8 @@ static const struct v4l2_subdev_pad_ops imx412_pad_ops = =3D { .enum_frame_size =3D imx412_enum_frame_size, .get_fmt =3D imx412_get_pad_format, .set_fmt =3D imx412_set_pad_format, + .enable_streams =3D imx412_enable_streams, + .disable_streams =3D imx412_disable_streams, }; static const struct v4l2_subdev_ops imx412_subdev_ops =3D { -- 2.34.1