From nobody Tue Apr 7 06:15:13 2026 Received: from mta-64-225.siemens.flowmailer.net (mta-64-225.siemens.flowmailer.net [185.136.64.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8577279324 for ; Mon, 16 Mar 2026 07:05:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.225 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773644754; cv=none; b=qoVPS2bNz83l0bc9jOAtKVtRKkdXMeZ4ee7S04vjUW65J5YOBMEKfGZ6Xuq99YFMhxqHZ32wlGU9pqksnWHbbwyaRZM82FOyefKvdB48zHka5bXQr3OKPR9lHf67NYF1OVsOqGjiYZwXPKxHzXPkf9QeqNSwEkC5kNekBwAUBf8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773644754; c=relaxed/simple; bh=mU3EnCLp/bFBNlT0RunECJqGrJPRXHTVr6sTpYFK+Hg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jDS56iIF2mi7BKJHelJoW/9s1xkkwgwIoPtNSExdEobKOVrhfZQGY7eb+XmlOl7FOlUeY4QaCxkwK24ypPryFd+hNwOdrhBsaGHMGm7yscd9Y3w/rmBT852HhRwlgTXQQu6QuzsIM7Lv0C9i3tzQcFSZeJSm3Fa9BJ3aujxXecQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=alexander.sverdlin@siemens.com header.b=Em3apcim; arc=none smtp.client-ip=185.136.64.225 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=alexander.sverdlin@siemens.com header.b="Em3apcim" Received: by mta-64-225.siemens.flowmailer.net with ESMTPSA id 20260316070541eb21c2976800020733 for ; Mon, 16 Mar 2026 08:05:42 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=alexander.sverdlin@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=nCp2IUyZSG3Ta11plRL9Oe3OMExs/bvEcTbIRdbhTkU=; b=Em3apcim3nacc0cVwHG+50ghzpRjqkyScqAVHKOk86YY7Hss06CSOHMabwFWagDL1snWns DlKDyEtoKwKJyWT1kB8ojv2kT7rcMw327pJflYDVMTEBSGuUGgBTBj5nvSdJCVwmj3HEpA6v RCa2VobW1ob4KP8GJGF2V8P4QTQxtycpy54p6EtXrf9zsAqWUKT3pZSVYzzHOMrHvTVgRYZ7 TT6OLjx4svGPRomFz/OmLExK6yclk/xM+fJoloqbue0vgUO/zrxZg0CVn0HbXls6+Qah2Ilr hE7fCI5JtfnQgfzz7tnBCxb4v3x04tDtYq46Ic0Bg+JwRo2oo5G+Nlog==; From: "A. Sverdlin" To: linux-arm-kernel@lists.infradead.org Cc: Alexander Sverdlin , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Santosh Shilimkar , Andrew Davis , Jayesh Choudhary , Siddharth Vadapalli , Abraham I , Roger Quadros , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] arm64: dts: ti: k3-*: Add am64x and newer reset registers Date: Mon, 16 Mar 2026 08:04:24 +0100 Message-ID: <20260316070429.1545707-3-alexander.sverdlin@siemens.com> In-Reply-To: <20260316070429.1545707-1-alexander.sverdlin@siemens.com> References: <20260316070429.1545707-1-alexander.sverdlin@siemens.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-456497:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Alexander Sverdlin Add the reset registers present on AM64x and newer SoCs carrying reset cause information. Signed-off-by: Alexander Sverdlin --- Changelog: v2: no changes arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 5 +++++ arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 5 +++++ arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 5 +++++ 3 files changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/d= ts/ti/k3-am62-wakeup.dtsi index 75aed3a88284d..954130e8f37ba 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -41,6 +41,11 @@ usb1_phy_ctrl: syscon@4018 { compatible =3D "ti,am62-usb-phy-ctrl", "syscon"; reg =3D <0x4018 0x4>; }; + + rst@18170 { + compatible =3D "ti,am64-rst"; + reg =3D <0x18170 0x10>; + }; }; =20 target-module@2b300050 { diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/= dts/ti/k3-am62a-wakeup.dtsi index 23877dadc98dc..7c94e6e16c069 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi @@ -39,6 +39,11 @@ usb1_phy_ctrl: syscon@4018 { compatible =3D "ti,am62-usb-phy-ctrl", "syscon"; reg =3D <0x4018 0x4>; }; + + rst@18170 { + compatible =3D "ti,am64-rst"; + reg =3D <0x18170 0x10>; + }; }; =20 target-module@2b300050 { diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am64-main.dtsi index 1b1d3970888b8..acbc7243cb16a 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -74,6 +74,11 @@ epwm_tbclk: clock-controller@4130 { reg =3D <0x4130 0x4>; #clock-cells =3D <1>; }; + + rst@18170 { + compatible =3D "ti,am64-rst"; + reg =3D <0x18170 0x10>; + }; }; =20 gic500: interrupt-controller@1800000 { --=20 2.52.0