From nobody Tue Apr 7 06:19:27 2026 Received: from mta-64-227.siemens.flowmailer.net (mta-64-227.siemens.flowmailer.net [185.136.64.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38AEC349B1F for ; Mon, 16 Mar 2026 07:05:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.227 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773644755; cv=none; b=rvsjKS+VFjtK1MgEtRWxTEKrfjK+iekGkbHjXgzAQmHttsRudBWxR36a07jZ7dL/5Uw9JMZ3UB1KXelY+ZnREU1W2FmeaUi/19OtM3wv61L97+4GTtmthVtWjRf9GCx7cSLqXntogbBmrHr19wbTl01FHDebjCClnPKzMUcbGVs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773644755; c=relaxed/simple; bh=iKOTiWuxtHnqgEUoB0jQIio7TepUaLlC/w9x0+mrdqc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZbGnjQwQusKpf7uMC7hhLtBUByqaI3Ct3Fnp52QNDJVcDiF3hmpETT6PB/xX79FHzP2VIncl3ducapq8e2zwiBArdqZ4zjODPvcZVNNkV3/03Qg7DEfPpx2WYL0MlMXO4kTcQiZWaX20RjX6ARkWWysd6iL5HmiwBgapZpph06w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=alexander.sverdlin@siemens.com header.b=ZZ6lPJqc; arc=none smtp.client-ip=185.136.64.227 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=alexander.sverdlin@siemens.com header.b="ZZ6lPJqc" Received: by mta-64-227.siemens.flowmailer.net with ESMTPSA id 2026031607054178dbb5c584000207d3 for ; Mon, 16 Mar 2026 08:05:41 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=alexander.sverdlin@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=iMmUMDZrYnEz/CbNgCyWMh1qW53DcWwSxTsAKK1B7Rc=; b=ZZ6lPJqcW02dDWMMEConDNy30m9XX+2yRbXm/FA6paPKFtJuLlcUE2yknRPk50UXSgWbzt PSsEFLpLv4Ke8YS1zlKloV1KhGtlGrr8q9ruOrw9vbeTR5JhiRtNE5I/+MPQTgiO+HBiKlkf 1U6N8ohxdSLCp51tWs5WHoFdtqL2mCsKuFt/0n82kfP4f8vs6pReiMnsnc5w4HYQ95Og2Sj4 vqB9gKmq9SYOlEqsiBgu86D/rPO2PvTkYaDmLqzFlkSDHfH6KBxibyBaXhXNsVmWPphxkHrL iw8LilA8j0Y575oyve0V9/7RNOeLTjS/m4KoavWolrwLnE3ZUwPvzbTg==; From: "A. Sverdlin" To: linux-arm-kernel@lists.infradead.org Cc: Alexander Sverdlin , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Santosh Shilimkar , Andrew Davis , Jayesh Choudhary , Siddharth Vadapalli , Abraham I , Roger Quadros , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] dt-bindings: mfd: syscon: add binding for TI K3 platforms reset registers Date: Mon, 16 Mar 2026 08:04:23 +0100 Message-ID: <20260316070429.1545707-2-alexander.sverdlin@siemens.com> In-Reply-To: <20260316070429.1545707-1-alexander.sverdlin@siemens.com> References: <20260316070429.1545707-1-alexander.sverdlin@siemens.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-456497:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Alexander Sverdlin Add DT binding for Texas Instruments K3 Multicore SoC platforms reset registers present on AM64x and newer members of the K3 family and consist of the RST_CTRL, RST_STAT, RST_SRC and RST_MAGIC_WORD. The planned usage is to provide reset reason information. Signed-off-by: Alexander Sverdlin --- Changelog: v2: amended mfd/syscon.yaml instead of separate reset/ti,am64-rst.yaml Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + .../bindings/soc/ti/ti,j721e-system-controller.yaml | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentat= ion/devicetree/bindings/mfd/syscon.yaml index e57add2bacd30..564fcb153a688 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -240,6 +240,7 @@ properties: - ti,am62-usb-phy-ctrl - ti,am625-dss-oldi-io-ctrl - ti,am62p-cpsw-mac-efuse + - ti,am64-rst - ti,am654-dss-oldi-io-ctrl - ti,j784s4-acspcie-proxy-ctrl - ti,j784s4-pcie-ctrl diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-contr= oller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-contr= oller.yaml index f3bd0be3b279f..b8063548f50ad 100644 --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.y= aml +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.y= aml @@ -86,6 +86,12 @@ patternProperties: description: This is the DSS OLDI CTRL region. =20 + "^rst@[0-9a-f]+$": + type: object + $ref: /schemas/mfd/syscon.yaml# + description: + The node corresponding to SoC reset registers block. + required: - compatible - reg @@ -133,5 +139,10 @@ examples: compatible =3D "ti,j784s4-pcie-ctrl", "syscon"; reg =3D <0x4070 0x4>; }; + + rst@18170 { + compatible =3D "ti,am64-rst"; + reg =3D <0x18170 0x10>; + }; }; ... --=20 2.52.0