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Mon, 16 Mar 2026 20:10:59 +0100 (CET) Received: by jupiter.universe (Postfix, from userid 1000) id 9ECCA48002F; Mon, 16 Mar 2026 20:10:58 +0100 (CET) From: Sebastian Reichel Date: Mon, 16 Mar 2026 20:10:49 +0100 Subject: [PATCH v5 5/8] PCI: dw-rockchip: Add helper function for DDL indicator Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260316-rockchip-pcie-system-suspend-v5-5-5bb5ad37d643@collabora.com> References: <20260316-rockchip-pcie-system-suspend-v5-0-5bb5ad37d643@collabora.com> In-Reply-To: <20260316-rockchip-pcie-system-suspend-v5-0-5bb5ad37d643@collabora.com> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , Jingoo Han , Shawn Lin , Liam Girdwood , Mark Brown Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Remove code duplication and improve readability by introducing a new function to setup the DLL indicator. Signed-off-by: Sebastian Reichel --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/co= ntroller/dwc/pcie-dw-rockchip.c index 373ab897228b..8cb0040b4ae1 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -560,6 +560,16 @@ static void rockchip_pcie_set_controller_mode(struct r= ockchip_pcie *rockchip, u3 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_SET_MODE(mode), PCIE_CLIEN= T_GENERAL_CON); } =20 +static void rockchip_pcie_unmask_dll_indicator(struct rockchip_pcie *rockc= hip) +{ + u32 val; + + /* unmask DLL up/down indicator and hot reset/link-down reset */ + val =3D FIELD_PREP_WM16(PCIE_RDLH_LINK_UP_CHGED, 0) | + FIELD_PREP_WM16(PCIE_LINK_REQ_RST_NOT_INT, 0); + rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_MISC); +} + static int rockchip_pcie_configure_rc(struct rockchip_pcie *rockchip) { struct dw_pcie_rp *pp; @@ -581,7 +591,6 @@ static int rockchip_pcie_configure_ep(struct platform_d= evice *pdev, { struct device *dev =3D &pdev->dev; int irq, ret; - u32 val; =20 if (!IS_ENABLED(CONFIG_PCIE_ROCKCHIP_DW_EP)) return -ENODEV; @@ -621,10 +630,7 @@ static int rockchip_pcie_configure_ep(struct platform_= device *pdev, =20 pci_epc_init_notify(rockchip->pci.ep.epc); =20 - /* unmask DLL up/down indicator and hot reset/link-down reset */ - val =3D FIELD_PREP_WM16(PCIE_RDLH_LINK_UP_CHGED, 0) | - FIELD_PREP_WM16(PCIE_LINK_REQ_RST_NOT_INT, 0); - rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_MISC); + rockchip_pcie_unmask_dll_indicator(rockchip); =20 return ret; } --=20 2.51.0