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Sun, 15 Mar 2026 18:02:04 -0700 (PDT) From: Bryan O'Donoghue Date: Mon, 16 Mar 2026 01:02:03 +0000 Subject: [PATCH v10 3/7] dt-bindings: media: qcom,x1e80100-camss: Add support for combo-mode endpoints Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260316-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v10-3-fdfe984fe941@linaro.org> References: <20260316-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v10-0-fdfe984fe941@linaro.org> In-Reply-To: <20260316-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v10-0-fdfe984fe941@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Konrad Dybcio , Vladimir Zapolskiy , Bryan O'Donoghue Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Bryan O'Donoghue , Krzysztof Kozlowski , Christopher Obbard X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=E693FB2AABA36DE117AB6FB422713BB3A18DC83A Qualcomm CSI2 PHYs support a mode where two sensors may be attached to the one CSIPHY. When we have one endpoint we may have - DPHY 1, 2 or 4 data lanes + 1 clock lane - CPHY 3 wire data lane When we have two endpoints this indicates the special fixed combo-mode. - DPHY endpoint0 =3D> 2+1 and endpoint1 =3D> 1+1 data-lane/clock-lane combi= nation. Reviewed-by: Christopher Obbard Signed-off-by: Bryan O'Donoghue --- .../bindings/media/qcom,x1e80100-camss.yaml | 69 ++++++++++++++++++= ++-- 1 file changed, 65 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.ya= ml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml index 5442f981baebc..94a29f439ccf4 100644 --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml @@ -152,7 +152,8 @@ properties: $ref: /schemas/graph.yaml#/properties/ports =20 description: - CSI input ports. + CSI input ports. Supports either standard single sensor mode or + Qualcomm's combo mode with one sensor in 2x1 + 1x1 data-lane, clock-= lane mode. =20 patternProperties: "^port@[0-3]$": @@ -160,26 +161,86 @@ properties: unevaluatedProperties: false =20 description: - Input port for receiving CSI data from a CSIPHY. + Input port for receiving CSI data. =20 properties: - endpoint: + endpoint@0: $ref: video-interfaces.yaml# unevaluatedProperties: false =20 + description: + Endpoint for receiving a single sensor input (or first leg o= f combo). + properties: data-lanes: minItems: 1 - maxItems: 4 + maxItems: 4 # Base max allows 4 (for D-PHY) + + clock-lanes: + maxItems: 1 =20 bus-type: enum: - 1 # MEDIA_BUS_TYPE_CSI2_CPHY - 4 # MEDIA_BUS_TYPE_CSI2_DPHY =20 + endpoint@1: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + description: + Endpoint for receiving the second leg of a combo sensor inpu= t. + + properties: + data-lanes: + maxItems: 1 + + clock-lanes: + maxItems: 1 + + bus-type: + const: 4 # Combo is D-PHY specific + required: - data-lanes =20 + allOf: + # Case 1: Combo Mode (endpoint@1 is present) + # If endpoint@1 exists, we restrict endpoint@0 to 2 lanes (D-PHY= split) + - if: + required: + - endpoint@1 + then: + properties: + endpoint@0: + properties: + data-lanes: + minItems: 2 + maxItems: 2 + bus-type: + const: 4 + endpoint@1: + properties: + data-lanes: + minItems: 1 + maxItems: 1 + bus-type: + const: 4 + + # Case 2: Single Mode (endpoint@1 is missing) + # We explicitly allow up to 4 lanes here to cover the D-PHY use = case. + - if: + not: + required: + - endpoint@1 + then: + properties: + endpoint@0: + properties: + data-lanes: + minItems: 1 + maxItems: 4 + patternProperties: "^phy@[0-9a-f]+$": $ref: /schemas/phy/qcom,x1e80100-csi2-phy.yaml --=20 2.52.0