From nobody Tue Apr 7 06:14:31 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 958B831F995; Mon, 16 Mar 2026 03:00:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773630059; cv=none; b=h+3Xeur7ObvM8pdDgLA34FXsaDIl2gX29o6qwUdasqNbQaJ4LvwgPFmqVGj3do+2D/4RCRVCpsRckEYlxmwlUBbVb8OkTqQChLgh3dTVXtBZ/7P/RXy+rD7K3/1YjVHMEFVsfRgckPovjoqsiS3JLpGVBr1dqDSNmnwzAw8H2zo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773630059; c=relaxed/simple; bh=GZwwwE7oVnurHeVr7/W1QtASLg5VwPGmo5eS0xkT1dQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=A+b1xFtW17Co4KJ9+dERPHkV0RxEICUjimeL4v/dY5b9MXQMuGCQTT9eD7LYiXz/1rQDxgRmiZ97I1lVPefprZWINXd4EGlEMJu2pmT1yxSsYT8rdhgfTwa6P8NKmJKRta13L/jT+0B2ml8iKTLoqletb4Js25snPCwghTqCOqk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 16 Mar 2026 11:00:47 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 16 Mar 2026 11:00:47 +0800 From: Billy Tsai Date: Mon, 16 Mar 2026 11:00:46 +0800 Subject: [PATCH v2 1/3] iio: adc: Add battery channel definition for ADC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260316-adc-v2-1-21475a217b09@aspeedtech.com> References: <20260316-adc-v2-0-21475a217b09@aspeedtech.com> In-Reply-To: <20260316-adc-v2-0-21475a217b09@aspeedtech.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Joel Stanley , Andrew Jeffery CC: , , , , , Billy Tsai X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773630047; l=1666; i=billy_tsai@aspeedtech.com; s=20251118; h=from:subject:message-id; bh=GZwwwE7oVnurHeVr7/W1QtASLg5VwPGmo5eS0xkT1dQ=; b=IFn+eYF7YKhXYpsxr6TRY6l5rykGbuUz1/dNHl4P+K3JQJSNkaqETwX9Yq5iHieye0peTM/Ul 5SxvX+48YPxBmSR+VLIzfEl3p4ZAH2bivMJAPZPshz6se9Z9JfuGhjy X-Developer-Key: i=billy_tsai@aspeedtech.com; a=ed25519; pk=/A8qvgZ6CPfnwKgT6/+k+nvXOkN477MshEGJvVdzeeQ= Defines a constant for the battery sensing channel, typically the last channel of the ADC. Clarifies channel usage and improves code readability. Signed-off-by: Billy Tsai --- drivers/iio/adc/aspeed_adc.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index 4be44c524b4d..af9a95d31d81 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -72,6 +72,8 @@ #define ASPEED_ADC_BAT_SENSING_ENABLE BIT(13) #define ASPEED_ADC_CTRL_CHANNEL GENMASK(31, 16) #define ASPEED_ADC_CTRL_CHANNEL_ENABLE(ch) FIELD_PREP(ASPEED_ADC_CTRL_CHAN= NEL, BIT(ch)) +/* Battery sensing is typically on the last channel */ +#define ASPEED_ADC_BATTERY_CHANNEL 7 =20 #define ASPEED_ADC_INIT_POLLING_TIME 500 #define ASPEED_ADC_INIT_TIMEOUT 500000 @@ -285,7 +287,7 @@ static int aspeed_adc_read_raw(struct iio_dev *indio_de= v, =20 switch (mask) { case IIO_CHAN_INFO_RAW: - if (data->battery_sensing && chan->channel =3D=3D 7) { + if (data->battery_sensing && chan->channel =3D=3D ASPEED_ADC_BATTERY_CHA= NNEL) { adc_engine_control_reg_val =3D readl(data->base + ASPEED_REG_ENGINE_CONTROL); writel(adc_engine_control_reg_val | @@ -309,7 +311,7 @@ static int aspeed_adc_read_raw(struct iio_dev *indio_de= v, return IIO_VAL_INT; =20 case IIO_CHAN_INFO_OFFSET: - if (data->battery_sensing && chan->channel =3D=3D 7) + if (data->battery_sensing && chan->channel =3D=3D ASPEED_ADC_BATTERY_CHA= NNEL) *val =3D (data->cv * data->battery_mode_gain.mult) / data->battery_mode_gain.div; else --=20 2.34.1