From nobody Tue Apr 7 06:21:32 2026 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4AA82609C5 for ; Sun, 15 Mar 2026 13:43:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773582196; cv=none; b=JkTIPeGoPfozksjV+A+UkQTK4+YDW9+aQM5Y3+jcINHBT+L9AO7IBO/bKZQ+/Co79bQddbMcqwVd1XILdqkKGaZzvo3lnW+SZ4MpKJMlr8lBo7vRcDeRD6j0gI1YES/NUZ6VPgcTJy3HHuZXS++nBb8rPfTIt/pb5eh7zmadpQQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773582196; c=relaxed/simple; bh=qV1yMuwrTIkchvUDPYDLyE2bkW3himIbKKouZnbaxUU=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=q+wEkrK3075YJKcH0RH0mynTyW1BdUuWIoJePxvY/WLpMRd2aXjS5XSoOo6yM6ncSxbdi1gxTYCqWpR1JRc/+GTp5ZZmFYEGtBmsqtT98s5RP07IwC3N/EhwbEUeMgRfFICx3HqwXCJogFH1YFXcfWGOgqFntndH7Tekb73o59s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ThGqqeEy; arc=none smtp.client-ip=209.85.214.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ThGqqeEy" Received: by mail-pl1-f181.google.com with SMTP id d9443c01a7336-2b0484a6de4so3551135ad.3 for ; Sun, 15 Mar 2026 06:43:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773582195; x=1774186995; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=480mqwLmtEUdXj6IGWFUouNnjM+D+2n/aWYyEZDCGn4=; b=ThGqqeEy1uzrPC/M4AcvCnLBmKVpwPTzBNfogLqVzW8F9dppkV4Pjz0VYcDD6SUIZK H2FghBKAXhPLFJNtktnb9wNqHmbs6siLLBtf5h0ZfjzKQJK0PNANV9q2tI/7h+/js9rV oNDqVRT3QgTjJN8jOzi6TqxRgnkzRskvawzb42FsjAEYu385cHfp1+EChrFPAF69x07l 2OIFEmhof8arNf5rfGHlgg24HZwI3dfhURwGKL4Tz/03m0rBNHWdnlJxbzIJTFKydYCc ZMurQctmufYXoAlVII0HsdKZapEIIcO4ioGIkHIfeAQ8aVWsSkd0zAWmgdlpIqDxJMXg ggFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773582195; x=1774186995; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=480mqwLmtEUdXj6IGWFUouNnjM+D+2n/aWYyEZDCGn4=; b=gnR2Q4qFQV+kCe5/tHUnK4ni8C+pY8QS94NIF4tjs+NxPmzWoow6Ex/Qmn3HaEU5Il Mg3F5N3vUnLZrJZgitqxuc9ReMSyqwEEiC1uBWLAo/nVhGlejU8cPmMVV9MYy+zPDm0S JhkkNgU/12fy2ZWQrc2AMdj867rne8TPUU/x0vo2RIGEbVW0IoFWCCdAYNKqs8nMpnlC 2fzunGV7QVHq7MczOODkB2GmRR0oO6wc0gshY4wLeRz7UnGD0RBUL1yVF+TPU31Riams npHILwO9XX0JhKV4a7PSDoMSJMuigsm2T6dyaR9wT3a7QudXblaSgv3npFuq0rCn+f06 Yu3w== X-Forwarded-Encrypted: i=1; AJvYcCVsJHYl7HcEBFgY2nUlOgdXwk+4xrBAHN71TVDuOqY6ZrXf39fAqRMU4Fud3pLI+OeOh7OCxuqm4u92PQA=@vger.kernel.org X-Gm-Message-State: AOJu0YziR241HIjVYl78awVYjrS5LtyULCmvCN3NMbyhDWo+XKigqcv1 iWSak1PZcRnK8f6KwtojOmQbIviMSssyQ+rJcffa/o22bCV2vSObMMJU X-Gm-Gg: ATEYQzwaz9Cbt4QoCUr4/c+8FkUTIRskNZboI7IRMNkcRNxX7Cjf2IyBpFjo1jMifv0 gIHqp0WsXzwMXMFeAZb+LMP8bflNK3Bkxedo7s0sy12wVC4D6fkCD/tALUzmCaXBD7j0DDhjcLe 72n2XU3ciJq/Ty4SmP46L/ZjU2m1u15rOQ6g3HpFo94dh5xUk4frWNAc8YIFMrc8oSJ1CkljOrg uZKvhlX1x8cR6i+Q4T0NS5YzRGpdvMoE5OkfBeTDwIeC046kcGWm1PazyXpn+d2JD1aXiheKUnz uwqtZe/YbIPpxSBwq9VIz7hPIXsArFHSYyMlpI2viAaXbGlCNrad1Ra++7zUr03EwdiZi6k5MJM 2bE0pHI8PZaE609K4zAtapEdwE2NIP1xGk0fbCFCb/X6CaNdGyibTV81KVQNEqky1gNQ3BEkA+J cCVTVHsuLP+t5NKK4wUgDZm2RGaU5n8dKINYImcr1NCxJMwvE+9nwmpPhMedIwc0FJuRvWg7UVq i8h8TWNHyJ1wHyZcIJoHw== X-Received: by 2002:a17:902:f70a:b0:2ae:ba08:a48d with SMTP id d9443c01a7336-2aeca793aeamr91719335ad.0.1773582195001; Sun, 15 Mar 2026 06:43:15 -0700 (PDT) Received: from localhost.localdomain (124-218-201-66.cm.dynamic.apol.com.tw. [124.218.201.66]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2aece56cdf4sm101135625ad.8.2026.03.15.06.43.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Mar 2026 06:43:14 -0700 (PDT) From: "Lucien.Jheng" To: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ericwouds@gmail.com, frank-w@public-files.de, daniel@makrotopia.org, lucien.jheng@airoha.com, "Lucien.Jheng" Subject: [PATCH v1] net: phy: airoha: add AN8811HB MCU assert/deassert support Date: Sun, 15 Mar 2026 21:41:55 +0800 Message-Id: <20260315134155.142750-1-lucienzx159@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" AN8811HB requires the MCU to be held in reset before firmware loading and released afterwards via a dedicated PBUS register pair (0x5cf9f8 / 0x5cf9fc), accessed through the PHY-addr+8 MDIO bus node rather than the BUCKPBUS indirect path. Add __air_pbus_reg_write() as a low-level helper for this access, then implement an8811hb_mcu_assert() / _deassert() on top of it. Wire both into an8811hb_load_firmware() and en8811h_restart_mcu() so every firmware load or MCU restart on AN8811HB correctly sequences the reset control registers. Signed-off-by: Lucien Jheng --- drivers/net/phy/air_en8811h.c | 105 ++++++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/drivers/net/phy/air_en8811h.c b/drivers/net/phy/air_en8811h.c index 29ae73e65caa..d36e946aa224 100644 --- a/drivers/net/phy/air_en8811h.c +++ b/drivers/net/phy/air_en8811h.c @@ -170,6 +170,16 @@ #define AN8811HB_CLK_DRV_CKO_LDPWD BIT(13) #define AN8811HB_CLK_DRV_CKO_LPPWD BIT(14) =20 +#define AN8811HB_MCU_SW_RST 0x5cf9f8 +#define AN8811HB_MCU_SW_RST_HOLD BIT(16) +#define AN8811HB_MCU_SW_RST_RUN (BIT(16) | BIT(0)) +#define AN8811HB_MCU_SW_START 0x5cf9fc +#define AN8811HB_MCU_SW_START_EN BIT(16) + +/* MII register constants for PBUS access (PHY addr + 8) */ +#define AIR_PBUS_ADDR_HIGH 0x1c +#define AIR_PBUS_DATA_HIGH 0x10 + /* Led definitions */ #define EN8811H_LED_COUNT 3 =20 @@ -254,6 +264,36 @@ static int air_phy_write_page(struct phy_device *phyde= v, int page) return __phy_write(phydev, AIR_EXT_PAGE_ACCESS, page); } =20 +static int __air_pbus_reg_write(struct phy_device *phydev, + u32 pbus_reg, u32 pbus_data) +{ + struct mii_bus *bus =3D phydev->mdio.bus; + int pbus_addr =3D phydev->mdio.addr + 8; + int ret; + + ret =3D __mdiobus_write(bus, pbus_addr, AIR_EXT_PAGE_ACCESS, + upper_16_bits(pbus_reg)); + if (ret < 0) + return ret; + + ret =3D __mdiobus_write(bus, pbus_addr, AIR_PBUS_ADDR_HIGH, + (pbus_reg & GENMASK(15, 6)) >> 6); + if (ret < 0) + return ret; + + ret =3D __mdiobus_write(bus, pbus_addr, (pbus_reg & GENMASK(5, 2)) >> 2, + lower_16_bits(pbus_data)); + if (ret < 0) + return ret; + + ret =3D __mdiobus_write(bus, pbus_addr, AIR_PBUS_DATA_HIGH, + upper_16_bits(pbus_data)); + if (ret < 0) + return ret; + + return 0; +} + static int __air_buckpbus_reg_write(struct phy_device *phydev, u32 pbus_address, u32 pbus_data) { @@ -570,10 +610,65 @@ static int an8811hb_load_file(struct phy_device *phyd= ev, const char *name, return ret; } =20 +static int an8811hb_mcu_assert(struct phy_device *phydev) +{ + int ret; + + phy_lock_mdio_bus(phydev); + + ret =3D __air_pbus_reg_write(phydev, AN8811HB_MCU_SW_RST, + AN8811HB_MCU_SW_RST_HOLD); + if (ret < 0) + goto unlock; + + ret =3D __air_pbus_reg_write(phydev, AN8811HB_MCU_SW_START, 0); + if (ret < 0) + goto unlock; + + msleep(50); + phydev_info(phydev, "MCU asserted\n"); + +unlock: + phy_unlock_mdio_bus(phydev); + return ret; +} + +static int an8811hb_mcu_deassert(struct phy_device *phydev) +{ + int ret; + + phy_lock_mdio_bus(phydev); + + ret =3D __air_pbus_reg_write(phydev, AN8811HB_MCU_SW_START, + AN8811HB_MCU_SW_START_EN); + if (ret < 0) + goto unlock; + + ret =3D __air_pbus_reg_write(phydev, AN8811HB_MCU_SW_RST, + AN8811HB_MCU_SW_RST_RUN); + if (ret < 0) + goto unlock; + + msleep(50); + phydev_info(phydev, "MCU deasserted\n"); + +unlock: + phy_unlock_mdio_bus(phydev); + return ret; +} + static int an8811hb_load_firmware(struct phy_device *phydev) { int ret; =20 + ret =3D an8811hb_mcu_assert(phydev); + if (ret < 0) + return ret; + + ret =3D an8811hb_mcu_deassert(phydev); + if (ret < 0) + return ret; + ret =3D air_buckpbus_reg_write(phydev, EN8811H_FW_CTRL_1, EN8811H_FW_CTRL_1_START); if (ret < 0) @@ -662,6 +757,16 @@ static int en8811h_restart_mcu(struct phy_device *phyd= ev) { int ret; =20 + if (phy_id_compare_model(phydev->phy_id, AN8811HB_PHY_ID)) { + ret =3D an8811hb_mcu_assert(phydev); + if (ret < 0) + return ret; + + ret =3D an8811hb_mcu_deassert(phydev); + if (ret < 0) + return ret; + } + ret =3D air_buckpbus_reg_write(phydev, EN8811H_FW_CTRL_1, EN8811H_FW_CTRL_1_START); if (ret < 0) --=20 2.34.1