From nobody Tue Apr 7 06:14:32 2026 Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CBD823A99F for ; Sun, 15 Mar 2026 08:04:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773561858; cv=none; b=DRCP6ZmfLmwj2JoZcco1MnXYla31PjIkjaZKquek8DbQkl+6nbwMoUX7KloSBLlZBPcfQG8kdpnIatwCwdeNzK0sCgdUc7LgjhngANokRPYaXg2VbAADcMkNJrqu4GFiDdT71LwKNoRe29Am+FBriW+hqS6TQmdkJ+ptJgql9UM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773561858; c=relaxed/simple; bh=6KwNhmgeCKiocaC9b9yCFWn6G6bRsoBv8F63YaRtp1A=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=PF91Hlkar4vfvnRef/edyG3yo8ygupBB+fBdSqHZYDorCktqFh9knbUZDWHqK3aFGl9fMjaezMsAx+OKtMJILDRMfIx0TBQ+eliInZTD1V06YC7U9tNM1JwRRDzP4GB2p07409fDkLFNbOQShegeWn6cu1bqbUn6JfUYz1++8hA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=UTzzV6UZ; arc=none smtp.client-ip=209.85.210.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UTzzV6UZ" Received: by mail-pf1-f182.google.com with SMTP id d2e1a72fcca58-829865a8471so3355430b3a.3 for ; Sun, 15 Mar 2026 01:04:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773561855; x=1774166655; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=Wf6goollPih6Cu3uZylPqikmMqgPzaiiJbbJOnW8VAU=; b=UTzzV6UZmMDXV/IpDATEUvjtpXqJupmUS59G/XIAru0wkCS3CBaa/RFjWYbUiFBrNp w7VKkCuhBz3BrONRE/QoogUUxm9Ns3modm0M92o3wpJBiH6OkLP+rhmrEoWBRcQr5mRH lWLKCwzdL9XK4/QWTx5zuI0Q8CTT5mpfDpWY/qVJcV6r4rBSWrESNKwTf5xXTu3zw2r2 LyitB+IhKiU/ys7brGlesR96DNz8qYGoGeK5xO+zmLTqfKJGhb0kCbF9IQQoe1WT/5Cf SHiMj6NyhEAqwEgkr9/5O2Uj94lKSubRWBrLAnVHX+pNKvfQ/mSgxO4vzrCiNrJeSrIZ ikCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773561855; x=1774166655; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=Wf6goollPih6Cu3uZylPqikmMqgPzaiiJbbJOnW8VAU=; b=NLgHrq77O9k/1kqg6UE4Hsmzf9G3lpYUWXqm1sH32qd9FpGwJ9WVkidg/JM2x+pNhZ QTsXAKUn4kVeZm7mvXa3hNUijfotXfQzupMJpg0oA1YZiDrSJkrMNlX+TVCKxBFzTzGU sQiR10ucvUMEA9ZXGAdB2F/wacBOCTMVCDPPoJaUEAjqGyZy6PzpPa1/q5zLuxAUDfK+ Bu8qxIWQq8y13lwcod9RBRoW3vcHi4G66qgoYdtZeeysRGS3xl55ATSVjuXKVGhHPDti aqjzIGpt1om5CWlxedsfFRiV/W3QMn45OJmJrj+ssv4aPsgvpaU0tR50zhPgZRv4dZcp XyzQ== X-Forwarded-Encrypted: i=1; AJvYcCW14IDh6iPOIS1GHmhSqYMEk0IqlNpdim14tBdeTp48N0MchKW3rIaklulYj2VC/ipwkJXYlQCIWe1pCn0=@vger.kernel.org X-Gm-Message-State: AOJu0Yz3wmZmmDmSiXPmPCP0+4ZOhEM+tgHrXDTSAVH6dYvcJ6zJoCpb q0wmMFqDs+dRNpRQcvcY7lBQbubPOjLMUabjpaRFjF/Wwo5Rrm9FsAQP X-Gm-Gg: ATEYQzwhgIxgYRaS0DFErAAdUE2K6sQIswL4m1omqHzRpjQyB5O+XPxb/isVQS3wgqA w4PZ2i4Z/w5ZX7xA9QnGeNuLqm93KXLyMsbuK0GFcIwQa7NuSsEXL5JA73BSCgrAIGO24EDmd3n Nv8mNxUvXI+F+1ecPi3hBD3hpueFxCPvORaEHh1x6bblbnrTSOkJ87W4UFqMxCGd0s8eqWN1MQl 4DXldgqjJ85ryfDqEW5tPkRSKbdNTniXvA1QOapoj8ybXu7D6VA829R6XaYCkY8TMzP2fpZK+yf 17gyDj2iIst/+Ktx/n8dwatGMLqxYp99agoddFocxECuX9tCh+3eK4j5OyORxu9yUwtqylPZNch /z5kXvLymzlCCP4tiPxbz2y+HfUKZ1njQsjI6CCjRXJO0tr2j7pgKrWuucgfJ5d7C8LqAFYJhf+ 2nVCSW+Ehfq6yFfE0nHt4aTPb69GT0 X-Received: by 2002:a05:6a00:14d6:b0:829:86aa:e168 with SMTP id d2e1a72fcca58-82a196f5362mr9430113b3a.8.1773561855385; Sun, 15 Mar 2026 01:04:15 -0700 (PDT) Received: from Ultimate.. ([2402:e280:3e2c:6f1:1921:d86d:a0b5:a474]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82a07370353sm12651011b3a.51.2026.03.15.01.04.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Mar 2026 01:04:14 -0700 (PDT) From: Udaya Kiran Challa To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, skhan@linuxfoundation.org, Udaya Kiran Challa Subject: [PATCH] dt-bindings: arm: mediatek: mediatek,g3dsys: Convert to DT schema Date: Sun, 15 Mar 2026 13:33:02 +0530 Message-Id: <20260315080302.454233-1-challauday369@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the MediaTek G3D system controller devicetree binding from the legacy text format to DT schema. Signed-off-by: Udaya Kiran Challa --- .../bindings/arm/mediatek/mediatek,g3dsys.txt | 30 --------- .../arm/mediatek/mediatek,g3dsys.yaml | 61 +++++++++++++++++++ 2 files changed, 61 insertions(+), 30 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek= ,g3dsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek= ,g3dsys.yaml diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys= .txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt deleted file mode 100644 index 7de43bf41fdc..000000000000 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt +++ /dev/null @@ -1,30 +0,0 @@ -MediaTek g3dsys controller -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D - -The MediaTek g3dsys controller provides various clocks and reset controlle= r to -the GPU. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt2701-g3dsys", "syscon": - for MT2701 SoC - - "mediatek,mt7623-g3dsys", "mediatek,mt2701-g3dsys", "syscon": - for MT7623 SoC -- #clock-cells: Must be 1 -- #reset-cells: Must be 1 - -The g3dsys controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -g3dsys: clock-controller@13000000 { - compatible =3D "mediatek,mt7623-g3dsys", - "mediatek,mt2701-g3dsys", - "syscon"; - reg =3D <0 0x13000000 0 0x200>; - #clock-cells =3D <1>; - #reset-cells =3D <1>; -}; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys= .yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.yaml new file mode 100644 index 000000000000..0bf672bd6e5c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,g3dsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek G3D System Controller + +maintainers: + - Sean Wang + - Ryder Lee + +description: | + The MediaTek G3D system controller provides clocks and reset control + for the GPU subsystem on MediaTek SoCs. + +properties: + compatible: + oneOf: + - items: + - const: mediatek,mt2701-g3dsys + - const: syscon + - items: + - const: mediatek,mt7623-g3dsys + - const: mediatek,mt2701-g3dsys + - const: syscon + + reg: + maxItems: 1 + description: Base address and length of the G3DSYS register region + + "#clock-cells": + const: 1 + description: Number of cells in a clock specifier + + "#reset-cells": + const: 1 + description: Number of cells in a reset specifier + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + g3dsys: syscon@13000000 { + compatible =3D "mediatek,mt7623-g3dsys", + "mediatek,mt2701-g3dsys", + "syscon"; + reg =3D <0 0x13000000 0 0x200>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + }; + }; --=20 2.34.1