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Sat, 14 Mar 2026 18:11:07 -0400 (EDT) From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= To: Mauro Carvalho Chehab , Kuninori Morimoto , Jacopo Mondi , Laurent Pinchart , linux-media@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Niklas=20S=C3=B6derlund?= , Marek Vasut Subject: [PATCH v6 09/12] media: rppx1: Add support for Lens Shade Correction Date: Sat, 14 Mar 2026 22:59:41 +0100 Message-ID: <20260314215944.3674865-10-niklas.soderlund+renesas@ragnatech.se> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260314215944.3674865-1-niklas.soderlund+renesas@ragnatech.se> References: <20260314215944.3674865-1-niklas.soderlund+renesas@ragnatech.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Extend the RPPX1 driver to allow setting the Lens Shade Correction (LSC) configuration using the RkISP1 parameter buffer format. It uses the RPPX1 framework for parameters and its writer abstraction to allow the user to control how (and when) configuration is applied to the RPPX1. As the RkISP1 parameters buffer only describes one quadrant of the lens, this is due to the RkISP1 hardware only allowing one quadrant to be programmed to hardware. The hardware then extrapolates this to the other three quadrants of the lens. For RPP all four quadrants are individually programmable. To compensate for the driver need to extrapolate all four quadrants from the RkISP1 parameters buffer information. Signed-off-by: Niklas S=C3=B6derlund Tested-by: Marek Vasut --- .../platform/dreamchip/rppx1/rpp_params.c | 4 + .../platform/dreamchip/rppx1/rppx1_lsc.c | 126 ++++++++++++++++++ 2 files changed, 130 insertions(+) diff --git a/drivers/media/platform/dreamchip/rppx1/rpp_params.c b/drivers/= media/platform/dreamchip/rppx1/rpp_params.c index c807ccfef628..0314cb732844 100644 --- a/drivers/media/platform/dreamchip/rppx1/rpp_params.c +++ b/drivers/media/platform/dreamchip/rppx1/rpp_params.c @@ -19,6 +19,7 @@ rkisp1_ext_params_blocks_info[] =3D { RKISP1_PARAMS_BLOCK_INFO(BLS, bls), RKISP1_PARAMS_BLOCK_INFO(AWB_GAIN, awb_gain), RKISP1_PARAMS_BLOCK_INFO(CTK, ctk), + RKISP1_PARAMS_BLOCK_INFO(LSC, lsc), RKISP1_PARAMS_BLOCK_INFO(AWB_MEAS, awb_meas), RKISP1_PARAMS_BLOCK_INFO(HST_MEAS, hst), RKISP1_PARAMS_BLOCK_INFO(AEC_MEAS, aec), @@ -65,6 +66,9 @@ int rppx1_params(struct rppx1 *rpp, struct vb2_buffer *vb= , size_t max_size, case RKISP1_EXT_PARAMS_BLOCK_TYPE_CTK: module =3D &rpp->post.ccor; break; + case RKISP1_EXT_PARAMS_BLOCK_TYPE_LSC: + module =3D &rpp->pre1.lsc; + break; case RKISP1_EXT_PARAMS_BLOCK_TYPE_AWB_MEAS: module =3D &rpp->post.wbmeas; break; diff --git a/drivers/media/platform/dreamchip/rppx1/rppx1_lsc.c b/drivers/m= edia/platform/dreamchip/rppx1/rppx1_lsc.c index e8acdf744956..00bdcc4aedb3 100644 --- a/drivers/media/platform/dreamchip/rppx1/rppx1_lsc.c +++ b/drivers/media/platform/dreamchip/rppx1/rppx1_lsc.c @@ -54,6 +54,10 @@ #define LSC_TABLE_SEL_REG 0x00a8 #define LSC_STATUS_REG 0x00ac =20 +#define LSC_R_TABLE_DATA_VALUE(v1, v2) (((v1) & 0xfff) | (((v2) & 0xfff) <= < 12)) +#define LSC_GRAD_VALUE(v1, v2) (((v1) & 0xfff) | (((v2) & 0xfff) << 16)) +#define LSC_SIZE_VALUE(v1, v2) (((v1) & 0x1ff) | (((v2) & 0x1ff) << 16)) + static int rppx1_lsc_probe(struct rpp_module *mod) { /* Version check. */ @@ -63,6 +67,128 @@ static int rppx1_lsc_probe(struct rpp_module *mod) return 0; } =20 +static int +rppx1_lsc_param_rkisp1(struct rpp_module *mod, + const union rppx1_params_rkisp1_config *block, + rppx1_reg_write write, void *priv) +{ + const struct rkisp1_ext_params_lsc_config *cfg =3D &block->lsc; + const __u16 *v; + + /* Always disable module as it needs be disabled before configuring. */ + write(priv, mod->base + LSC_CTRL_REG, 0); + if (cfg->header.flags & RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE) + return 0; + + /* + * Program the color correction sectors. + * + * There are two tables to one can program and switch between. As the + * RPPX1 supports preparing a buffer of commands to be applied later + * only use table 0. This works as long as the ISP is not used in + * inline-mode. + * + * For inline-mode support using DMA for configuration is not possible + * so this is not an issue, but needs to be address if inline-mode + * support is added to the driver. + */ + + /* Start writing at beginning of table 0. */ + write(priv, mod->base + LSC_R_TABLE_ADDR_REG, 0); + write(priv, mod->base + LSC_GR_TABLE_ADDR_REG, 0); + write(priv, mod->base + LSC_B_TABLE_ADDR_REG, 0); + write(priv, mod->base + LSC_GB_TABLE_ADDR_REG, 0); + + /* Program data tables. */ + for (unsigned int i =3D 0; i < RKISP1_CIF_ISP_LSC_SAMPLES_MAX; i++) { + const __u16 *r =3D cfg->config.r_data_tbl[i]; + const __u16 *gr =3D cfg->config.gr_data_tbl[i]; + const __u16 *b =3D cfg->config.b_data_tbl[i]; + const __u16 *gb =3D cfg->config.gb_data_tbl[i]; + unsigned int j; + + for (j =3D 0; j < RKISP1_CIF_ISP_LSC_SAMPLES_MAX - 1; j +=3D 2) { + write(priv, mod->base + LSC_R_TABLE_DATA_REG, + LSC_R_TABLE_DATA_VALUE(r[j], r[j + 1])); + write(priv, mod->base + LSC_GR_TABLE_DATA_REG, + LSC_R_TABLE_DATA_VALUE(gr[j], gr[j + 1])); + write(priv, mod->base + LSC_B_TABLE_DATA_REG, + LSC_R_TABLE_DATA_VALUE(b[j], b[j + 1])); + write(priv, mod->base + LSC_GB_TABLE_DATA_REG, + LSC_R_TABLE_DATA_VALUE(gb[j], gb[j + 1])); + } + + write(priv, mod->base + LSC_R_TABLE_DATA_REG, + LSC_R_TABLE_DATA_VALUE(r[j], 0)); + write(priv, mod->base + LSC_GR_TABLE_DATA_REG, + LSC_R_TABLE_DATA_VALUE(gr[j], 0)); + write(priv, mod->base + LSC_B_TABLE_DATA_REG, + LSC_R_TABLE_DATA_VALUE(b[j], 0)); + write(priv, mod->base + LSC_GB_TABLE_DATA_REG, + LSC_R_TABLE_DATA_VALUE(gb[j], 0)); + } + + /* Activate table 0. */ + write(priv, mod->base + LSC_TABLE_SEL_REG, 0); + + /* + * Program X- and Y- sizes, and gradients. + * + * The RPP ISP can describe each quarter of the lens individually, this + * differs from the Rk1ISP which can only describe one quarter of lens + * with software and then extrapolates the other three. + * + * To adjust for this extrapolate the three missing quadrants using + * software for the RPP ISP. + */ + + v =3D cfg->config.x_grad_tbl; + write(priv, mod->base + LSC_XGRAD_01_REG, LSC_GRAD_VALUE(v[0], v[1])); + write(priv, mod->base + LSC_XGRAD_23_REG, LSC_GRAD_VALUE(v[2], v[3])); + write(priv, mod->base + LSC_XGRAD_45_REG, LSC_GRAD_VALUE(v[4], v[5])); + write(priv, mod->base + LSC_XGRAD_67_REG, LSC_GRAD_VALUE(v[6], v[7])); + write(priv, mod->base + LSC_XGRAD_89_REG, LSC_GRAD_VALUE(v[7], v[6])); + write(priv, mod->base + LSC_XGRAD_1011_REG, LSC_GRAD_VALUE(v[5], v[4])); + write(priv, mod->base + LSC_XGRAD_1213_REG, LSC_GRAD_VALUE(v[3], v[2])); + write(priv, mod->base + LSC_XGRAD_1415_REG, LSC_GRAD_VALUE(v[1], v[0])); + + v =3D cfg->config.y_grad_tbl; + write(priv, mod->base + LSC_YGRAD_01_REG, LSC_GRAD_VALUE(v[0], v[1])); + write(priv, mod->base + LSC_YGRAD_23_REG, LSC_GRAD_VALUE(v[2], v[3])); + write(priv, mod->base + LSC_YGRAD_45_REG, LSC_GRAD_VALUE(v[4], v[5])); + write(priv, mod->base + LSC_YGRAD_67_REG, LSC_GRAD_VALUE(v[6], v[7])); + write(priv, mod->base + LSC_YGRAD_89_REG, LSC_GRAD_VALUE(v[7], v[6])); + write(priv, mod->base + LSC_YGRAD_1011_REG, LSC_GRAD_VALUE(v[5], v[4])); + write(priv, mod->base + LSC_YGRAD_1213_REG, LSC_GRAD_VALUE(v[3], v[2])); + write(priv, mod->base + LSC_YGRAD_1415_REG, LSC_GRAD_VALUE(v[1], v[0])); + + v =3D cfg->config.x_size_tbl; + write(priv, mod->base + LSC_XSIZE_01_REG, LSC_GRAD_VALUE(v[0], v[1])); + write(priv, mod->base + LSC_XSIZE_23_REG, LSC_GRAD_VALUE(v[2], v[3])); + write(priv, mod->base + LSC_XSIZE_45_REG, LSC_GRAD_VALUE(v[4], v[5])); + write(priv, mod->base + LSC_XSIZE_67_REG, LSC_GRAD_VALUE(v[6], v[7])); + write(priv, mod->base + LSC_XSIZE_89_REG, LSC_GRAD_VALUE(v[7], v[6])); + write(priv, mod->base + LSC_XSIZE_1011_REG, LSC_GRAD_VALUE(v[5], v[4])); + write(priv, mod->base + LSC_XSIZE_1213_REG, LSC_GRAD_VALUE(v[3], v[2])); + write(priv, mod->base + LSC_XSIZE_1415_REG, LSC_GRAD_VALUE(v[1], v[0])); + + v =3D cfg->config.y_size_tbl; + write(priv, mod->base + LSC_YSIZE_01_REG, LSC_GRAD_VALUE(v[0], v[1])); + write(priv, mod->base + LSC_YSIZE_23_REG, LSC_GRAD_VALUE(v[2], v[3])); + write(priv, mod->base + LSC_YSIZE_45_REG, LSC_GRAD_VALUE(v[4], v[5])); + write(priv, mod->base + LSC_YSIZE_67_REG, LSC_GRAD_VALUE(v[6], v[7])); + write(priv, mod->base + LSC_YSIZE_89_REG, LSC_GRAD_VALUE(v[7], v[6])); + write(priv, mod->base + LSC_YSIZE_1011_REG, LSC_GRAD_VALUE(v[5], v[4])); + write(priv, mod->base + LSC_YSIZE_1213_REG, LSC_GRAD_VALUE(v[3], v[2])); + write(priv, mod->base + LSC_YSIZE_1415_REG, LSC_GRAD_VALUE(v[1], v[0])); + + /* Enable module. */ + write(priv, mod->base + LSC_CTRL_REG, LSC_CTRL_LSC_EN); + + return 0; +} + const struct rpp_module_ops rppx1_lsc_ops =3D { .probe =3D rppx1_lsc_probe, + .param_rkisp1 =3D rppx1_lsc_param_rkisp1, }; --=20 2.53.0