From nobody Tue Apr 7 09:37:05 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF17D3CF677; Fri, 13 Mar 2026 17:50:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773424240; cv=none; b=SlbGgyreq6q68821yXmiVNxF4zuCJR0Ak5YDRnCS1zMrkIKflEe/i1Yb4PPUMMpba/CogTdHEH3ZSN3FkasPrgeHkML7qFp9NzanFq9kqXpIhOzQi49BV98iggnB8nWdn9JpVFCiuvLzZfAYQTMJ7VuSK/AmYRVcwkj3YCkG9X4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773424240; c=relaxed/simple; bh=1x/5si05bd7nTythJOUAy63GznRFw2h1x2WOgG8pzD8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CayIvwpxVbRBam55OeqOc/GULCxoW6nx2oJiXimS+7O+zJtJcvRrlETXiUNJaXUv0iwdu2MBKnJT+sel0lOuLuJ/UFXBnLguG6YbD6sh5b8uplsxexU/ZWJM7+p4H5RG57VD4r/1gKZzUg1FyHXOYdzGdD4c+9hAD1liS8k7VWU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=meWtOk5F; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="meWtOk5F" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773424240; x=1804960240; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1x/5si05bd7nTythJOUAy63GznRFw2h1x2WOgG8pzD8=; b=meWtOk5FhcuF7boY7HLDBvR57MgxJjM/NinjAIuvHnW2hgCGz+GZ4RW0 Xb1BAEI7oU/u6DgJgyzLCpXbGCwNzmKHK5YgHkkkY/pY+QdY+WuQdGHne 9Wte6sypruF8Kp8w8x9p8+8A3e5jODTaO+lpjfBrYx4TSoRtYzmpCv15w H6bZ+X+IeM+2mgB7UEpsKbQ/LQtB5eZyhmiGMCimPXrekyye+QNb02Ju1 ZObRgXj35Jlb4ztCwscglLOchs53dcciNzzHfcE47stoEnEPWU2f06jYs BD9J8INFREMVnzk8kXfVEVA83fkjqor1kxJgTR8xiMmighVPa1qwQxMOr Q==; X-CSE-ConnectionGUID: Ji0AymwIS3yWOgxe9FpDCA== X-CSE-MsgGUID: XnoC7DT6TTWkrOK7Lt8zxQ== X-IronPort-AV: E=McAfee;i="6800,10657,11728"; a="74508723" X-IronPort-AV: E=Sophos;i="6.23,118,1770624000"; d="scan'208";a="74508723" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2026 10:50:40 -0700 X-CSE-ConnectionGUID: c4FmFMMyQWe4J88d94fMgg== X-CSE-MsgGUID: ySmtG2KDReqHzh5EmYxD7w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,118,1770624000"; d="scan'208";a="259128538" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.29]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2026 10:50:39 -0700 From: Zide Chen To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi , Zide Chen , Steve Wahl , Chun-Tse Shao , Markus Elfring , kernel test robot Subject: [PATCH V4 1/4] perf/x86/intel/uncore: Fix iounmap() leak on global_init failure Date: Fri, 13 Mar 2026 10:40:47 -0700 Message-ID: <20260313174050.171704-2-zide.chen@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260313174050.171704-1-zide.chen@intel.com> References: <20260313174050.171704-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Kernel test robot reported: Unverified Error/Warning (likely false positive, kindly check if interested): arch/x86/events/intel/uncore_discovery.c:293:2-8: ERROR: missing iounmap; ioremap on line 288 and execution via conditional on line 292 If domain->global_init() fails in __parse_discovery_table(), the ioremap'ed MMIO region is not released before returning, resulting in an MMIO mapping leak. Reported-by: kernel test robot Fixes: b575fc0e3357 ("perf/x86/intel/uncore: Add domain global init callbac= k") Reviewed-by: Dapeng Mi Signed-off-by: Zide Chen --- V2: - As suggested by Markus, add an `out` label and use goto-based error handling to reduce duplicated iounmap() code. - Add the original warning from the kernel test robot to the commit message. - Trivial rewording of the commit message. V4: - Add Reviewed-by tag. --- arch/x86/events/intel/uncore_discovery.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/int= el/uncore_discovery.c index 1b1a6b221048..6a4e892cd525 100644 --- a/arch/x86/events/intel/uncore_discovery.c +++ b/arch/x86/events/intel/uncore_discovery.c @@ -264,6 +264,7 @@ static int __parse_discovery_table(struct uncore_discov= ery_domain *domain, struct uncore_unit_discovery unit; void __iomem *io_addr; unsigned long size; + int ret =3D 0; int i; =20 size =3D UNCORE_DISCOVERY_GLOBAL_MAP_SIZE; @@ -273,21 +274,23 @@ static int __parse_discovery_table(struct uncore_disc= overy_domain *domain, =20 /* Read Global Discovery State */ memcpy_fromio(&global, io_addr, sizeof(struct uncore_global_discovery)); + iounmap(io_addr); + if (uncore_discovery_invalid_unit(global)) { pr_info("Invalid Global Discovery State: 0x%llx 0x%llx 0x%llx\n", global.table1, global.ctl, global.table3); - iounmap(io_addr); return -EINVAL; } - iounmap(io_addr); =20 size =3D (1 + global.max_units) * global.stride * 8; io_addr =3D ioremap(addr, size); if (!io_addr) return -ENOMEM; =20 - if (domain->global_init && domain->global_init(global.ctl)) - return -ENODEV; + if (domain->global_init && domain->global_init(global.ctl)) { + ret =3D -ENODEV; + goto out; + } =20 /* Parsing Unit Discovery State */ for (i =3D 0; i < global.max_units; i++) { @@ -307,8 +310,10 @@ static int __parse_discovery_table(struct uncore_disco= very_domain *domain, } =20 *parsed =3D true; + +out: iounmap(io_addr); - return 0; + return ret; } =20 static int parse_discovery_table(struct uncore_discovery_domain *domain, --=20 2.53.0 From nobody Tue Apr 7 09:37:05 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5DB273CFF78; Fri, 13 Mar 2026 17:50:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" This warning can be triggered if NUMA is disabled and the system boots with fewer CPUs than the number of CPUs in die 0. WARNING: CPU: 9 PID: 7257 at uncore.c:1157 uncore_pci_pmu_register+0x136/0x= 160 [intel_uncore] Currently, the discovery table continues to be parsed even if all CPUs in the associated die are offline. This can lead to an array overflow at "pmu->boxes[die] =3D box" in uncore_pci_pmu_register(), which may trigger the warning above or cause other issues. Reported-by: Steve Wahl Tested-by: Steve Wahl Fixes: edae1f06c2cd ("perf/x86/intel/uncore: Parse uncore discovery tables") Reviewed-by: Dapeng Mi Signed-off-by: Zide Chen --- V2: - Add the Tested-by tag - Rebase onto perf/core (base commit: a491c02c2770) V3: - Remove the overly cautious WARN_ON() V4: - Add Reviewed-by tag. --- arch/x86/events/intel/uncore_discovery.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/int= el/uncore_discovery.c index 6a4e892cd525..749db3649f8f 100644 --- a/arch/x86/events/intel/uncore_discovery.c +++ b/arch/x86/events/intel/uncore_discovery.c @@ -371,7 +371,7 @@ static bool uncore_discovery_pci(struct uncore_discover= y_domain *domain) (val & UNCORE_DISCOVERY_DVSEC2_BIR_MASK) * UNCORE_DISCOVERY_BIR_S= TEP; =20 die =3D get_device_die_id(dev); - if (die < 0) + if ((die < 0) || (die >=3D uncore_max_dies())) continue; =20 parse_discovery_table(domain, dev, die, bar_offset, &parsed); --=20 2.53.0 From nobody Tue Apr 7 09:37:05 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB3ED3D090F; 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charset="utf-8" In snbep_pci2phy_map_init(), in the nr_node_ids > 8 path, uncore_device_to_die() may return -1 when all CPUs associated with the UBOX device are offline. Remove the WARN_ON_ONCE(die_id =3D=3D -1) check for two reasons: - The current code breaks out of the loop. This is incorrect because pci_get_device() does not guarantee iteration in domain or bus order, so additional UBOX devices may be skipped during the scan. - Returning -EINVAL is incorrect, since marking offline buses with die_id =3D=3D -1 is expected and should not be treated as an error. Separately, when NUMA is disabled on a NUMA-capable platform, pcibus_to_node() returns NUMA_NO_NODE, causing uncore_device_to_die() to return -1 for all PCI devices. As a result, spr_update_device_location(), used on Intel SPR and EMR, ignores the corresponding PMON units and does not add them to the RB tree. Fix this by using uncore_pcibus_to_dieid(), which retrieves topology from the UBOX GIDNIDMAP register and works regardless of whether NUMA is enabled in Linux. This requires snbep_pci2phy_map_init() to be added in spr_uncore_pci_init(). Keep uncore_device_to_die() only for the nr_node_ids > 8 case, where NUMA is expected to be enabled. Fixes: 9a7832ce3d92 ("perf/x86/intel/uncore: With > 8 nodes, get pci bus di= e id from NUMA info") Fixes: 65248a9a9ee1 ("perf/x86/uncore: Add a quirk for UPI on SPR") Tested-by: Steve Wahl Signed-off-by: Zide Chen --- V2: - Fix the commit message to note that spr_update_device_location() is used by EMR, not GNR. - Rewrite the commit message for clarity. - Add a Tested-by tag. V4: no changes. --- arch/x86/events/intel/uncore.c | 1 + arch/x86/events/intel/uncore_snbep.c | 13 ++++++------- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 786bd51a0d89..e9cc1ba921c5 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -67,6 +67,7 @@ int uncore_die_to_segment(int die) return bus ? pci_domain_nr(bus) : -EINVAL; } =20 +/* Note: This API can only be used when NUMA information is available. */ int uncore_device_to_die(struct pci_dev *dev) { int node =3D pcibus_to_node(dev->bus); diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/u= ncore_snbep.c index 9b51883fd6fd..421378f681d7 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -1459,13 +1459,7 @@ static int snbep_pci2phy_map_init(int devid, int nod= eid_loc, int idmap_loc, bool } =20 map->pbus_to_dieid[bus] =3D die_id =3D uncore_device_to_die(ubox_dev); - raw_spin_unlock(&pci2phy_map_lock); - - if (WARN_ON_ONCE(die_id =3D=3D -1)) { - err =3D -EINVAL; - break; - } } } =20 @@ -6420,7 +6414,7 @@ static void spr_update_device_location(int type_id) =20 while ((dev =3D pci_get_device(PCI_VENDOR_ID_INTEL, device, dev)) !=3D NU= LL) { =20 - die =3D uncore_device_to_die(dev); + die =3D uncore_pcibus_to_dieid(dev->bus); if (die < 0) continue; =20 @@ -6444,6 +6438,11 @@ static void spr_update_device_location(int type_id) =20 int spr_uncore_pci_init(void) { + int ret =3D snbep_pci2phy_map_init(0x3250, SKX_CPUNODEID, SKX_GIDNIDMAP, = true); + + if (ret) + return ret; + /* * The discovery table of UPI on some SPR variant is broken, * which impacts the detection of both UPI and M3UPI uncore PMON. --=20 2.53.0 From nobody Tue Apr 7 09:37:05 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E43033D0930; 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a="74508753" X-IronPort-AV: E=Sophos;i="6.23,118,1770624000"; d="scan'208";a="74508753" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2026 10:50:44 -0700 X-CSE-ConnectionGUID: nliUcwRCQPiIoy1j1qFVLA== X-CSE-MsgGUID: pps7coNAT+aTpbIS3bOJSA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,118,1770624000"; d="scan'208";a="259128567" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.29]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2026 10:50:44 -0700 From: Zide Chen To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi , Zide Chen , Steve Wahl , Chun-Tse Shao , Markus Elfring Subject: [PATCH V4 4/4] perf/x86/intel/uncore: Remove extra double quote mark Date: Fri, 13 Mar 2026 10:40:50 -0700 Message-ID: <20260313174050.171704-5-zide.chen@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260313174050.171704-1-zide.chen@intel.com> References: <20260313174050.171704-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The third argument in INTEL_UNCORE_FR_EVENT_DESC() is subject to __stringify(), and the extra double quote marks can result in the expansion "3.814697266e-6" in the sysfs knobs, instead of 3.814697266e-6. This is incorrect, though it may still work for perf, e.g. perf stat -e uncore_iio_free_running_0/bw_in_port0/ Fixes: d8987048f665 ("perf/x86/intel/uncore: Support IIO free-running count= ers on DMR") Reported-by: Chun-Tse Shao Closes: https://lore.kernel.org/all/20251231224233.113839-1-zide.chen@intel= .com/ Reviewed-by: Chun-Tse Shao Reviewed-by: Dapeng Mi Signed-off-by: Zide Chen --- V4: Added Reviewed-by tags. --- arch/x86/events/intel/uncore_snbep.c | 48 ++++++++++++++-------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/u= ncore_snbep.c index 421378f681d7..96c5703388a9 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -6960,34 +6960,34 @@ static struct freerunning_counters dmr_iio_freerunn= ing[] =3D { =20 static struct uncore_event_desc dmr_uncore_iio_freerunning_events[] =3D { /* ITC Free Running Data BW counter for inbound traffic */ - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port0, 0x10, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port1, 0x11, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port2, 0x12, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port3, 0x13, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port4, 0x14, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port5, 0x15, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port6, 0x16, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port7, 0x17, "3.814697266e-6"), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port0, 0x10, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port1, 0x11, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port2, 0x12, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port3, 0x13, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port4, 0x14, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port5, 0x15, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port6, 0x16, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port7, 0x17, 3.814697266e-6), =20 /* ITC Free Running BW IN counters */ - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port0, 0x20, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port1, 0x21, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port2, 0x22, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port3, 0x23, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port4, 0x24, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port5, 0x25, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port6, 0x26, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port7, 0x27, "3.814697266e-6"), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port0, 0x20, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port1, 0x21, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port2, 0x22, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port3, 0x23, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port4, 0x24, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port5, 0x25, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port6, 0x26, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port7, 0x27, 3.814697266e-6), =20 /* ITC Free Running BW OUT counters */ - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port0, 0x30, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port1, 0x31, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port2, 0x32, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port3, 0x33, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port4, 0x34, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port5, 0x35, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port6, 0x36, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port7, 0x37, "3.814697266e-6"), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port0, 0x30, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port1, 0x31, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port2, 0x32, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port3, 0x33, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port4, 0x34, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port5, 0x35, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port6, 0x36, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port7, 0x37, 3.814697266e-6), =20 /* Free Running Clock Counter */ INTEL_UNCORE_EVENT_DESC(clockticks, "event=3D0xff,umask=3D0x40"), --=20 2.53.0