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Fri, 13 Mar 2026 09:54:52 -0700 From: Zhi Wang To: , , , , , , CC: , , , , , , , , , , , , , , , , "Zhi Wang" , Timur Tabi Subject: [RFC v2 08/10] gpu: nova-core: set RMSetSriovMode when NVIDIA vGPU is enabled Date: Fri, 13 Mar 2026 18:53:32 +0200 Message-ID: <20260313165336.935771-9-zhiw@nvidia.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260313165336.935771-1-zhiw@nvidia.com> References: <20260313165336.935771-1-zhiw@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000012:EE_|DS0PR12MB7900:EE_ X-MS-Office365-Filtering-Correlation-Id: 462867a3-442e-4605-2f74-08de81214e5a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|7416014|1800799024|36860700016|56012099003|18002099003|22082099003; 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charset="utf-8" The registry object "RMSetSriovMode" is required to be set when vGPU is enabled. Set "RMSetSriovMode" to 1 when nova-core is loading the GSP firmware and initialize the GSP registry objects, if vGPU is enabled. Cc: Timur Tabi Cc: Joel Fernandes Cc: Alexandre Courbot Signed-off-by: Zhi Wang --- drivers/gpu/nova-core/gsp/boot.rs | 4 +- drivers/gpu/nova-core/gsp/commands.rs | 89 +++++++++++++++++---------- drivers/gpu/nova-core/gsp/fw.rs | 44 +++++++++++++ 3 files changed, 104 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/= boot.rs index 921d5e892f8a..ed8729041d46 100644 --- a/drivers/gpu/nova-core/gsp/boot.rs +++ b/drivers/gpu/nova-core/gsp/boot.rs @@ -364,7 +364,7 @@ pub(crate) fn boot( self.cmdq .send_command_no_wait(bar, commands::SetSystemInfo::new(pd= ev, chipset, vf_info))?; self.cmdq - .send_command_no_wait(bar, commands::SetRegistry::new())?; + .send_command_no_wait(bar, commands::SetRegistry::new(ctx.= vgpu_requested)?)?; =20 Self::boot_via_sec2( dev, @@ -406,7 +406,7 @@ pub(crate) fn boot( self.cmdq .send_command_no_wait(bar, commands::SetSystemInfo::new(pd= ev, chipset, vf_info))?; self.cmdq - .send_command_no_wait(bar, commands::SetRegistry::new())?; + .send_command_no_wait(bar, commands::SetRegistry::new(ctx.= vgpu_requested)?)?; } =20 // SEC2-based architectures need to run the GSP sequencer diff --git a/drivers/gpu/nova-core/gsp/commands.rs b/drivers/gpu/nova-core/= gsp/commands.rs index 0445d05990e7..c96580d0f433 100644 --- a/drivers/gpu/nova-core/gsp/commands.rs +++ b/drivers/gpu/nova-core/gsp/commands.rs @@ -75,38 +75,62 @@ struct RegistryEntry { } =20 /// The `SetRegistry` command. +/// +/// Registry entries are built dynamically at runtime based on the current +/// configuration (e.g. whether vGPU is enabled). pub(crate) struct SetRegistry { - entries: [RegistryEntry; Self::NUM_ENTRIES], + entries: KVec, } =20 impl SetRegistry { - // For now we hard-code the registry entries. Future work will allow o= thers to - // be added as module parameters. - const NUM_ENTRIES: usize =3D 3; - - /// Creates a new `SetRegistry` command, using a set of hardcoded entr= ies. - pub(crate) fn new() -> Self { - Self { - entries: [ - // RMSecBusResetEnable - enables PCI secondary bus reset - RegistryEntry { - key: "RMSecBusResetEnable", - value: 1, - }, - // RMForcePcieConfigSave - forces GSP-RM to preserve PCI c= onfiguration registers on - // any PCI reset. - RegistryEntry { - key: "RMForcePcieConfigSave", - value: 1, - }, - // RMDevidCheckIgnore - allows GSP-RM to boot even if the = PCI dev ID is not found - // in the internal product name database. + /// Creates a new `SetRegistry` command. + /// + /// The base set of registry entries is always included. Additional en= tries + /// are appended dynamically based on runtime conditions (e.g. vGPU). + pub(crate) fn new(vgpu_requested: bool) -> Result { + let mut entries =3D KVec::new(); + + // RMSecBusResetEnable - enables PCI secondary bus reset + entries.push( + RegistryEntry { + key: "RMSecBusResetEnable", + value: 1, + }, + GFP_KERNEL, + )?; + + // RMForcePcieConfigSave - forces GSP-RM to preserve PCI configura= tion registers on + // any PCI reset. + entries.push( + RegistryEntry { + key: "RMForcePcieConfigSave", + value: 1, + }, + GFP_KERNEL, + )?; + + // RMDevidCheckIgnore - allows GSP-RM to boot even if the PCI dev = ID is not found + // in the internal product name database. + entries.push( + RegistryEntry { + key: "RMDevidCheckIgnore", + value: 1, + }, + GFP_KERNEL, + )?; + + // RMSetSriovMode - required when vGPU is enabled. + if vgpu_requested { + entries.push( RegistryEntry { - key: "RMDevidCheckIgnore", + key: "RMSetSriovMode", value: 1, }, - ], + GFP_KERNEL, + )?; } + + Ok(Self { entries }) } } =20 @@ -117,28 +141,31 @@ impl CommandToGsp for SetRegistry { type InitError =3D Infallible; =20 fn init(&self) -> impl Init { - PackedRegistryTable::init(Self::NUM_ENTRIES as u32, self.variable_= payload_len() as u32) + PackedRegistryTable::init( + self.entries.len() as u32, + self.variable_payload_len() as u32, + ) } =20 fn variable_payload_len(&self) -> usize { let mut key_size =3D 0; - for i in 0..Self::NUM_ENTRIES { - key_size +=3D self.entries[i].key.len() + 1; // +1 for NULL te= rminator + for entry in self.entries.iter() { + key_size +=3D entry.key.len() + 1; // +1 for NULL terminator } - Self::NUM_ENTRIES * size_of::() + key_size + self.entries.len() * size_of::() + key_size } =20 fn init_variable_payload( &self, dst: &mut SBufferIter>, ) -> Result { - let string_data_start_offset =3D - size_of::() + Self::NUM_ENTRIES * size_of= ::(); + let string_data_start_offset =3D size_of::() + + self.entries.len() * size_of::(); =20 // Array for string data. let mut string_data =3D KVec::new(); =20 - for entry in self.entries.iter().take(Self::NUM_ENTRIES) { + for entry in self.entries.iter() { dst.write_all( PackedRegistryEntry::new( (string_data_start_offset + string_data.len()) as u32, diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw= .rs index 6d56b9b920fb..ca01ac3af9c6 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -664,9 +664,50 @@ pub(crate) enum MsgFunction { OsErrorLog =3D bindings::NV_VGPU_MSG_EVENT_OS_ERROR_LOG, PostEvent =3D bindings::NV_VGPU_MSG_EVENT_POST_EVENT, RcTriggered =3D bindings::NV_VGPU_MSG_EVENT_RC_TRIGGERED, + GpuacctPerfmonUtilSamples =3D bindings::NV_VGPU_MSG_EVENT_GPUACCT_PERF= MON_UTIL_SAMPLES, UcodeLibOsPrint =3D bindings::NV_VGPU_MSG_EVENT_UCODE_LIBOS_PRINT, } =20 +impl fmt::Display for MsgFunction { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + match self { + // Common function codes + MsgFunction::Nop =3D> write!(f, "NOP"), + MsgFunction::SetGuestSystemInfo =3D> write!(f, "SET_GUEST_SYST= EM_INFO"), + MsgFunction::AllocRoot =3D> write!(f, "ALLOC_ROOT"), + MsgFunction::AllocDevice =3D> write!(f, "ALLOC_DEVICE"), + MsgFunction::AllocMemory =3D> write!(f, "ALLOC_MEMORY"), + MsgFunction::AllocCtxDma =3D> write!(f, "ALLOC_CTX_DMA"), + MsgFunction::AllocChannelDma =3D> write!(f, "ALLOC_CHANNEL_DMA= "), + MsgFunction::MapMemory =3D> write!(f, "MAP_MEMORY"), + MsgFunction::BindCtxDma =3D> write!(f, "BIND_CTX_DMA"), + MsgFunction::AllocObject =3D> write!(f, "ALLOC_OBJECT"), + MsgFunction::Free =3D> write!(f, "FREE"), + MsgFunction::Log =3D> write!(f, "LOG"), + MsgFunction::GetGspStaticInfo =3D> write!(f, "GET_GSP_STATIC_I= NFO"), + MsgFunction::SetRegistry =3D> write!(f, "SET_REGISTRY"), + MsgFunction::GspSetSystemInfo =3D> write!(f, "GSP_SET_SYSTEM_I= NFO"), + MsgFunction::GspInitPostObjGpu =3D> write!(f, "GSP_INIT_POST_O= BJGPU"), + MsgFunction::GspRmControl =3D> write!(f, "GSP_RM_CONTROL"), + MsgFunction::GetStaticInfo =3D> write!(f, "GET_STATIC_INFO"), + + // Event codes + MsgFunction::GpuacctPerfmonUtilSamples =3D> write!(f, "GPUACCT= _PERFMON_UTIL_SAMPLES"), + MsgFunction::GspInitDone =3D> write!(f, "INIT_DONE"), + MsgFunction::GspRunCpuSequencer =3D> write!(f, "RUN_CPU_SEQUEN= CER"), + MsgFunction::PostEvent =3D> write!(f, "POST_EVENT"), + MsgFunction::RcTriggered =3D> write!(f, "RC_TRIGGERED"), + MsgFunction::MmuFaultQueued =3D> write!(f, "MMU_FAULT_QUEUED"), + MsgFunction::OsErrorLog =3D> write!(f, "OS_ERROR_LOG"), + MsgFunction::GspPostNoCat =3D> write!(f, "NOCAT"), + MsgFunction::GspLockdownNotice =3D> write!(f, "LOCKDOWN_NOTICE= "), + MsgFunction::ContinuationRecord =3D> write!(f, "CONTINUATION_R= ECORD"), + MsgFunction::UcodeLibOsPrint =3D> write!(f, "LIBOS_PRINT"), + } + } +} + + impl TryFrom for MsgFunction { type Error =3D kernel::error::Error; =20 @@ -709,6 +750,9 @@ fn try_from(value: u32) -> Result { bindings::NV_VGPU_MSG_EVENT_OS_ERROR_LOG =3D> Ok(MsgFunction::= OsErrorLog), bindings::NV_VGPU_MSG_EVENT_POST_EVENT =3D> Ok(MsgFunction::Po= stEvent), bindings::NV_VGPU_MSG_EVENT_RC_TRIGGERED =3D> Ok(MsgFunction::= RcTriggered), + bindings::NV_VGPU_MSG_EVENT_GPUACCT_PERFMON_UTIL_SAMPLES =3D> { + Ok(MsgFunction::GpuacctPerfmonUtilSamples) + } bindings::NV_VGPU_MSG_EVENT_UCODE_LIBOS_PRINT =3D> Ok(MsgFunct= ion::UcodeLibOsPrint), _ =3D> Err(EINVAL), } --=20 2.51.0