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Fri, 13 Mar 2026 09:54:44 -0700 From: Zhi Wang To: , , , , , , CC: , , , , , , , , , , , , , , , , "Zhi Wang" Subject: [RFC v2 07/10] gpu: nova-core: populate GSP_VF_INFO when vGPU is enabled Date: Fri, 13 Mar 2026 18:53:31 +0200 Message-ID: <20260313165336.935771-8-zhiw@nvidia.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260313165336.935771-1-zhiw@nvidia.com> References: <20260313165336.935771-1-zhiw@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000011:EE_|DS0PR12MB7509:EE_ X-MS-Office365-Filtering-Correlation-Id: 960908f6-bf3f-454b-dfbc-08de81214b28 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|376014|7416014|1800799024|22082099003|56012099003|18002099003; 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The VF BAR information is stored in GSP_VF_INFO, which needs to be initialized and uploaded together with the GSP_SYSTEM_INFO. Populate GSP_VF_INFO when nova-core uploads the GSP_SYSTEM_INFO if NVIDIA vGPU is enabled. Cc: Joel Fernandes Cc: John Hubbard Cc: Alexandre Courbot Signed-off-by: Zhi Wang --- drivers/gpu/nova-core/gsp/boot.rs | 15 ++++++++-- drivers/gpu/nova-core/gsp/commands.rs | 16 ++++++++-- drivers/gpu/nova-core/gsp/fw.rs | 38 ++++++++++++++++++++++++ drivers/gpu/nova-core/gsp/fw/commands.rs | 12 +++++++- 4 files changed, 74 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/= boot.rs index 4238df5c8104..921d5e892f8a 100644 --- a/drivers/gpu/nova-core/gsp/boot.rs +++ b/drivers/gpu/nova-core/gsp/boot.rs @@ -41,7 +41,10 @@ gpu::Chipset, gsp::{ commands, - fw::LibosMemoryRegionInitArgument, + fw::{ + GspVfInfo, + LibosMemoryRegionInitArgument, // + }, sequencer::{ GspSequencer, GspSequencerParams, // @@ -349,11 +352,17 @@ pub(crate) fn boot( let wpr_meta =3D Coherent::::zeroed(dev, GFP_KERNEL)= ?; io_write!(wpr_meta, , GspFwWprMeta::new(&gsp_fw, &fb_layout)); =20 + let vf_info =3D if ctx.vgpu_requested { + Some(GspVfInfo::new(ctx.pdev)?) + } else { + None + }; + // Architecture-specific boot path if arch.uses_sec2_boot() { // SEC2 path: send commands before GSP reset/boot (original or= der). self.cmdq - .send_command_no_wait(bar, commands::SetSystemInfo::new(pd= ev, chipset))?; + .send_command_no_wait(bar, commands::SetSystemInfo::new(pd= ev, chipset, vf_info))?; self.cmdq .send_command_no_wait(bar, commands::SetRegistry::new())?; =20 @@ -395,7 +404,7 @@ pub(crate) fn boot( // For FSP path, send commands after GSP becomes active. if !arch.uses_sec2_boot() { self.cmdq - .send_command_no_wait(bar, commands::SetSystemInfo::new(pd= ev, chipset))?; + .send_command_no_wait(bar, commands::SetSystemInfo::new(pd= ev, chipset, vf_info))?; self.cmdq .send_command_no_wait(bar, commands::SetRegistry::new())?; } diff --git a/drivers/gpu/nova-core/gsp/commands.rs b/drivers/gpu/nova-core/= gsp/commands.rs index d31ee782ff8b..0445d05990e7 100644 --- a/drivers/gpu/nova-core/gsp/commands.rs +++ b/drivers/gpu/nova-core/gsp/commands.rs @@ -29,6 +29,7 @@ }, fw::{ commands::*, + GspVfInfo, MsgFunction, // }, }, @@ -39,12 +40,21 @@ pub(crate) struct SetSystemInfo<'a> { pdev: &'a pci::Device, chipset: Chipset, + vf_info: Option, } =20 impl<'a> SetSystemInfo<'a> { /// Creates a new `GspSetSystemInfo` command using the parameters of `= pdev`. - pub(crate) fn new(pdev: &'a pci::Device, chipset: Chips= et) -> Self { - Self { pdev, chipset } + pub(crate) fn new( + pdev: &'a pci::Device, + chipset: Chipset, + vf_info: Option, + ) -> Self { + Self { + pdev, + chipset, + vf_info, + } } } =20 @@ -55,7 +65,7 @@ impl<'a> CommandToGsp for SetSystemInfo<'a> { type InitError =3D Error; =20 fn init(&self) -> impl Init { - GspSetSystemInfo::init(self.pdev, self.chipset) + GspSetSystemInfo::init(self.pdev, self.chipset, self.vf_info) } } =20 diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw= .rs index e5f8db74a677..6d56b9b920fb 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -10,7 +10,9 @@ use core::ops::Range; =20 use kernel::{ + device, dma::Coherent, + pci, prelude::*, ptr::{ Alignable, @@ -1309,3 +1311,39 @@ fn new(cmdq: &Cmdq) -> Self { }) } } + +/// VF information =E2=80=94 `gspVFInfo` in `GspSetSystemInfo`. +/// +/// Populated from the PCI SR-IOV extended capability when vGPU support +/// is enabled. +#[derive(Clone, Copy, Zeroable)] +#[repr(transparent)] +pub(crate) struct GspVfInfo(pub(crate) bindings::GSP_VF_INFO); + +impl GspVfInfo { + /// Reads SR-IOV capability data from the PCI extended configuration + /// space and builds the VF information required by GSP firmware. + pub(crate) fn new(pdev: &pci::Device) -> Result { + let total_vfs =3D pdev.sriov_get_totalvfs()?; + + let cfg =3D pdev.config_space_extended()?; + let sriov =3D pci::ExtSriovCapability::find(&cfg)?; + + Ok(GspVfInfo(bindings::GSP_VF_INFO { + totalVFs: u32::from(total_vfs), + firstVFOffset: u32::from(kernel::io_read!(sriov, .vf_offset)), + FirstVFBar0Address: u64::from(kernel::io_read!(sriov, .vf_bar[= 0]?)), + b64bitBar1: u8::from(sriov.vf_bar_is_64bit(1)?), + FirstVFBar1Address: sriov.read_vf_bar64_addr(1)?, + b64bitBar2: u8::from(sriov.vf_bar_is_64bit(3)?), + FirstVFBar2Address: sriov.read_vf_bar64_addr(3)?, + ..Zeroable::zeroed() + })) + } +} + +// SAFETY: Padding is explicit and does not contain uninitialized data. +unsafe impl AsBytes for GspVfInfo {} + +// SAFETY: This struct only contains integer types for which all bit patte= rns are valid. +unsafe impl FromBytes for GspVfInfo {} diff --git a/drivers/gpu/nova-core/gsp/fw/commands.rs b/drivers/gpu/nova-co= re/gsp/fw/commands.rs index c9822fcbc499..3edd451e531b 100644 --- a/drivers/gpu/nova-core/gsp/fw/commands.rs +++ b/drivers/gpu/nova-core/gsp/fw/commands.rs @@ -15,7 +15,10 @@ Architecture, Chipset, // }, - gsp::GSP_PAGE_SIZE, // + gsp::{ + fw::GspVfInfo, + GSP_PAGE_SIZE, // + }, }; =20 use super::bindings; @@ -33,6 +36,7 @@ impl GspSetSystemInfo { pub(crate) fn init<'a>( dev: &'a pci::Device, chipset: Chipset, + vf_info: Option, ) -> impl Init + 'a { type InnerGspSystemInfo =3D bindings::GspSystemInfo; let init_inner =3D try_init!(InnerGspSystemInfo { @@ -57,6 +61,12 @@ pub(crate) fn init<'a>( bIsPrimary: 0, bPreserveVideoMemoryAllocations: 0, ..Zeroable::init_zeroed() + }) + .chain(move |si| { + if let Some(vf) =3D vf_info { + si.gspVFInfo =3D vf.0; + } + Ok(()) }); =20 try_init!(GspSetSystemInfo { --=20 2.51.0