From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B03E29993D; Fri, 13 Mar 2026 01:52:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366741; cv=none; b=Wbj2sqailzC5BEYqM1tiodVfiW4LzRCTBruURE+DaV/AI573OQKZcuiUhPcMNPI8H3p5xtcSGxPRMztzfCXbZwMUngTrxB9r15YC9xVjLpLNdPaehoR55nJG54rS5eaQdOZaoigoGWJsvsqgN9gM5cHUkXZC2qsy3ZKsgAb8xos= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366741; c=relaxed/simple; bh=e7n6gmt/VJvrflZ91gaAWMC2i5y1tb7wbi/GVIv6ung=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UE/jwIrqzlYVqsTUtr3dra9C8WrJTc73TpsNTyGzWxO4Sljyg05ta0g34f6fzOzr0OT2Q246rKZzBeYdxAYdYSgCi2h9iK0rOYU0m61e4Jye6x7q5A3wH6rt6XkNnMfEMzEVoMELBgWtI38lbardyxIPhRLO7ON+/oa1hlLGphk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=O/6/QLOG; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="O/6/QLOG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366740; x=1804902740; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=e7n6gmt/VJvrflZ91gaAWMC2i5y1tb7wbi/GVIv6ung=; b=O/6/QLOGRqTQEii5a0PvmnMr2lGB6kOjG4JnYh6FaFGXNS+NfipcTMMw jln/gn6T8CJPrbxP2T/wRc2g9mcNIyZihMxi5VF73BGBQWOhulCwDILcV YkdJ37qPP+v7mM2OkyfAaoSbJbEsjLIbqgOoXCgUysiXjv881sA5h3hr7 TQ32gw1GTP0WfPMFnfjQN5Cq71PC2yzvLn++O4sVTZgsWutuOkvN/MImA Ksi/DlQqkE1vvriZMrsNTYSn448DMg5uA7cbiBNwOBLvj52uno5js2B5J T7N7hlz5nXAGzvhibvrb+lFvw7cxQ+lvBTBIGZol4P3KwRYLNYBJj1OMd g==; X-CSE-ConnectionGUID: 6MJX1CB5Qt+6oZIoUrVLWA== X-CSE-MsgGUID: SQhiWATSR7ecfi/2AbT+Fw== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354536" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354536" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: Cmu18mG3Shqnlc3/ngs5kQ== X-CSE-MsgGUID: PwQ/aNEySxqS40T2mRYebw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108468" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, "Michael J . Ruhl" Subject: [PATCH 01/22] platform/x86/intel/vsec: Refactor base_addr handling Date: Thu, 12 Mar 2026 18:51:40 -0700 Message-ID: <20260313015202.3660072-2-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The base_addr field in intel_vsec_platform_info was originally added to support devices that emulate PCI VSEC capabilities in MMIO. Previously, the code would check at registration time whether base_addr was set, falling back to the PCI BAR if not. Refactor this by making base_addr an explicit function parameter. This clarifies ownership of the value and removes conditional logic from intel_vsec_add_dev(). It also enables making intel_vsec_platform_info const in a later patch, since the function no longer needs to write to info->base_addr. No functional change intended. Signed-off-by: David E. Box Reviewed-by: Michael J. Ruhl --- Previous change log: Changes in v7: - No change =20 Changes in v6: - No change =20 Changes in v5: - No change =20 Changes in v4: - No change =20 Changes in v3: - No change =20 Changes in v2: - Use pci_resource_start() macro instead of direct pdev->resource array access (suggested by Ilpo) drivers/platform/x86/intel/vsec.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 5059d320edf8..46966edca03b 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -271,14 +271,13 @@ EXPORT_SYMBOL_NS_GPL(intel_vsec_add_aux, "INTEL_VSEC"= ); =20 static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_head= er *header, struct intel_vsec_platform_info *info, - unsigned long cap_id) + unsigned long cap_id, u64 base_addr) { struct intel_vsec_device __free(kfree) *intel_vsec_dev =3D NULL; struct resource __free(kfree) *res =3D NULL; struct resource *tmp; struct device *parent; unsigned long quirks =3D info->quirks; - u64 base_addr; int i; =20 if (info->parent) @@ -310,11 +309,6 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, st= ruct intel_vsec_header *he if (quirks & VSEC_QUIRK_TABLE_SHIFT) header->offset >>=3D TABLE_OFFSET_SHIFT; =20 - if (info->base_addr) - base_addr =3D info->base_addr; - else - base_addr =3D pdev->resource[header->tbir].start; - /* * The DVSEC/VSEC contains the starting offset and count for a block of * discovery tables. Create a resource array of these tables to the @@ -412,7 +406,8 @@ static int get_cap_id(u32 header_id, unsigned long *cap= _id) =20 static int intel_vsec_register_device(struct pci_dev *pdev, struct intel_vsec_header *header, - struct intel_vsec_platform_info *info) + struct intel_vsec_platform_info *info, + u64 base_addr) { const struct vsec_feature_dependency *consumer_deps; struct vsec_priv *priv; @@ -428,7 +423,7 @@ static int intel_vsec_register_device(struct pci_dev *p= dev, * For others using the exported APIs, add the device directly. */ if (!pci_match_id(intel_vsec_pci_ids, pdev)) - return intel_vsec_add_dev(pdev, header, info, cap_id); + return intel_vsec_add_dev(pdev, header, info, cap_id, base_addr); =20 priv =3D pci_get_drvdata(pdev); if (priv->state[cap_id] =3D=3D STATE_REGISTERED || @@ -444,7 +439,7 @@ static int intel_vsec_register_device(struct pci_dev *p= dev, =20 consumer_deps =3D get_consumer_dependencies(priv, cap_id); if (!consumer_deps || suppliers_ready(priv, consumer_deps, cap_id)) { - ret =3D intel_vsec_add_dev(pdev, header, info, cap_id); + ret =3D intel_vsec_add_dev(pdev, header, info, cap_id, base_addr); if (ret) priv->state[cap_id] =3D STATE_SKIP; else @@ -464,7 +459,7 @@ static bool intel_vsec_walk_header(struct pci_dev *pdev, int ret; =20 for ( ; *header; header++) { - ret =3D intel_vsec_register_device(pdev, *header, info); + ret =3D intel_vsec_register_device(pdev, *header, info, info->base_addr); if (!ret) have_devices =3D true; } @@ -512,7 +507,8 @@ static bool intel_vsec_walk_dvsec(struct pci_dev *pdev, pci_read_config_dword(pdev, pos + PCI_DVSEC_HEADER2, &hdr); header.id =3D PCI_DVSEC_HEADER2_ID(hdr); =20 - ret =3D intel_vsec_register_device(pdev, &header, info); + ret =3D intel_vsec_register_device(pdev, &header, info, + pci_resource_start(pdev, header.tbir)); if (ret) continue; =20 @@ -557,7 +553,8 @@ static bool intel_vsec_walk_vsec(struct pci_dev *pdev, header.tbir =3D INTEL_DVSEC_TABLE_BAR(table); header.offset =3D INTEL_DVSEC_TABLE_OFFSET(table); =20 - ret =3D intel_vsec_register_device(pdev, &header, info); + ret =3D intel_vsec_register_device(pdev, &header, info, + pci_resource_start(pdev, header.tbir)); if (ret) continue; =20 --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC7232FE59B; Fri, 13 Mar 2026 01:52:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366741; cv=none; b=HsSwLShQs9ffX+/HR5G+ckIXdjWGzMkYlDsF9Z9ZFJ0mJq/Kxob5Nu7jlKRQ+O2K4BgTLtf8+88VrvJHo3LutnAQ9Vj7E22UCw3eyYZYDPLAUToMvrjL9K2h/O6z8hZLPca6iOVuURUASHdHKsM2bnT4l+ocG7cyr6KHW9jfTGI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366741; c=relaxed/simple; bh=WONamGQbXptDRGDmdLHUEBW84LXUS7Uj3t8SsXitEYo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, "Michael J . Ruhl" Subject: [PATCH 02/22] platform/x86/intel/vsec: Make driver_data info const Date: Thu, 12 Mar 2026 18:51:41 -0700 Message-ID: <20260313015202.3660072-3-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Treat PCI id->driver_data (intel_vsec_platform_info) as read-only by making vsec_priv->info a const pointer and updating all function signatures to accept const intel_vsec_platform_info *. This improves const-correctness and clarifies that the platform info data from the driver_data table is not meant to be modified at runtime. No functional changes intended. Signed-off-by: David E. Box Reviewed-by: Michael J. Ruhl --- Previous changelog: Changes in v7: - No change =20 Changes in v6: - No change =20 Changes in v5: - No change =20 Changes in v4: - No change =20 Changes in v3: - No change =20 Changes in v2: - New patch drivers/platform/x86/intel/vsec.c | 20 ++++++++++---------- include/linux/intel_vsec.h | 4 ++-- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 46966edca03b..e0096be605d9 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -42,7 +42,7 @@ enum vsec_device_state { }; =20 struct vsec_priv { - struct intel_vsec_platform_info *info; + const struct intel_vsec_platform_info *info; struct device *suppliers[VSEC_FEATURE_COUNT]; struct oobmsm_plat_info plat_info; enum vsec_device_state state[VSEC_FEATURE_COUNT]; @@ -270,7 +270,7 @@ int intel_vsec_add_aux(struct pci_dev *pdev, struct dev= ice *parent, EXPORT_SYMBOL_NS_GPL(intel_vsec_add_aux, "INTEL_VSEC"); =20 static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_head= er *header, - struct intel_vsec_platform_info *info, + const struct intel_vsec_platform_info *info, unsigned long cap_id, u64 base_addr) { struct intel_vsec_device __free(kfree) *intel_vsec_dev =3D NULL; @@ -406,7 +406,7 @@ static int get_cap_id(u32 header_id, unsigned long *cap= _id) =20 static int intel_vsec_register_device(struct pci_dev *pdev, struct intel_vsec_header *header, - struct intel_vsec_platform_info *info, + const struct intel_vsec_platform_info *info, u64 base_addr) { const struct vsec_feature_dependency *consumer_deps; @@ -452,7 +452,7 @@ static int intel_vsec_register_device(struct pci_dev *p= dev, } =20 static bool intel_vsec_walk_header(struct pci_dev *pdev, - struct intel_vsec_platform_info *info) + const struct intel_vsec_platform_info *info) { struct intel_vsec_header **header =3D info->headers; bool have_devices =3D false; @@ -468,7 +468,7 @@ static bool intel_vsec_walk_header(struct pci_dev *pdev, } =20 static bool intel_vsec_walk_dvsec(struct pci_dev *pdev, - struct intel_vsec_platform_info *info) + const struct intel_vsec_platform_info *info) { bool have_devices =3D false; int pos =3D 0; @@ -519,7 +519,7 @@ static bool intel_vsec_walk_dvsec(struct pci_dev *pdev, } =20 static bool intel_vsec_walk_vsec(struct pci_dev *pdev, - struct intel_vsec_platform_info *info) + const struct intel_vsec_platform_info *info) { bool have_devices =3D false; int pos =3D 0; @@ -565,7 +565,7 @@ static bool intel_vsec_walk_vsec(struct pci_dev *pdev, } =20 int intel_vsec_register(struct pci_dev *pdev, - struct intel_vsec_platform_info *info) + const struct intel_vsec_platform_info *info) { if (!pdev || !info || !info->headers) return -EINVAL; @@ -578,7 +578,7 @@ int intel_vsec_register(struct pci_dev *pdev, EXPORT_SYMBOL_NS_GPL(intel_vsec_register, "INTEL_VSEC"); =20 static bool intel_vsec_get_features(struct pci_dev *pdev, - struct intel_vsec_platform_info *info) + const struct intel_vsec_platform_info *info) { bool found =3D false; =20 @@ -622,7 +622,7 @@ static void intel_vsec_skip_missing_dependencies(struct= pci_dev *pdev) =20 static int intel_vsec_pci_probe(struct pci_dev *pdev, const struct pci_dev= ice_id *id) { - struct intel_vsec_platform_info *info; + const struct intel_vsec_platform_info *info; struct vsec_priv *priv; int num_caps, ret; int run_once =3D 0; @@ -633,7 +633,7 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, c= onst struct pci_device_id return ret; =20 pci_save_state(pdev); - info =3D (struct intel_vsec_platform_info *)id->driver_data; + info =3D (const struct intel_vsec_platform_info *)id->driver_data; if (!info) return -EINVAL; =20 diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index 1a0f357c2427..d551174b0049 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -200,13 +200,13 @@ static inline struct intel_vsec_device *auxdev_to_ivd= ev(struct auxiliary_device =20 #if IS_ENABLED(CONFIG_INTEL_VSEC) int intel_vsec_register(struct pci_dev *pdev, - struct intel_vsec_platform_info *info); + const struct intel_vsec_platform_info *info); int intel_vsec_set_mapping(struct oobmsm_plat_info *plat_info, struct intel_vsec_device *vsec_dev); struct oobmsm_plat_info *intel_vsec_get_mapping(struct pci_dev *pdev); #else static inline int intel_vsec_register(struct pci_dev *pdev, - struct intel_vsec_platform_info *info) + const struct intel_vsec_platform_info *info) { return -ENODEV; } --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DB563264DB; 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Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, "Michael J . Ruhl" Subject: [PATCH 03/22] platform/x86/intel/vsec: Decouple add/link helpers from PCI Date: Thu, 12 Mar 2026 18:51:42 -0700 Message-ID: <20260313015202.3660072-4-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This refactor prepares for adding ACPI-enumerated PMT endpoints. While intel_vsec is bound to PCI today, some helpers are used by code that will also register PMT endpoints from non-PCI (ACPI) paths. Clean up PCI-specific plumbing where it isn=E2=80=99t strictly required and rely on = generic struct device where possible. Signed-off-by: David E. Box Reviewed-by: Ilpo J=C3=A4rvinen Reviewed-by: Michael J. Ruhl --- Previous changelog: Changes in v7: - Correct the remaining struct device * argument to intel_vsec_add_aux(). When dropping the unused first argument in v6, the device parameter was inadvertently changed from &vsec_dev->auxdev.dev to the PCI device. Restore the aux device. =20 Changes in v6: - No change =20 Changes in v5: - No change =20 Changes in v4: - No change =20 Changes in v3: - No change =20 Changes in v2: - No change (previous patch 1) =20 drivers/platform/x86/intel/vsec.c | 13 +++++++++---- drivers/platform/x86/intel/vsec_tpmi.c | 2 +- include/linux/intel_vsec.h | 2 +- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index e0096be605d9..938648b9ef09 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -158,18 +158,23 @@ static bool vsec_driver_present(int cap_id) */ static const struct pci_device_id intel_vsec_pci_ids[]; =20 -static int intel_vsec_link_devices(struct pci_dev *pdev, struct device *de= v, +static int intel_vsec_link_devices(struct device *parent, struct device *d= ev, int consumer_id) { const struct vsec_feature_dependency *deps; enum vsec_device_state *state; struct device **suppliers; struct vsec_priv *priv; + struct pci_dev *pdev; int supplier_id; =20 if (!consumer_id) return 0; =20 + if (!dev_is_pci(parent)) + return 0; + + pdev =3D to_pci_dev(parent); if (!pci_match_id(intel_vsec_pci_ids, pdev)) return 0; =20 @@ -204,7 +209,7 @@ static int intel_vsec_link_devices(struct pci_dev *pdev= , struct device *dev, return 0; } =20 -int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent, +int intel_vsec_add_aux(struct device *parent, struct intel_vsec_device *intel_vsec_dev, const char *name) { @@ -252,7 +257,7 @@ int intel_vsec_add_aux(struct pci_dev *pdev, struct dev= ice *parent, if (ret) goto cleanup_aux; =20 - ret =3D intel_vsec_link_devices(pdev, &auxdev->dev, intel_vsec_dev->cap_i= d); + ret =3D intel_vsec_link_devices(parent, &auxdev->dev, intel_vsec_dev->cap= _id); if (ret) goto cleanup_aux; =20 @@ -343,7 +348,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, str= uct intel_vsec_header *he * Pass the ownership of intel_vsec_dev and resource within it to * intel_vsec_add_aux() */ - return intel_vsec_add_aux(pdev, parent, no_free_ptr(intel_vsec_dev), + return intel_vsec_add_aux(parent, no_free_ptr(intel_vsec_dev), intel_vsec_name(header->id)); } =20 diff --git a/drivers/platform/x86/intel/vsec_tpmi.c b/drivers/platform/x86/= intel/vsec_tpmi.c index 98846e88d3d0..2298b6361094 100644 --- a/drivers/platform/x86/intel/vsec_tpmi.c +++ b/drivers/platform/x86/intel/vsec_tpmi.c @@ -655,7 +655,7 @@ static int tpmi_create_device(struct intel_tpmi_info *t= pmi_info, * feature_vsec_dev and res memory are also freed as part of * device deletion. */ - return intel_vsec_add_aux(vsec_dev->pcidev, &vsec_dev->auxdev.dev, + return intel_vsec_add_aux(&vsec_dev->auxdev.dev, feature_vsec_dev, feature_id_name); } =20 diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index d551174b0049..49a746ec0128 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -184,7 +184,7 @@ struct pmt_feature_group { struct telemetry_region regions[]; }; =20 -int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent, +int intel_vsec_add_aux(struct device *parent, struct intel_vsec_device *intel_vsec_dev, const char *name); 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X-CSE-ConnectionGUID: dFFXQMMgQtS8oP9sSavw4w== X-CSE-MsgGUID: KnY+LnFYSdqX0+ZDF3sjAw== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354548" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354548" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: kHXEvEzjStq25c3Vxu6ebw== X-CSE-MsgGUID: R/e6nbWqSeSzQcf36M2slA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108479" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 04/22] platform/x86/intel/vsec: Switch exported helpers from pci_dev to device Date: Thu, 12 Mar 2026 18:51:43 -0700 Message-ID: <20260313015202.3660072-5-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Preparatory refactor for ACPI-enumerated PMT endpoints. Several exported PMT/VSEC interfaces and structs carried struct pci_dev * even though callers only need a generic struct device. Move those to struct device * so the same APIs work for PCI and ACPI parents. Acked-by: Rodrigo Vivi Signed-off-by: David E. Box --- Previous changelog: Changes in v7: - Drop the change in this patch that converted the intel_vsec_add_aux() device argument to vsec_dev->dev (PCI device). Patch 3 fixes a prior regression where the argument was mistakenly changed from the auxdev device to the PCI device. Keep the auxdev (&vsec_dev->auxdev.dev) as intended. Changes in v6: - No change =20 Changes in v5: - xe_vsec.h: Remove forward declaration for pci_dev and add for device =20 Changes in v4: - No change =20 Changes in v3: - No change =20 Changes in v2: - Add forward declarations for struct device in class.h, telemetry.h - Restore struct pci_dev forward declaration in intel_vsec.h that was rem= oved - Remove base_addr parameter changes (moved to separate patch) - Remove erroneous hunk in intel_vsec_pci_probe() (review comments by Ilpo J=C3=A4rvinen) drivers/gpu/drm/xe/xe_debugfs.c | 2 +- drivers/gpu/drm/xe/xe_hwmon.c | 2 +- drivers/gpu/drm/xe/xe_vsec.c | 7 ++- drivers/gpu/drm/xe/xe_vsec.h | 4 +- drivers/platform/x86/intel/pmc/core.c | 4 +- .../platform/x86/intel/pmc/ssram_telemetry.c | 2 +- drivers/platform/x86/intel/pmt/class.c | 8 ++-- drivers/platform/x86/intel/pmt/class.h | 5 ++- drivers/platform/x86/intel/pmt/discovery.c | 4 +- drivers/platform/x86/intel/pmt/telemetry.c | 13 +++--- drivers/platform/x86/intel/pmt/telemetry.h | 12 ++--- drivers/platform/x86/intel/sdsi.c | 5 ++- drivers/platform/x86/intel/vsec.c | 44 +++++++++++-------- drivers/platform/x86/intel/vsec_tpmi.c | 6 +-- include/linux/intel_vsec.h | 13 +++--- 15 files changed, 71 insertions(+), 60 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugf= s.c index 844cfafe1ec7..ad2d8f179eb6 100644 --- a/drivers/gpu/drm/xe/xe_debugfs.c +++ b/drivers/gpu/drm/xe/xe_debugfs.c @@ -45,7 +45,7 @@ static void read_residency_counter(struct xe_device *xe, = struct xe_mmio *mmio, u64 residency =3D 0; int ret; =20 - ret =3D xe_pmt_telem_read(to_pci_dev(xe->drm.dev), + ret =3D xe_pmt_telem_read(xe->drm.dev, xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID), &residency, offset, sizeof(residency)); if (ret !=3D sizeof(residency)) { diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c index 0fd4d4f1014a..92e423a339f1 100644 --- a/drivers/gpu/drm/xe/xe_hwmon.c +++ b/drivers/gpu/drm/xe/xe_hwmon.c @@ -506,7 +506,7 @@ xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel= , long *energy) if (hwmon->xe->info.platform =3D=3D XE_BATTLEMAGE) { u64 pmt_val; =20 - ret =3D xe_pmt_telem_read(to_pci_dev(hwmon->xe->drm.dev), + ret =3D xe_pmt_telem_read(hwmon->xe->drm.dev, xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID), &pmt_val, BMG_ENERGY_STATUS_PMT_OFFSET, sizeof(pmt_val)); if (ret !=3D sizeof(pmt_val)) { diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c index 4ebb4dbe1c9b..a9baf0bfe572 100644 --- a/drivers/gpu/drm/xe/xe_vsec.c +++ b/drivers/gpu/drm/xe/xe_vsec.c @@ -140,10 +140,10 @@ static int xe_guid_decode(u32 guid, int *index, u32 *= offset) return 0; } =20 -int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t us= er_offset, +int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user= _offset, u32 count) { - struct xe_device *xe =3D pdev_to_xe_device(pdev); + struct xe_device *xe =3D kdev_to_xe_device(dev); void __iomem *telem_addr =3D xe->mmio.regs + BMG_TELEMETRY_OFFSET; u32 mem_region; u32 offset; @@ -198,7 +198,6 @@ void xe_vsec_init(struct xe_device *xe) { struct intel_vsec_platform_info *info; struct device *dev =3D xe->drm.dev; - struct pci_dev *pdev =3D to_pci_dev(dev); enum xe_vsec platform; =20 platform =3D get_platform_info(xe); @@ -221,6 +220,6 @@ void xe_vsec_init(struct xe_device *xe) * Register a VSEC. Cleanup is handled using device managed * resources. */ - intel_vsec_register(pdev, info); + intel_vsec_register(dev, info); } MODULE_IMPORT_NS("INTEL_VSEC"); diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h index dabfb4e02d70..a25b4e6e681b 100644 --- a/drivers/gpu/drm/xe/xe_vsec.h +++ b/drivers/gpu/drm/xe/xe_vsec.h @@ -6,10 +6,10 @@ =20 #include =20 -struct pci_dev; +struct device; struct xe_device; =20 void xe_vsec_init(struct xe_device *xe); -int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t us= er_offset, u32 count); +int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user= _offset, u32 count); =20 #endif diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/i= ntel/pmc/core.c index 02b303418d18..d91e1ab842d6 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -1315,7 +1315,7 @@ static struct telem_endpoint *pmc_core_register_endpo= int(struct pci_dev *pcidev, unsigned int i; =20 for (i =3D 0; guids[i]; i++) { - ep =3D pmt_telem_find_and_register_endpoint(pcidev, guids[i], 0); + ep =3D pmt_telem_find_and_register_endpoint(&pcidev->dev, guids[i], 0); if (!IS_ERR(ep)) return ep; } @@ -1600,7 +1600,7 @@ static int pmc_core_get_telem_info(struct pmc_dev *pm= cdev, struct pmc_dev_info * if (!pmc->map->lpm_req_guid) return -ENXIO; =20 - ep =3D pmt_telem_find_and_register_endpoint(pcidev, pmc->map->lpm_req_gu= id, 0); + ep =3D pmt_telem_find_and_register_endpoint(&pcidev->dev, pmc->map->lpm_= req_guid, 0); if (IS_ERR(ep)) { dev_dbg(&pmcdev->pdev->dev, "couldn't get telem endpoint %pe", ep); return -EPROBE_DEFER; diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 03fad9331fc0..6f6e83e70fc5 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -60,7 +60,7 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 s= sram_base, void __iomem info.base_addr =3D ssram_base; info.parent =3D &pcidev->dev; =20 - return intel_vsec_register(pcidev, &info); + return intel_vsec_register(&pcidev->dev, &info); } =20 static inline u64 get_base(void __iomem *addr, u32 offset) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index be3c8d9e4fff..b4c9964df807 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -60,11 +60,11 @@ pmt_memcpy64_fromio(void *to, const u64 __iomem *from, = size_t count) return count; } =20 -int pmt_telem_read_mmio(struct pci_dev *pdev, struct pmt_callbacks *cb, u3= 2 guid, void *buf, +int pmt_telem_read_mmio(struct device *dev, struct pmt_callbacks *cb, u32 = guid, void *buf, void __iomem *addr, loff_t off, u32 count) { if (cb && cb->read_telem) - return cb->read_telem(pdev, guid, buf, off, count); + return cb->read_telem(dev, guid, buf, off, count); =20 addr +=3D off; =20 @@ -99,7 +99,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj, if (count > entry->size - off) count =3D entry->size - off; =20 - count =3D pmt_telem_read_mmio(entry->pcidev, entry->cb, entry->header.gui= d, buf, + count =3D pmt_telem_read_mmio(entry->ep->dev, entry->cb, entry->header.gu= id, buf, entry->base, off, count); =20 return count; @@ -208,7 +208,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_en= try *entry, struct intel_vsec_device *ivdev, struct resource *disc_res) { - struct pci_dev *pci_dev =3D ivdev->pcidev; + struct pci_dev *pci_dev =3D to_pci_dev(ivdev->dev); struct device *dev =3D &ivdev->auxdev.dev; struct intel_pmt_header *header =3D &entry->header; u8 bir; diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index 3c5ad5f52bca..1ae56a5baad2 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -19,11 +19,12 @@ #define GET_BIR(v) ((v) & GENMASK(2, 0)) #define GET_ADDRESS(v) ((v) & GENMASK(31, 3)) =20 +struct device; struct pci_dev; extern struct class intel_pmt_class; =20 struct telem_endpoint { - struct pci_dev *pcidev; + struct device *dev; struct telem_header header; struct pmt_callbacks *cb; void __iomem *base; @@ -65,7 +66,7 @@ struct intel_pmt_namespace { struct intel_pmt_entry *entry); }; =20 -int pmt_telem_read_mmio(struct pci_dev *pdev, struct pmt_callbacks *cb, u3= 2 guid, void *buf, +int pmt_telem_read_mmio(struct device *dev, struct pmt_callbacks *cb, u32 = guid, void *buf, void __iomem *addr, loff_t off, u32 count); bool intel_pmt_is_early_client_hw(struct device *dev); int intel_pmt_dev_create(struct intel_pmt_entry *entry, diff --git a/drivers/platform/x86/intel/pmt/discovery.c b/drivers/platform/= x86/intel/pmt/discovery.c index e500aa327d23..c482368bfaae 100644 --- a/drivers/platform/x86/intel/pmt/discovery.c +++ b/drivers/platform/x86/intel/pmt/discovery.c @@ -542,7 +542,7 @@ static int pmt_features_probe(struct auxiliary_device *= auxdev, const struct auxi if (!priv) return -ENOMEM; =20 - priv->parent =3D &ivdev->pcidev->dev; + priv->parent =3D ivdev->dev; auxiliary_set_drvdata(auxdev, priv); =20 priv->dev =3D device_create(&intel_pmt_class, &auxdev->dev, MKDEV(0, 0), = priv, @@ -609,7 +609,7 @@ void intel_pmt_get_features(struct intel_pmt_entry *ent= ry) =20 mutex_lock(&feature_list_lock); list_for_each_entry(feature, &pmt_feature_list, list) { - if (feature->priv->parent !=3D &entry->ep->pcidev->dev) + if (feature->priv->parent !=3D entry->ep->dev) continue; =20 pmt_get_features(entry, feature); diff --git a/drivers/platform/x86/intel/pmt/telemetry.c b/drivers/platform/= x86/intel/pmt/telemetry.c index a52803bfe124..bdc7c24a3678 100644 --- a/drivers/platform/x86/intel/pmt/telemetry.c +++ b/drivers/platform/x86/intel/pmt/telemetry.c @@ -112,7 +112,7 @@ static int pmt_telem_add_endpoint(struct intel_vsec_dev= ice *ivdev, return -ENOMEM; =20 ep =3D entry->ep; - ep->pcidev =3D ivdev->pcidev; + ep->dev =3D ivdev->dev; ep->header.access_type =3D entry->header.access_type; ep->header.guid =3D entry->header.guid; ep->header.base_offset =3D entry->header.base_offset; @@ -204,7 +204,7 @@ int pmt_telem_get_endpoint_info(int devid, struct telem= _endpoint_info *info) goto unlock; } =20 - info->pdev =3D entry->ep->pcidev; + info->dev =3D entry->ep->dev; info->header =3D entry->ep->header; =20 unlock: @@ -218,9 +218,10 @@ static int pmt_copy_region(struct telemetry_region *re= gion, struct intel_pmt_entry *entry) { =20 + struct pci_dev *pdev =3D to_pci_dev(entry->ep->dev); struct oobmsm_plat_info *plat_info; =20 - plat_info =3D intel_vsec_get_mapping(entry->ep->pcidev); + plat_info =3D intel_vsec_get_mapping(pdev); if (IS_ERR(plat_info)) return PTR_ERR(plat_info); =20 @@ -308,7 +309,7 @@ int pmt_telem_read(struct telem_endpoint *ep, u32 id, u= 64 *data, u32 count) if (offset + NUM_BYTES_QWORD(count) > size) return -EINVAL; =20 - pmt_telem_read_mmio(ep->pcidev, ep->cb, ep->header.guid, data, ep->base, = offset, + pmt_telem_read_mmio(ep->dev, ep->cb, ep->header.guid, data, ep->base, off= set, NUM_BYTES_QWORD(count)); =20 return ep->present ? 0 : -EPIPE; @@ -335,7 +336,7 @@ int pmt_telem_read32(struct telem_endpoint *ep, u32 id,= u32 *data, u32 count) EXPORT_SYMBOL_NS_GPL(pmt_telem_read32, "INTEL_PMT_TELEMETRY"); =20 struct telem_endpoint * -pmt_telem_find_and_register_endpoint(struct pci_dev *pcidev, u32 guid, u16= pos) +pmt_telem_find_and_register_endpoint(struct device *dev, u32 guid, u16 pos) { int devid =3D 0; int inst =3D 0; @@ -348,7 +349,7 @@ pmt_telem_find_and_register_endpoint(struct pci_dev *pc= idev, u32 guid, u16 pos) if (err) return ERR_PTR(err); =20 - if (ep_info.header.guid =3D=3D guid && ep_info.pdev =3D=3D pcidev) { + if (ep_info.header.guid =3D=3D guid && ep_info.dev =3D=3D dev) { if (inst =3D=3D pos) return pmt_telem_register_endpoint(devid); ++inst; diff --git a/drivers/platform/x86/intel/pmt/telemetry.h b/drivers/platform/= x86/intel/pmt/telemetry.h index d45af5512b4e..0f88c5e7d90e 100644 --- a/drivers/platform/x86/intel/pmt/telemetry.h +++ b/drivers/platform/x86/intel/pmt/telemetry.h @@ -6,8 +6,8 @@ #define PMT_TELEM_TELEMETRY 0 #define PMT_TELEM_CRASHLOG 1 =20 +struct device; struct telem_endpoint; -struct pci_dev; =20 struct telem_header { u8 access_type; @@ -17,7 +17,7 @@ struct telem_header { }; =20 struct telem_endpoint_info { - struct pci_dev *pdev; + struct device *dev; struct telem_header header; }; =20 @@ -71,8 +71,8 @@ int pmt_telem_get_endpoint_info(int devid, struct telem_e= ndpoint_info *info); =20 /** * pmt_telem_find_and_register_endpoint() - Get a telemetry endpoint from - * pci_dev device, guid and pos - * @pdev: PCI device inside the Intel vsec + * device, guid and pos + * @dev: device inside the Intel vsec * @guid: GUID of the telemetry space * @pos: Instance of the guid * @@ -80,8 +80,8 @@ int pmt_telem_get_endpoint_info(int devid, struct telem_e= ndpoint_info *info); * * endpoint - On success returns pointer to the telemetry endpoint * * -ENXIO - telemetry endpoint not found */ -struct telem_endpoint *pmt_telem_find_and_register_endpoint(struct pci_dev= *pcidev, - u32 guid, u16 pos); +struct telem_endpoint * +pmt_telem_find_and_register_endpoint(struct device *dev, u32 guid, u16 pos= ); =20 /** * pmt_telem_read() - Read qwords from counter sram using sample id diff --git a/drivers/platform/x86/intel/sdsi.c b/drivers/platform/x86/intel= /sdsi.c index da75f53d0bcc..d7e37d4ace23 100644 --- a/drivers/platform/x86/intel/sdsi.c +++ b/drivers/platform/x86/intel/sdsi.c @@ -599,13 +599,14 @@ static int sdsi_get_layout(struct sdsi_priv *priv, st= ruct disc_table *table) return 0; } =20 -static int sdsi_map_mbox_registers(struct sdsi_priv *priv, struct pci_dev = *parent, +static int sdsi_map_mbox_registers(struct sdsi_priv *priv, struct device *= dev, struct disc_table *disc_table, struct resource *disc_res) { u32 access_type =3D FIELD_GET(DT_ACCESS_TYPE, disc_table->access_info); u32 size =3D FIELD_GET(DT_SIZE, disc_table->access_info); u32 tbir =3D FIELD_GET(DT_TBIR, disc_table->offset); u32 offset =3D DT_OFFSET(disc_table->offset); + struct pci_dev *parent =3D to_pci_dev(dev); struct resource res =3D {}; =20 /* Starting location of SDSi MMIO region based on access type */ @@ -681,7 +682,7 @@ static int sdsi_probe(struct auxiliary_device *auxdev, = const struct auxiliary_de return ret; =20 /* Map the SDSi mailbox registers */ - ret =3D sdsi_map_mbox_registers(priv, intel_cap_dev->pcidev, &disc_table,= disc_res); + ret =3D sdsi_map_mbox_registers(priv, intel_cap_dev->dev, &disc_table, di= sc_res); if (ret) return ret; =20 diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 938648b9ef09..a547e4b98245 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -274,7 +274,7 @@ int intel_vsec_add_aux(struct device *parent, } EXPORT_SYMBOL_NS_GPL(intel_vsec_add_aux, "INTEL_VSEC"); =20 -static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_head= er *header, +static int intel_vsec_add_dev(struct device *dev, struct intel_vsec_header= *header, const struct intel_vsec_platform_info *info, unsigned long cap_id, u64 base_addr) { @@ -288,18 +288,18 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, s= truct intel_vsec_header *he if (info->parent) parent =3D info->parent; else - parent =3D &pdev->dev; + parent =3D dev; =20 if (!intel_vsec_supported(header->id, info->caps)) return -EINVAL; =20 if (!header->num_entries) { - dev_dbg(&pdev->dev, "Invalid 0 entry count for header id %d\n", header->= id); + dev_dbg(dev, "Invalid 0 entry count for header id %d\n", header->id); return -EINVAL; } =20 if (!header->entry_size) { - dev_dbg(&pdev->dev, "Invalid 0 entry size for header id %d\n", header->i= d); + dev_dbg(dev, "Invalid 0 entry size for header id %d\n", header->id); return -EINVAL; } =20 @@ -331,7 +331,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, str= uct intel_vsec_header *he release_mem_region(tmp->start, resource_size(tmp)); } =20 - intel_vsec_dev->pcidev =3D pdev; + intel_vsec_dev->dev =3D dev; intel_vsec_dev->resource =3D no_free_ptr(res); intel_vsec_dev->num_resources =3D header->num_entries; intel_vsec_dev->quirks =3D info->quirks; @@ -409,13 +409,14 @@ static int get_cap_id(u32 header_id, unsigned long *c= ap_id) return 0; } =20 -static int intel_vsec_register_device(struct pci_dev *pdev, +static int intel_vsec_register_device(struct device *dev, struct intel_vsec_header *header, const struct intel_vsec_platform_info *info, u64 base_addr) { const struct vsec_feature_dependency *consumer_deps; struct vsec_priv *priv; + struct pci_dev *pdev; unsigned long cap_id; int ret; =20 @@ -427,8 +428,12 @@ static int intel_vsec_register_device(struct pci_dev *= pdev, * Only track dependencies for devices probed by the VSEC driver. * For others using the exported APIs, add the device directly. */ + if (!dev_is_pci(dev)) + return intel_vsec_add_dev(dev, header, info, cap_id, base_addr); + + pdev =3D to_pci_dev(dev); if (!pci_match_id(intel_vsec_pci_ids, pdev)) - return intel_vsec_add_dev(pdev, header, info, cap_id, base_addr); + return intel_vsec_add_dev(dev, header, info, cap_id, base_addr); =20 priv =3D pci_get_drvdata(pdev); if (priv->state[cap_id] =3D=3D STATE_REGISTERED || @@ -444,7 +449,7 @@ static int intel_vsec_register_device(struct pci_dev *p= dev, =20 consumer_deps =3D get_consumer_dependencies(priv, cap_id); if (!consumer_deps || suppliers_ready(priv, consumer_deps, cap_id)) { - ret =3D intel_vsec_add_dev(pdev, header, info, cap_id, base_addr); + ret =3D intel_vsec_add_dev(dev, header, info, cap_id, base_addr); if (ret) priv->state[cap_id] =3D STATE_SKIP; else @@ -456,7 +461,7 @@ static int intel_vsec_register_device(struct pci_dev *p= dev, return -EAGAIN; } =20 -static bool intel_vsec_walk_header(struct pci_dev *pdev, +static bool intel_vsec_walk_header(struct device *dev, const struct intel_vsec_platform_info *info) { struct intel_vsec_header **header =3D info->headers; @@ -464,7 +469,7 @@ static bool intel_vsec_walk_header(struct pci_dev *pdev, int ret; =20 for ( ; *header; header++) { - ret =3D intel_vsec_register_device(pdev, *header, info, info->base_addr); + ret =3D intel_vsec_register_device(dev, *header, info, info->base_addr); if (!ret) have_devices =3D true; } @@ -512,7 +517,7 @@ static bool intel_vsec_walk_dvsec(struct pci_dev *pdev, pci_read_config_dword(pdev, pos + PCI_DVSEC_HEADER2, &hdr); header.id =3D PCI_DVSEC_HEADER2_ID(hdr); =20 - ret =3D intel_vsec_register_device(pdev, &header, info, + ret =3D intel_vsec_register_device(&pdev->dev, &header, info, pci_resource_start(pdev, header.tbir)); if (ret) continue; @@ -558,7 +563,7 @@ static bool intel_vsec_walk_vsec(struct pci_dev *pdev, header.tbir =3D INTEL_DVSEC_TABLE_BAR(table); header.offset =3D INTEL_DVSEC_TABLE_OFFSET(table); =20 - ret =3D intel_vsec_register_device(pdev, &header, info, + ret =3D intel_vsec_register_device(&pdev->dev, &header, info, pci_resource_start(pdev, header.tbir)); if (ret) continue; @@ -569,13 +574,13 @@ static bool intel_vsec_walk_vsec(struct pci_dev *pdev, return have_devices; } =20 -int intel_vsec_register(struct pci_dev *pdev, +int intel_vsec_register(struct device *dev, const struct intel_vsec_platform_info *info) { - if (!pdev || !info || !info->headers) + if (!dev || !info || !info->headers) return -EINVAL; =20 - if (!intel_vsec_walk_header(pdev, info)) + if (!intel_vsec_walk_header(dev, info)) return -ENODEV; else return 0; @@ -601,7 +606,7 @@ static bool intel_vsec_get_features(struct pci_dev *pde= v, found =3D true; =20 if (info && (info->quirks & VSEC_QUIRK_NO_DVSEC) && - intel_vsec_walk_header(pdev, info)) + intel_vsec_walk_header(&pdev->dev, info)) found =3D true; =20 return found; @@ -673,7 +678,10 @@ int intel_vsec_set_mapping(struct oobmsm_plat_info *pl= at_info, { struct vsec_priv *priv; =20 - priv =3D pci_get_drvdata(vsec_dev->pcidev); + if (!dev_is_pci(vsec_dev->dev)) + return -ENODEV; + + priv =3D pci_get_drvdata(to_pci_dev(vsec_dev->dev)); if (!priv) return -EINVAL; =20 @@ -821,7 +829,7 @@ static pci_ers_result_t intel_vsec_pci_slot_reset(struc= t pci_dev *pdev) =20 xa_for_each(&auxdev_array, index, intel_vsec_dev) { /* check if pdev doesn't match */ - if (pdev !=3D intel_vsec_dev->pcidev) + if (&pdev->dev !=3D intel_vsec_dev->dev) continue; devm_release_action(&pdev->dev, intel_vsec_remove_aux, &intel_vsec_dev->auxdev); diff --git a/drivers/platform/x86/intel/vsec_tpmi.c b/drivers/platform/x86/= intel/vsec_tpmi.c index 2298b6361094..9dddf4e5863e 100644 --- a/drivers/platform/x86/intel/vsec_tpmi.c +++ b/drivers/platform/x86/intel/vsec_tpmi.c @@ -530,7 +530,7 @@ static const struct file_operations mem_write_ops =3D { .release =3D single_release, }; =20 -#define tpmi_to_dev(info) (&info->vsec_dev->pcidev->dev) +#define tpmi_to_dev(info) ((info)->vsec_dev->dev) =20 static void tpmi_dbgfs_register(struct intel_tpmi_info *tpmi_info) { @@ -642,7 +642,7 @@ static int tpmi_create_device(struct intel_tpmi_info *t= pmi_info, tmp->flags =3D IORESOURCE_MEM; } =20 - feature_vsec_dev->pcidev =3D vsec_dev->pcidev; + feature_vsec_dev->dev =3D vsec_dev->dev; feature_vsec_dev->resource =3D res; feature_vsec_dev->num_resources =3D pfs->pfs_header.num_entries; feature_vsec_dev->priv_data =3D &tpmi_info->plat_info; @@ -742,7 +742,7 @@ static int tpmi_fetch_pfs_header(struct intel_tpmi_pm_f= eature *pfs, u64 start, i static int intel_vsec_tpmi_init(struct auxiliary_device *auxdev) { struct intel_vsec_device *vsec_dev =3D auxdev_to_ivdev(auxdev); - struct pci_dev *pci_dev =3D vsec_dev->pcidev; + struct pci_dev *pci_dev =3D to_pci_dev(vsec_dev->dev); struct intel_tpmi_info *tpmi_info; u64 pfs_start =3D 0; int ret, i; diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index 49a746ec0128..4eecb2a6bac4 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -29,6 +29,7 @@ #define INTEL_DVSEC_TABLE_OFFSET(x) ((x) & GENMASK(31, 3)) #define TABLE_OFFSET_SHIFT 3 =20 +struct device; struct pci_dev; struct resource; =20 @@ -82,14 +83,14 @@ enum intel_vsec_quirks { * struct pmt_callbacks - Callback infrastructure for PMT devices * @read_telem: when specified, called by client driver to access PMT * data (instead of direct copy). - * * pdev: PCI device reference for the callback's use + * * dev: device reference for the callback's use * * guid: ID of data to acccss * * data: buffer for the data to be copied * * off: offset into the requested buffer * * count: size of buffer */ struct pmt_callbacks { - int (*read_telem)(struct pci_dev *pdev, u32 guid, u64 *data, loff_t off, = u32 count); + int (*read_telem)(struct device *dev, u32 guid, u64 *data, loff_t off, u3= 2 count); }; =20 struct vsec_feature_dependency { @@ -122,7 +123,7 @@ struct intel_vsec_platform_info { /** * struct intel_vsec_device - Auxbus specific device information * @auxdev: auxbus device struct for auxbus access - * @pcidev: pci device associated with the device + * @dev: struct device associated with the device * @resource: any resources shared by the parent * @ida: id reference * @num_resources: number of resources @@ -135,7 +136,7 @@ struct intel_vsec_platform_info { */ struct intel_vsec_device { struct auxiliary_device auxdev; - struct pci_dev *pcidev; + struct device *dev; struct resource *resource; struct ida *ida; int num_resources; @@ -199,13 +200,13 @@ static inline struct intel_vsec_device *auxdev_to_ivd= ev(struct auxiliary_device } =20 #if IS_ENABLED(CONFIG_INTEL_VSEC) -int intel_vsec_register(struct pci_dev *pdev, +int intel_vsec_register(struct device *dev, const struct intel_vsec_platform_info *info); int intel_vsec_set_mapping(struct oobmsm_plat_info *plat_info, struct intel_vsec_device *vsec_dev); struct oobmsm_plat_info *intel_vsec_get_mapping(struct pci_dev *pdev); #else -static inline int intel_vsec_register(struct pci_dev *pdev, +static inline int intel_vsec_register(struct device *dev, const struct intel_vsec_platform_info *info) { return -ENODEV; --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7159331A65; Fri, 13 Mar 2026 01:52:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366743; cv=none; b=JlGl0Ar0ZH1qNKfVxsUAKdAqvTEEA3qQMu7iD1nK0WcnPYMvE16S0VqY8t2CVERnabt0omRKlCMsyEp8uqdUid7YQbUtvWIMeFqmzMpIgscvlOutVhfs7IXb6N/lcnAeb840lh2M9ozhQrLPf+ZNmNrvNrnVIrc6MPbbAJFALQ0= ARC-Message-Signature: i=1; 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d="scan'208";a="220108481" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 05/22] platform/x86/intel/vsec: Return real error codes from registration path Date: Thu, 12 Mar 2026 18:51:44 -0700 Message-ID: <20260313015202.3660072-6-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Stop collapsing registration results into booleans. Make intel_vsec_walk_header() return int and propagate the first non-zero error from intel_vsec_register_device(). intel_vsec_register() now returns that error directly and 0 on success. This preserves success behavior while surfacing meaningful errors instead of hiding them behind a bool/-ENODEV, which makes debugging and probe ordering issues clearer. Reviewed-by: Ilpo J=C3=A4rvinen Signed-off-by: David E. Box --- Previous changelog: Changes in v7: - No change =20 Changes in v6: - No change =20 Changes in v5: - No change =20 Changes in v4: - No change =20 Changes in v3: - No change =20 Changes in v2: - No change (previous patch 3) drivers/platform/x86/intel/vsec.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index a547e4b98245..34b2c19ecff0 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -461,20 +461,19 @@ static int intel_vsec_register_device(struct device *= dev, return -EAGAIN; } =20 -static bool intel_vsec_walk_header(struct device *dev, - const struct intel_vsec_platform_info *info) +static int intel_vsec_walk_header(struct device *dev, + const struct intel_vsec_platform_info *info) { struct intel_vsec_header **header =3D info->headers; - bool have_devices =3D false; int ret; =20 for ( ; *header; header++) { ret =3D intel_vsec_register_device(dev, *header, info, info->base_addr); - if (!ret) - have_devices =3D true; + if (ret) + return ret; } =20 - return have_devices; + return 0; } =20 static bool intel_vsec_walk_dvsec(struct pci_dev *pdev, @@ -580,10 +579,7 @@ int intel_vsec_register(struct device *dev, if (!dev || !info || !info->headers) return -EINVAL; =20 - if (!intel_vsec_walk_header(dev, info)) - return -ENODEV; - else - return 0; + return intel_vsec_walk_header(dev, info); } EXPORT_SYMBOL_NS_GPL(intel_vsec_register, "INTEL_VSEC"); =20 --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2FFA332919; Fri, 13 Mar 2026 01:52:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366743; cv=none; b=A0F/9jc+nVQXGNJEZ9EhLJEXHYk69nnn02QeJVf8voDfVdYKSJxH7hI2TXHvFnBnkrtNLU1minE1QiFc2hKNRgEaU+oXBHFGHXgIcWd5Uqi992H/HadtD237QFcSj6Jm5bNfsfL6SgcWP2uqDL195WSPoxRKZ0/WwnaYuA6OiKk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366743; c=relaxed/simple; bh=zekN0HwiIvxOapPmkqVTiox/ehyWXXQRcyg8Gec4a1I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WupjjdGb9u/ehoPttqwJdOSaHAIRgWsPmJnjQ1EPQGX+b7Z/myAw0ohH7gww03Yi6KsZoL5gV8+w/7JZA8A+UuuntOKSHInNTsOew+rppG6am0vQ8jRqYiB40FKw0pnE9bRsOSZkFcFTi/Eby1nbYHoltwO0DzzK+G0pjKSVkmo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=mUM51uoE; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mUM51uoE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366742; x=1804902742; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zekN0HwiIvxOapPmkqVTiox/ehyWXXQRcyg8Gec4a1I=; b=mUM51uoEdxZqzKr5WsxTENYdZ8dLufURmhwWeBFq6er41h6u0FHC7KhY cZu2f1ni49arRfrZiaBHJ4zuLGHOrZZRKskTn9dUa4X8UO7H9VhaWCw0c Vhp1L1ElHobmLOhExjJSEaqgVI9DykjMhoE9r7xGJQ5LfmCh+KEALMFE0 JCxxeJpg1URX0Apgz8D1p+N0emvRIcmsTHgP4rYm9BFD3bjvKzQUgZsX9 xn1t3592XXSd094uchnxcnSM6/2ylCVyJeLMZn/6s61UrnPaSkTSUlzSw LPlxHthnWQ+fmtMzWXfljBqIrLqkNjKhV0N2L5M7jMwuh4PQ+HxL31xGw w==; X-CSE-ConnectionGUID: g2TbAWkLSZeMHgyx0SpS5A== X-CSE-MsgGUID: /0jvBP7/TwOwUjSr16MnpQ== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354556" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354556" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: v1qVw0lJShCSNA3+7Yw+sw== X-CSE-MsgGUID: vz6Bbs3SQamaPWZKx9TVbg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108484" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 06/22] platform/x86/intel/vsec: Plumb ACPI PMT discovery tables through vsec Date: Thu, 12 Mar 2026 18:51:45 -0700 Message-ID: <20260313015202.3660072-7-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some platforms expose PMT discovery via ACPI instead of PCI BARs. Add a generic discovery source flag and carry ACPI discovery entries alongside the existing PCI resource path so PMT clients can consume either. Changes: - Add enum intel_vsec_disc_source { _PCI, _ACPI }. - Extend intel_vsec_platform_info and intel_vsec_device with source enum and ACPI discovery table pointer/ - When src=3D=3DACPI, skip BAR resource setup and copy the ACPI discovery entries into the aux device. No user-visible behavior change yet; this only wires ACPI data through vsec in preparation for ACPI-enumerated PMT clients. Signed-off-by: David E. Box --- Previous changelog: Changes in v7: - No change Changes in v6: - Fix checkpatch parens alignment warning =20 Changes in v5: - No change =20 Changes in v4: - Use check_mul_overflow() instead of array_size() which was incorrectly checking for 0 anyway. =20 Changes in v3: - Re-send with all changes intended for v2 which was sent without them being applied. =20 Changes in v2: - Improve comment to clarify BAR resource setup doesn't apply to ACPI discovery - Add missing #include for kmemdup() - Use array_size() for overflow protection (review comments by Ilpo J=C3=A4rvinen) drivers/platform/x86/intel/vsec.c | 23 +++++++++++++++++++++++ include/linux/intel_vsec.h | 20 +++++++++++++++++++- 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 34b2c19ecff0..7d5dbc1c1d05 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -24,7 +24,9 @@ #include #include #include +#include #include +#include #include =20 #define PMT_XA_START 0 @@ -109,6 +111,7 @@ static void intel_vsec_dev_release(struct device *dev) =20 ida_free(intel_vsec_dev->ida, intel_vsec_dev->auxdev.id); =20 + kfree(intel_vsec_dev->acpi_disc); kfree(intel_vsec_dev->resource); kfree(intel_vsec_dev); } @@ -320,6 +323,13 @@ static int intel_vsec_add_dev(struct device *dev, stru= ct intel_vsec_header *head * auxiliary device driver. */ for (i =3D 0, tmp =3D res; i < header->num_entries; i++, tmp++) { + /* + * Skip resource mapping check for ACPI-based discovery + * since those tables are read from _DSD, not MMIO. + */ + if (info->src =3D=3D INTEL_VSEC_DISC_ACPI) + break; + tmp->start =3D base_addr + header->offset + i * (header->entry_size * si= zeof(u32)); tmp->end =3D tmp->start + (header->entry_size * sizeof(u32)) - 1; tmp->flags =3D IORESOURCE_MEM; @@ -338,6 +348,19 @@ static int intel_vsec_add_dev(struct device *dev, stru= ct intel_vsec_header *head intel_vsec_dev->base_addr =3D info->base_addr; intel_vsec_dev->priv_data =3D info->priv_data; intel_vsec_dev->cap_id =3D cap_id; + intel_vsec_dev->src =3D info->src; + + if (info->src =3D=3D INTEL_VSEC_DISC_ACPI) { + size_t bytes; + + if (check_mul_overflow(intel_vsec_dev->num_resources, + sizeof(*info->acpi_disc), &bytes)) + return -EOVERFLOW; + + intel_vsec_dev->acpi_disc =3D kmemdup(info->acpi_disc, bytes, GFP_KERNEL= ); + if (!intel_vsec_dev->acpi_disc) + return -ENOMEM; + } =20 if (header->id =3D=3D VSEC_ID_SDSI) intel_vsec_dev->ida =3D &intel_vsec_sdsi_ida; diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index 4eecb2a6bac4..1fe5665a9d02 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -33,6 +33,11 @@ struct device; struct pci_dev; struct resource; =20 +enum intel_vsec_disc_source { + INTEL_VSEC_DISC_PCI, /* PCI, default */ + INTEL_VSEC_DISC_ACPI, /* ACPI */ +}; + enum intel_vsec_id { VSEC_ID_TELEMETRY =3D 2, VSEC_ID_WATCHER =3D 3, @@ -103,6 +108,10 @@ struct vsec_feature_dependency { * @parent: parent device in the auxbus chain * @headers: list of headers to define the PMT client devices to create * @deps: array of feature dependencies + * @acpi_disc: ACPI discovery tables, each entry is two QWORDs + * in little-endian format as defined by the PMT ACPI spec. + * Valid only when @provider =3D=3D INTEL_VSEC_DISC_ACPI. + * @src: source of discovery table data * @priv_data: private data, usable by parent devices, currently a callback * @caps: bitmask of PMT capabilities for the given headers * @quirks: bitmask of VSEC device quirks @@ -113,6 +122,8 @@ struct intel_vsec_platform_info { struct device *parent; struct intel_vsec_header **headers; const struct vsec_feature_dependency *deps; + u32 (*acpi_disc)[4]; + enum intel_vsec_disc_source src; void *priv_data; unsigned long caps; unsigned long quirks; @@ -124,7 +135,12 @@ struct intel_vsec_platform_info { * struct intel_vsec_device - Auxbus specific device information * @auxdev: auxbus device struct for auxbus access * @dev: struct device associated with the device - * @resource: any resources shared by the parent + * @resource: PCI discovery resources (BAR windows), one per discovery + * instance. Valid only when @src =3D=3D INTEL_VSEC_DISC_P= CI + * @acpi_disc: ACPI discovery tables, each entry is two QWORDs + * in little-endian format as defined by the PMT ACPI spec. + * Valid only when @src =3D=3D INTEL_VSEC_DISC_ACPI. + * @src: source of discovery table data * @ida: id reference * @num_resources: number of resources * @id: xarray id @@ -138,6 +154,8 @@ struct intel_vsec_device { struct auxiliary_device auxdev; struct device *dev; struct resource *resource; + u32 (*acpi_disc)[4]; + enum intel_vsec_disc_source src; struct ida *ida; int num_resources; int id; /* xa */ --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 464C23368B4; Fri, 13 Mar 2026 01:52:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366744; cv=none; b=g7cO7lwKHtzV8L8NZkB+2g01asE9o4or+RgXZfs3kEPwGyW9ZXRxnumC4wqyr2RzMStDwMkRlADul/9sTt7blWef8qyDe3cunrOpynQUJI7f21iTfzSe0t38Q+TK1YMxQpSBoc3BW0DOZG4PKBJ/aVaJPH+WBJa9UI7fop4AWf0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366744; c=relaxed/simple; bh=ZabcyUbRxdBA5HUViTeJoUjAM565/XUWPbCRb8PlGHk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ugfoGnoi7twSlakdTfd84HUlVfGB3pPsJUtKIynYrOJuemaLBLQ78+IIDTnkYnv3toZD/tvvOBaXZT0rReCfboJgT8GPVc2ctMhJC/WflOBsioXGXpYFVi1sXCFFj6SXq1Q/KRJ7RJgkQlJKTKIhpkrmNtxzR++1t/+WOsh3JzU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dONeIEIG; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dONeIEIG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366743; x=1804902743; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZabcyUbRxdBA5HUViTeJoUjAM565/XUWPbCRb8PlGHk=; b=dONeIEIGn8NTCz9+PzsdGixH2r1WGZLlJz78r64xbSGecLg08DAPO/L+ ZWONQB1ZXAmtggyTcXdJtfylefsk0sQg2iqmhV3S2p0d/IDFiaZ30yBKO oLQtUUqWXMB4swpoln2dQcdUCNQ/rM9yEyK9IIg4pEfPp3I9QnAl3/Z4g OrIXGnRovGtR9ytNm6av0ROkG9YBIc/kSVCBorJk354Bb/RXGcn+eys+y 3t5NTcY3gozx9+JwQOjoxTR4xX+sQ34LP2t53iYQe034rRo+dgx68vCrX QyYbe8BBwjicU8FXkwHF3ekinKqYK/GnSTJ4OMVt+fYWy0ROe81CFu6BM Q==; X-CSE-ConnectionGUID: hi5EpR9AS7y/tLy4quaGgw== X-CSE-MsgGUID: XXeKE6FeS2G27iInD1shJQ== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354563" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354563" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: 7S9QgKuTTeW8NEXwnwyRcQ== X-CSE-MsgGUID: gYWkRIIqRY2idnw7jytamQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108487" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 07/22] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing Date: Thu, 12 Mar 2026 18:51:46 -0700 Message-ID: <20260313015202.3660072-8-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add optional pre- and post-decode callbacks to the PMT class so namespaces can perform setup and cleanup steps around header parsing. - Add pmt_pre_decode() and pmt_post_decode() to struct intel_pmt_namespace. - Update intel_pmt_dev_create() to invoke, in order: pre =E2=86=92 header_decode() =E2=86=92 post. - Keep the existing pmt_header_decode() callback unchanged. No functional changes. This adds flexibility for upcoming decoders while preserving current behavior. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmt/class.c | 12 ++++++++++++ drivers/platform/x86/intel/pmt/class.h | 4 ++++ 2 files changed, 16 insertions(+) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index b4c9964df807..9b315334a69b 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -381,10 +381,22 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entr= y, struct intel_pmt_namespa if (IS_ERR(entry->disc_table)) return PTR_ERR(entry->disc_table); =20 + if (ns->pmt_pre_decode) { + ret =3D ns->pmt_pre_decode(intel_vsec_dev, entry); + if (ret) + return ret; + } + ret =3D ns->pmt_header_decode(entry, dev); if (ret) return ret; =20 + if (ns->pmt_post_decode) { + ret =3D ns->pmt_post_decode(intel_vsec_dev, entry); + if (ret) + return ret; + } + ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, disc_res); if (ret) return ret; diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index 1ae56a5baad2..ff39014b208c 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -62,6 +62,10 @@ struct intel_pmt_namespace { struct xarray *xa; int (*pmt_header_decode)(struct intel_pmt_entry *entry, struct device *dev); + int (*pmt_pre_decode)(struct intel_vsec_device *ivdev, + struct intel_pmt_entry *entry); + int (*pmt_post_decode)(struct intel_vsec_device *ivdev, + struct intel_pmt_entry *entry); int (*pmt_add_endpoint)(struct intel_vsec_device *ivdev, struct intel_pmt_entry *entry); }; --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF8C83385B6; Fri, 13 Mar 2026 01:52:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366745; cv=none; b=dfnPLH4KV/HanLcjp8JYS7JlytO61WuD4gagtIZZM6ARlRtq/FxJJbLPyDocvJ7VI7QlsOYD3z0T0f7RkrjkKo8MupJpHrVf/ciKFyDIdGBYLkhbkGsNgjB9qBRN60yZzuyc1aVAVB/orOfzVCwvzmgZBK9XbimB4wLQT8q2u/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366745; c=relaxed/simple; bh=O6eG7WRWywaqNptPXMPB/TF5fGTS9YsXb2B5mhnJT5w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Vfgw3cvGxc+laWMeLD7tfQmlGaWsNNVjG2TaToCVphTr9aFYAjFJf4BvKbIRMWjZQFvL1yQftx7PswWxLBdAhoKVLXqYdM1qQvvgu3PYtudWaKKR66+G89Hma5+q30vn2r5fLbJwoFUKSMKS2E2uWawpcigFPsKlkqWwUV5NLyk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=RaMSO1O7; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="RaMSO1O7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366744; x=1804902744; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=O6eG7WRWywaqNptPXMPB/TF5fGTS9YsXb2B5mhnJT5w=; b=RaMSO1O7npi1PDF894ULMLEeng2V9KepTQEioKS5GxZoEzJjbfQZFht0 MG0tx1++61DyIg2CufrQLf1bZizWIEJNyZg3DSLu6+WVbUa1Ilo+bg6Ia IfRqg8p6Db2VcJvns1To5yPLY9sFrf2slcGzbvaIlg9Yu/w9uXPLHayC6 f9aQCyDuNw45GUK0pzcZRpjGmanUZ9IKEXwnK59BzvJ6gAbsz4RJfWlJL Cd9Ix5L//RnOQx2WUDMFkqjC/MWcbuOfOBbtM1TIqDe5Ppssqxq5I9P7v HQeX5uGMiuQ4NjYhK4S5/h6HG49jXQkPonyjneeKI4G6/XwzOv/fij7fK w==; X-CSE-ConnectionGUID: +yLj5luLRnKOajRTVC2pUQ== X-CSE-MsgGUID: y3fm5yhISUiy7KkBawIwyw== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354564" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354564" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: TMsKAeUpRUGaCXxJQ1roKQ== X-CSE-MsgGUID: fK7N8ixzQC6dsd5yXu8hYQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108490" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 08/22] platform/x86/intel/pmt/crashlog: Split init into pre-decode Date: Thu, 12 Mar 2026 18:51:47 -0700 Message-ID: <20260313015202.3660072-9-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Refactor crashlog initialization to use the PMT namespace pre-decode hook: - Add pmt_crashlog_pre_decode() to parse type/version, select the crashlog_info, initialize the control mutex, and set entry->attr_grp. - Simplify pmt_crashlog_header_decode() to only read header fields from the discovery table. - Wire the namespace with .pmt_pre_decode =3D pmt_crashlog_pre_decode. This separates structural initialization from header parsing, aligning crashlog with the PMT class pre/post decode flow. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmt/crashlog.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x= 86/intel/pmt/crashlog.c index b0393c9c5b4b..f936daf99e4d 100644 --- a/drivers/platform/x86/intel/pmt/crashlog.c +++ b/drivers/platform/x86/intel/pmt/crashlog.c @@ -496,11 +496,9 @@ static const struct crashlog_info *select_crashlog_inf= o(u32 type, u32 version) return &crashlog_type1_ver2; } =20 -static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry, - struct device *dev) +static int pmt_crashlog_pre_decode(struct intel_vsec_device *ivdev, + struct intel_pmt_entry *entry) { - void __iomem *disc_table =3D entry->disc_table; - struct intel_pmt_header *header =3D &entry->header; struct crashlog_entry *crashlog; u32 version; u32 type; @@ -513,6 +511,16 @@ static int pmt_crashlog_header_decode(struct intel_pmt= _entry *entry, mutex_init(&crashlog->control_mutex); =20 crashlog->info =3D select_crashlog_info(type, version); + entry->attr_grp =3D crashlog->info->attr_grp; + + return 0; +} + +static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry, + struct device *dev) +{ + void __iomem *disc_table =3D entry->disc_table; + struct intel_pmt_header *header =3D &entry->header; =20 header->access_type =3D GET_ACCESS(readl(disc_table)); header->guid =3D readl(disc_table + GUID_OFFSET); @@ -521,8 +529,6 @@ static int pmt_crashlog_header_decode(struct intel_pmt_= entry *entry, /* Size is measured in DWORDS, but accessor returns bytes */ header->size =3D GET_SIZE(readl(disc_table + SIZE_OFFSET)); =20 - entry->attr_grp =3D crashlog->info->attr_grp; - return 0; } =20 @@ -530,6 +536,7 @@ static DEFINE_XARRAY_ALLOC(crashlog_array); static struct intel_pmt_namespace pmt_crashlog_ns =3D { .name =3D "crashlog", .xa =3D &crashlog_array, + .pmt_pre_decode =3D pmt_crashlog_pre_decode, .pmt_header_decode =3D pmt_crashlog_header_decode, }; =20 --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 954CA3375CB; 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X-CSE-ConnectionGUID: BZye6goNSuufOpeDdRyvFg== X-CSE-MsgGUID: SnHoPjo7TCad49yd6NL5BQ== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354571" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354571" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: MQrHz6HkSNuX6XR1QPhgDQ== X-CSE-MsgGUID: 34ONSJ87SkmaXSu2cVqQuQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108494" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 09/22] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook Date: Thu, 12 Mar 2026 18:51:48 -0700 Message-ID: <20260313015202.3660072-10-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the telemetry namespace to use the new PMT class pre/post decode interface. The overlap check, which previously occurred during header decode, is now performed in the post-decode hook once header fields are populated. This preserves existing behavior while reusing the same header decode logic across PMT drivers. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmt/class.h | 1 + drivers/platform/x86/intel/pmt/telemetry.c | 24 ++++++++++++++-------- 2 files changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index ff39014b208c..8a0db0ef58c1 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -37,6 +37,7 @@ struct intel_pmt_header { u32 size; u32 guid; u8 access_type; + u8 telem_type; }; =20 struct intel_pmt_entry { diff --git a/drivers/platform/x86/intel/pmt/telemetry.c b/drivers/platform/= x86/intel/pmt/telemetry.c index bdc7c24a3678..d22f633638be 100644 --- a/drivers/platform/x86/intel/pmt/telemetry.c +++ b/drivers/platform/x86/intel/pmt/telemetry.c @@ -58,14 +58,9 @@ struct pmt_telem_priv { struct intel_pmt_entry entry[]; }; =20 -static bool pmt_telem_region_overlaps(struct intel_pmt_entry *entry, - struct device *dev) +static bool pmt_telem_region_overlaps(struct device *dev, u32 guid, u32 ty= pe) { - u32 guid =3D readl(entry->disc_table + TELEM_GUID_OFFSET); - if (intel_pmt_is_early_client_hw(dev)) { - u32 type =3D TELEM_TYPE(readl(entry->disc_table)); - if ((type =3D=3D TELEM_TYPE_PUNIT_FIXED) || (guid =3D=3D TELEM_CLIENT_FIXED_BLOCK_GUID)) return true; @@ -80,15 +75,25 @@ static int pmt_telem_header_decode(struct intel_pmt_ent= ry *entry, void __iomem *disc_table =3D entry->disc_table; struct intel_pmt_header *header =3D &entry->header; =20 - if (pmt_telem_region_overlaps(entry, dev)) - return 1; - header->access_type =3D TELEM_ACCESS(readl(disc_table)); header->guid =3D readl(disc_table + TELEM_GUID_OFFSET); header->base_offset =3D readl(disc_table + TELEM_BASE_OFFSET); =20 /* Size is measured in DWORDS, but accessor returns bytes */ header->size =3D TELEM_SIZE(readl(disc_table)); + header->telem_type =3D TELEM_TYPE(readl(entry->disc_table)); + + return 0; +} + +static int pmt_telem_post_decode(struct intel_vsec_device *ivdev, + struct intel_pmt_entry *entry) +{ + struct intel_pmt_header *header =3D &entry->header; + struct device *dev =3D &ivdev->auxdev.dev; + + if (pmt_telem_region_overlaps(dev, header->guid, header->telem_type)) + return 1; =20 /* * Some devices may expose non-functioning entries that are @@ -131,6 +136,7 @@ static struct intel_pmt_namespace pmt_telem_ns =3D { .name =3D "telem", .xa =3D &telem_array, .pmt_header_decode =3D pmt_telem_header_decode, + .pmt_post_decode =3D pmt_telem_post_decode, .pmt_add_endpoint =3D pmt_telem_add_endpoint, }; =20 --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BCA733D4FB; Fri, 13 Mar 2026 01:52:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366746; cv=none; b=oidjktlSDBf11HLs642mgyylPk40c3rGg9qlGQGvBo799QKuPiVcnmyHBIyuhFy4BM1Bbn0Rs1Jo1sL25UBaH+iwgJOYpoUfX6iDx56P1wJL6ECuENJiddbwDkXsdM3QQ/9LAhIZ2FAX9/pYqXZ+GvFdHn6mlzqjV8vcCtjS/2I= ARC-Message-Signature: i=1; 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d="scan'208";a="220108497" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 10/22] platform/x86/intel/pmt: Move header decode into common helper Date: Thu, 12 Mar 2026 18:51:49 -0700 Message-ID: <20260313015202.3660072-11-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Unify PMT discovery table parsing by moving header decode logic into the class driver. A new helper, pmt_read_header(), now fills in the standard header fields from the discovery table, replacing the per-namespace pmt_header_decode callbacks in telemetry and crashlog. This centralizes the discovery table bit-field definitions in class.h, removes duplicate decode code from telemetry and crashlog, and prepares the PMT class for additional discovery sources. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmt/class.c | 38 +++++++++++++++------- drivers/platform/x86/intel/pmt/class.h | 15 +++++++-- drivers/platform/x86/intel/pmt/crashlog.c | 17 ---------- drivers/platform/x86/intel/pmt/telemetry.c | 26 --------------- 4 files changed, 40 insertions(+), 56 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index 9b315334a69b..a4d6ffed2fed 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -8,6 +8,7 @@ * Author: "Alexander Duyck" */ =20 +#include #include #include #include @@ -368,26 +369,41 @@ static int intel_pmt_dev_register(struct intel_pmt_en= try *entry, return ret; } =20 -int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_n= amespace *ns, - struct intel_vsec_device *intel_vsec_dev, int idx) +static int pmt_read_header(struct intel_vsec_device *ivdev, int idx, + struct intel_pmt_entry *entry) { - struct device *dev =3D &intel_vsec_dev->auxdev.dev; - struct resource *disc_res; - int ret; + struct intel_pmt_header *header =3D &entry->header; + struct device *dev =3D &ivdev->auxdev.dev; + u64 headers[2]; =20 - disc_res =3D &intel_vsec_dev->resource[idx]; - - entry->disc_table =3D devm_ioremap_resource(dev, disc_res); + entry->disc_table =3D devm_ioremap_resource(dev, &ivdev->resource[idx]); if (IS_ERR(entry->disc_table)) return PTR_ERR(entry->disc_table); =20 + memcpy_fromio(headers, entry->disc_table, 2 * sizeof(u64)); + + header->access_type =3D FIELD_GET(PMT_ACCESS_TYPE, headers[0]); + header->telem_type =3D FIELD_GET(PMT_TELEM_TYPE, headers[0]); + /* Size is measured in DWORDS, but accessor returns bytes */ + header->size =3D PMT_GET_SIZE(FIELD_GET(PMT_SIZE, headers[0])); + header->guid =3D FIELD_GET(PMT_GUID32, headers[0]); + header->base_offset =3D FIELD_GET(PMT_BASE_OFFSET, headers[1]); + + return 0; +} + +int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_n= amespace *ns, + struct intel_vsec_device *intel_vsec_dev, int idx) +{ + int ret; + if (ns->pmt_pre_decode) { ret =3D ns->pmt_pre_decode(intel_vsec_dev, entry); if (ret) return ret; } =20 - ret =3D ns->pmt_header_decode(entry, dev); + ret =3D pmt_read_header(intel_vsec_dev, idx, entry); if (ret) return ret; =20 @@ -397,11 +413,11 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entr= y, struct intel_pmt_namespa return ret; } =20 - ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, disc_res); + ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, &intel_vsec_dev->= resource[idx]); if (ret) return ret; =20 - return intel_pmt_dev_register(entry, ns, dev); + return intel_pmt_dev_register(entry, ns, &intel_vsec_dev->auxdev.dev); } EXPORT_SYMBOL_NS_GPL(intel_pmt_dev_create, "INTEL_PMT"); =20 diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index 8a0db0ef58c1..06f90c7ce6b3 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -11,6 +11,19 @@ =20 #include "telemetry.h" =20 +/* PMT Discovery Table DWORD 1 */ +#define PMT_ACCESS_TYPE GENMASK_ULL(3, 0) +#define PMT_TELEM_TYPE GENMASK_ULL(7, 4) +#define PMT_SIZE GENMASK_ULL(27, 12) +#define PMT_GUID32 GENMASK_ULL(63, 32) + +/* PMT Discovery Table DWORD 2 */ +#define PMT_BASE_OFFSET GENMASK_ULL(31, 0) +#define PMT_TELE_ID GENMASK_ULL(63, 32) + +/* Get size bytes from DWORDs */ +#define PMT_GET_SIZE(v) ((v) << 2) + /* PMT access types */ #define ACCESS_BARID 2 #define ACCESS_LOCAL 3 @@ -61,8 +74,6 @@ struct intel_pmt_entry { struct intel_pmt_namespace { const char *name; struct xarray *xa; - int (*pmt_header_decode)(struct intel_pmt_entry *entry, - struct device *dev); int (*pmt_pre_decode)(struct intel_vsec_device *ivdev, struct intel_pmt_entry *entry); int (*pmt_post_decode)(struct intel_vsec_device *ivdev, diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x= 86/intel/pmt/crashlog.c index f936daf99e4d..67795e2cb1ed 100644 --- a/drivers/platform/x86/intel/pmt/crashlog.c +++ b/drivers/platform/x86/intel/pmt/crashlog.c @@ -516,28 +516,11 @@ static int pmt_crashlog_pre_decode(struct intel_vsec_= device *ivdev, return 0; } =20 -static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry, - struct device *dev) -{ - void __iomem *disc_table =3D entry->disc_table; - struct intel_pmt_header *header =3D &entry->header; - - header->access_type =3D GET_ACCESS(readl(disc_table)); - header->guid =3D readl(disc_table + GUID_OFFSET); - header->base_offset =3D readl(disc_table + BASE_OFFSET); - - /* Size is measured in DWORDS, but accessor returns bytes */ - header->size =3D GET_SIZE(readl(disc_table + SIZE_OFFSET)); - - return 0; -} - static DEFINE_XARRAY_ALLOC(crashlog_array); static struct intel_pmt_namespace pmt_crashlog_ns =3D { .name =3D "crashlog", .xa =3D &crashlog_array, .pmt_pre_decode =3D pmt_crashlog_pre_decode, - .pmt_header_decode =3D pmt_crashlog_header_decode, }; =20 /* diff --git a/drivers/platform/x86/intel/pmt/telemetry.c b/drivers/platform/= x86/intel/pmt/telemetry.c index d22f633638be..80773e3c3efa 100644 --- a/drivers/platform/x86/intel/pmt/telemetry.c +++ b/drivers/platform/x86/intel/pmt/telemetry.c @@ -27,14 +27,6 @@ =20 #include "class.h" =20 -#define TELEM_SIZE_OFFSET 0x0 -#define TELEM_GUID_OFFSET 0x4 -#define TELEM_BASE_OFFSET 0x8 -#define TELEM_ACCESS(v) ((v) & GENMASK(3, 0)) -#define TELEM_TYPE(v) (((v) & GENMASK(7, 4)) >> 4) -/* size is in bytes */ -#define TELEM_SIZE(v) (((v) & GENMASK(27, 12)) >> 10) - /* Used by client hardware to identify a fixed telemetry entry*/ #define TELEM_CLIENT_FIXED_BLOCK_GUID 0x10000000 =20 @@ -69,23 +61,6 @@ static bool pmt_telem_region_overlaps(struct device *dev= , u32 guid, u32 type) return false; } =20 -static int pmt_telem_header_decode(struct intel_pmt_entry *entry, - struct device *dev) -{ - void __iomem *disc_table =3D entry->disc_table; - struct intel_pmt_header *header =3D &entry->header; - - header->access_type =3D TELEM_ACCESS(readl(disc_table)); - header->guid =3D readl(disc_table + TELEM_GUID_OFFSET); - header->base_offset =3D readl(disc_table + TELEM_BASE_OFFSET); - - /* Size is measured in DWORDS, but accessor returns bytes */ - header->size =3D TELEM_SIZE(readl(disc_table)); - header->telem_type =3D TELEM_TYPE(readl(entry->disc_table)); - - return 0; -} - static int pmt_telem_post_decode(struct intel_vsec_device *ivdev, struct intel_pmt_entry *entry) { @@ -135,7 +110,6 @@ static DEFINE_XARRAY_ALLOC(telem_array); static struct intel_pmt_namespace pmt_telem_ns =3D { .name =3D "telem", .xa =3D &telem_array, - .pmt_header_decode =3D pmt_telem_header_decode, .pmt_post_decode =3D pmt_telem_post_decode, .pmt_add_endpoint =3D pmt_telem_add_endpoint, }; --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5F8C33BBD1; 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X-CSE-ConnectionGUID: TpGyjevsQ3+AwLv/9bVfpw== X-CSE-MsgGUID: gtAfAzS+QACoSyv5RLmC2g== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354580" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354580" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: TDvBLrxtRHq0FW+O4xYBQw== X-CSE-MsgGUID: FbedKJiZSZas7FzHAHNLQA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108500" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 11/22] platform/x86/intel/pmt: Pass discovery index instead of resource Date: Thu, 12 Mar 2026 18:51:50 -0700 Message-ID: <20260313015202.3660072-12-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Change PMT class code to pass a discovery index rather than a direct struct resource when creating entries. This allows the class to identify the discovery source generically without assuming PCI BAR resources. For PCI devices, the index still resolves to a resource in the intel_vsec_device. Other discovery sources, such as ACPI, can use the same index without needing a struct resource. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmt/class.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index a4d6ffed2fed..f94f51178043 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -207,11 +207,12 @@ EXPORT_SYMBOL_GPL(intel_pmt_class); =20 static int intel_pmt_populate_entry(struct intel_pmt_entry *entry, struct intel_vsec_device *ivdev, - struct resource *disc_res) + int idx) { struct pci_dev *pci_dev =3D to_pci_dev(ivdev->dev); struct device *dev =3D &ivdev->auxdev.dev; struct intel_pmt_header *header =3D &entry->header; + struct resource *disc_res; u8 bir; =20 /* @@ -236,6 +237,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_en= try *entry, * For access_type LOCAL, the base address is as follows: * base address =3D end of discovery region + base offset */ + disc_res =3D &ivdev->resource[idx]; entry->base_addr =3D disc_res->end + 1 + header->base_offset; =20 /* @@ -413,7 +415,7 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entry,= struct intel_pmt_namespa return ret; } =20 - ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, &intel_vsec_dev->= resource[idx]); + ret =3D intel_pmt_populate_entry(entry, intel_vsec_dev, idx); if (ret) return ret; =20 --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 787F1336882; Fri, 13 Mar 2026 01:52:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366748; cv=none; b=S7q3Eia/j56IJKzGsfEdW6Zl2sDqaVf+EfUklcAM+6reKmcC3LZdQWpyNxbgaTGgBAXltx8nGdJr6N/KSGsGbtv++SyiKVXqZvLoDnOxt/HKHPXYNjDlfMpJ2GU0KYIXgFBMP5/KYgk4IfmegN7fGXMJD5DcUhTc4BCE5LLDAh0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366748; c=relaxed/simple; bh=0wdWYOTQIrn2DAmCCZnu5w7Dz3BlEgyNXBT+ovP1hMg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NTMag8sANXLFF5+4OTATnxURMTeNFuzTJzOrx6q0FHGoe+u8XcUWO0OywmqUsACuRqBMTaM+unHhZOvolXOet/QSreBC97aDbZByqk4M63Cqul48N6l/ojcxPqTrIk804wgEBM2yjcVdbgB8tYucy8/QM+2xrWEcFKiGW3WrU3U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=IFzsC/P+; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="IFzsC/P+" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366745; x=1804902745; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0wdWYOTQIrn2DAmCCZnu5w7Dz3BlEgyNXBT+ovP1hMg=; b=IFzsC/P+uWRl+exxPk7WE/QdJJ8GMnpdNV73uHIL4Z6w5HP2xMMz6CJr G7EE5tFRmHi8g/tbwGHvXwfHq4xX4zKrnyitJY3E5Kk9CrqnhWgr/HpZI 349mCql7GlIAWG/BcS0KuOkUXaf/jiiISK0NaT2ixBrhlrBVuR5/tcre1 sLnOSIMJ5ZXAqoFNaW4JHxoe+izx5BIEPQj2kX15mqOu5XRHP2MtoyEqI 3Tho50yMk5/FhwtRbvZ0EmrSgmYW4ZIORakdiqk5PzF+hvA2W6996bV9i GfD1AwDEi6yMPd7eI6AymgAGm6aNv6sC7SgSl3gIHydfXm25rXrtlEH8r w==; X-CSE-ConnectionGUID: PwduMbQrTi6Aus6/KnPuxw== X-CSE-MsgGUID: 1U6P/aRgQeKKQrfRrXhGUw== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354581" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354581" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: vrHvvp0eRJqEhXjrAedY0A== X-CSE-MsgGUID: +lq3nR5/RiugRyW7GOxSVw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108503" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 12/22] platform/x86/intel/pmt: Unify header fetch and add ACPI source Date: Thu, 12 Mar 2026 18:51:51 -0700 Message-ID: <20260313015202.3660072-13-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Allow the PMT class to read discovery headers from either PCI MMIO or ACPI-provided entries, depending on the discovery source. The new source-aware fetch helper retrieves the first two QWORDs for both paths while keeping the mapped discovery table available for users such as crashlog. Split intel_pmt_populate_entry() into source-specific resolvers: - pmt_resolve_access_pci(): handles both ACCESS_LOCAL and ACCESS_BARID for PCI-backed devices and sets entry->pcidev. Same existing functionality. - pmt_resolve_access_acpi(): handles only ACCESS_BARID for ACPI-backed devices, rejecting ACCESS_LOCAL which has no valid semantics without a physical discovery resource. This maintains existing PCI behavior and makes no functional changes for PCI devices. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmt/class.c | 124 +++++++++++++++++++++++-- 1 file changed, 115 insertions(+), 9 deletions(-) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index f94f51178043..ddd9c4bf7323 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -205,9 +205,9 @@ struct class intel_pmt_class =3D { }; EXPORT_SYMBOL_GPL(intel_pmt_class); =20 -static int intel_pmt_populate_entry(struct intel_pmt_entry *entry, - struct intel_vsec_device *ivdev, - int idx) +static int pmt_resolve_access_pci(struct intel_pmt_entry *entry, + struct intel_vsec_device *ivdev, + int idx) { struct pci_dev *pci_dev =3D to_pci_dev(ivdev->dev); struct device *dev =3D &ivdev->auxdev.dev; @@ -287,6 +287,82 @@ static int intel_pmt_populate_entry(struct intel_pmt_e= ntry *entry, } =20 entry->pcidev =3D pci_dev; + + return 0; +} + +static int pmt_resolve_access_acpi(struct intel_pmt_entry *entry, + struct intel_vsec_device *ivdev) +{ + struct pci_dev *pci_dev =3D NULL; + struct device *dev =3D &ivdev->auxdev.dev; + struct intel_pmt_header *header =3D &entry->header; + u8 bir; + + if (dev_is_pci(ivdev->dev)) + pci_dev =3D to_pci_dev(ivdev->dev); + + /* + * The base offset should always be 8 byte aligned. + * + * For non-local access types the lower 3 bits of base offset + * contains the index of the base address register where the + * telemetry can be found. + */ + bir =3D GET_BIR(header->base_offset); + + switch (header->access_type) { + case ACCESS_BARID: + /* ACPI platform drivers use base_addr */ + if (ivdev->base_addr) { + entry->base_addr =3D ivdev->base_addr + + GET_ADDRESS(header->base_offset); + break; + } + + /* If base_addr is not provided, then this is an ACPI companion device */ + if (!pci_dev) { + dev_err(dev, + "ACCESS_BARID requires PCI BAR resources or base_addr\n"); + return -EINVAL; + } + + entry->base_addr =3D pci_resource_start(pci_dev, bir) + + GET_ADDRESS(header->base_offset); + break; + default: + dev_err(dev, "Unsupported access type %d for ACPI based PMT\n", + header->access_type); + return -EINVAL; + } + + return 0; +} + +static int intel_pmt_populate_entry(struct intel_pmt_entry *entry, + struct intel_vsec_device *ivdev, + int idx) +{ + struct intel_pmt_header *header =3D &entry->header; + struct device *dev =3D &ivdev->auxdev.dev; + int ret; + + switch (ivdev->src) { + case INTEL_VSEC_DISC_PCI: + ret =3D pmt_resolve_access_pci(entry, ivdev, idx); + break; + case INTEL_VSEC_DISC_ACPI: + ret =3D pmt_resolve_access_acpi(entry, ivdev); + break; + default: + dev_err(dev, "Unknown discovery source: %d\n", ivdev->src); + ret =3D -EINVAL; + break; + } + + if (ret) + return ret; + entry->guid =3D header->guid; entry->size =3D header->size; entry->cb =3D ivdev->priv_data; @@ -371,18 +447,48 @@ static int intel_pmt_dev_register(struct intel_pmt_en= try *entry, return ret; } =20 +static int pmt_get_headers(struct intel_vsec_device *ivdev, int idx, + struct intel_pmt_entry *entry, u64 headers[2]) +{ + struct device *dev =3D &ivdev->auxdev.dev; + + switch (ivdev->src) { + case INTEL_VSEC_DISC_PCI: { + void __iomem *disc_table; + + disc_table =3D devm_ioremap_resource(dev, &ivdev->resource[idx]); + if (IS_ERR(disc_table)) + return PTR_ERR(disc_table); + + memcpy_fromio(headers, disc_table, 2 * sizeof(u64)); + + /* Used by crashlog driver */ + entry->disc_table =3D disc_table; + + return 0; + } + case INTEL_VSEC_DISC_ACPI: + memcpy(headers, &ivdev->acpi_disc[idx][0], 2 * sizeof(u64)); + + return 0; + default: + dev_err(dev, "Unknown discovery source type: %d\n", ivdev->src); + break; + } + + return -EINVAL; +} + static int pmt_read_header(struct intel_vsec_device *ivdev, int idx, struct intel_pmt_entry *entry) { struct intel_pmt_header *header =3D &entry->header; - struct device *dev =3D &ivdev->auxdev.dev; u64 headers[2]; + int ret; =20 - entry->disc_table =3D devm_ioremap_resource(dev, &ivdev->resource[idx]); - if (IS_ERR(entry->disc_table)) - return PTR_ERR(entry->disc_table); - - memcpy_fromio(headers, entry->disc_table, 2 * sizeof(u64)); + ret =3D pmt_get_headers(ivdev, idx, entry, headers); + if (ret) + return ret; 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12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 13/22] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description Date: Thu, 12 Mar 2026 18:51:52 -0700 Message-ID: <20260313015202.3660072-14-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a proper description for the intel_pmc_ssram driver. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmc/Kconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/= intel/pmc/Kconfig index c6ef0bcf76af..0f19dc7edcf9 100644 --- a/drivers/platform/x86/intel/pmc/Kconfig +++ b/drivers/platform/x86/intel/pmc/Kconfig @@ -28,3 +28,14 @@ config INTEL_PMC_CORE =20 config INTEL_PMC_SSRAM_TELEMETRY tristate + help + This PCI driver discovers PMC SSRAM telemetry regions through the + PMC's MMIO interface and registers them with the Intel VSEC framework + as Intel PMT telemetry devices. + + It probes the PMC SSRAM device, extracts DVSEC information from MMIO, + reads device IDs and base addresses for multiple PMCs (main, IOE, PCH), + and exposes the discovered telemetry through Intel PMT interfaces + (including sysfs). + + This option is selected by INTEL_PMC_CORE. --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED9FD33FE15; Fri, 13 Mar 2026 01:52:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366751; cv=none; b=OE/GGyH4wy/yVTb8sNNBriFWBWle85tF0Ul9xv5E0zSSE+jdtnPQy5uGTU0AOMck6qyhMaauhDNeiAZFqmrCehyj1FIh/icGLJaGhnvr2a1ihCxy/Erh8aFqU8qIrZunaxvq2nrxX/acPZ7YJADrgfaQdbxnJ7o4Kl9w/2ZsmWw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366751; c=relaxed/simple; bh=cXXek5wUIos0vxn+OWuVgbE2WFWXLMr+474FLK0b+lY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LAfVFEge/QMoefLKi+mvhGnsIfhxtbui2l7ZuP6AZPy5XQEOSrI2qng1BACWPC0R88tg/P9+Xj6+OwHwvCg4f/74Qg7rj6I4REFOCbXUEBYe/SePD0qGTTTJxHBXm2Lxv4EfvFHOLvO4duqkdxKorgHTGvnubJLzZ0OqbXoky7M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nqdqa1DC; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nqdqa1DC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366747; x=1804902747; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cXXek5wUIos0vxn+OWuVgbE2WFWXLMr+474FLK0b+lY=; b=nqdqa1DCa0I9oWd5zRnaRlW76H6e0psZddiDSlbGRzTLgbV0Zm7SsrC8 0n01R/cwFj6rT4f2b4GOnG9l/qlj9Bjdcbn9ya7mPkb9pK2fVQFg3Grd+ eU/eyY64RvQS31ccz206Y8rTQlUL3B/Bsz2axjAMcOMvnQT+sG7VO+iZZ tG9sKLcqGGB2o8mvmomjaeG9csHvc4WSImlwlo1eg38rrQPBGXD/I+9xt CrAjoQ0oBOJHFmGLMHI1PiJhhd2oOAIVOSkkPGGD+6A4o/wgZe6q1mQqc cZbHUUaop0srUWJdHHKz0hQdViTqBnFgIRDB7pvcLIAoKFD9hWyzdUM55 g==; X-CSE-ConnectionGUID: x/GS+QScRZ6o88zqjEmDSQ== X-CSE-MsgGUID: 0xj7qq/KRsSIYClLvWRY2g== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354588" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354588" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: Q8I7qYMDQJKJCXUbekXMHA== X-CSE-MsgGUID: 2yPxCl5dRq6r5SbBum0MAg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108509" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 14/22] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S Date: Thu, 12 Mar 2026 18:51:53 -0700 Message-ID: <20260313015202.3660072-15-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add an ACPI-based PMC PWRM telemetry driver for Nova Lake S. The driver locates PMT discovery data in _DSD under the Intel VSEC UUID, parses it, and registers telemetry regions with the PMT/VSEC framework so PMC telemetry is exposed via existing PMT interfaces. Export pmc_parse_telem_dsd() and pmc_find_telem_guid() to support ACPI discovery in other PMC drivers (e.g., ssram_telemetry) without duplicating ACPI parsing logic. Also export acpi_disc_t typedef from core.h for callers to properly declare discovery table arrays. Selected by INTEL_PMC_CORE. Existing PCI functionality is preserved. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmc/Kconfig | 14 ++ drivers/platform/x86/intel/pmc/Makefile | 2 + drivers/platform/x86/intel/pmc/core.h | 12 + .../platform/x86/intel/pmc/pwrm_telemetry.c | 227 ++++++++++++++++++ 4 files changed, 255 insertions(+) create mode 100644 drivers/platform/x86/intel/pmc/pwrm_telemetry.c diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/= intel/pmc/Kconfig index 0f19dc7edcf9..937186b0b5dd 100644 --- a/drivers/platform/x86/intel/pmc/Kconfig +++ b/drivers/platform/x86/intel/pmc/Kconfig @@ -9,6 +9,7 @@ config INTEL_PMC_CORE depends on ACPI depends on INTEL_PMT_TELEMETRY select INTEL_PMC_SSRAM_TELEMETRY + select INTEL_PMC_PWRM_TELEMETRY help The Intel Platform Controller Hub for Intel Core SoCs provides access to Power Management Controller registers via various interfaces. This @@ -39,3 +40,16 @@ config INTEL_PMC_SSRAM_TELEMETRY (including sysfs). =20 This option is selected by INTEL_PMC_CORE. + +config INTEL_PMC_PWRM_TELEMETRY + tristate + help + This driver discovers PMC PWRM telemetry regions described in ACPI + _DSD and registers them with the Intel VSEC framework as Intel PMT + telemetry devices. + + It validates the ACPI discovery data and publishes the discovered + regions so they can be accessed through the Intel PMT telemetry + interfaces (including sysfs). + + This option is selected by INTEL_PMC_CORE. diff --git a/drivers/platform/x86/intel/pmc/Makefile b/drivers/platform/x86= /intel/pmc/Makefile index bb960c8721d7..fdbb768f7b09 100644 --- a/drivers/platform/x86/intel/pmc/Makefile +++ b/drivers/platform/x86/intel/pmc/Makefile @@ -12,3 +12,5 @@ obj-$(CONFIG_INTEL_PMC_CORE) +=3D intel_pmc_core_pltdrv.o # Intel PMC SSRAM driver intel_pmc_ssram_telemetry-y +=3D ssram_telemetry.o obj-$(CONFIG_INTEL_PMC_SSRAM_TELEMETRY) +=3D intel_pmc_ssram_telemetry.o +intel_pmc_pwrm_telemetry-y +=3D pwrm_telemetry.o +obj-$(CONFIG_INTEL_PMC_PWRM_TELEMETRY) +=3D intel_pmc_pwrm_telemetry.o diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/i= ntel/pmc/core.h index 118c8740ad3a..284aced99f72 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -562,6 +562,8 @@ int pmc_core_pmt_get_blk_sub_req(struct pmc_dev *pmcdev= , struct pmc *pmc, extern const struct file_operations pmc_core_substate_req_regs_fops; extern const struct file_operations pmc_core_substate_blk_req_fops; =20 +extern const guid_t intel_vsec_guid; + #define pmc_for_each_mode(mode, pmc) \ for (unsigned int __i =3D 0, __cond; \ __cond =3D __i < (pmc)->num_lpm_modes, \ @@ -583,4 +585,14 @@ static const struct file_operations __name ## _fops = =3D { \ .release =3D single_release, \ } =20 +struct intel_vsec_header; +union acpi_object; + +/* Avoid checkpatch warning */ +typedef u32 (*acpi_disc_t)[4]; + +int pmc_parse_telem_dsd(union acpi_object *obj, + struct intel_vsec_header *header, + acpi_disc_t *acpi_disc); +union acpi_object *pmc_find_telem_guid(union acpi_object *dsd); #endif /* PMC_CORE_H */ diff --git a/drivers/platform/x86/intel/pmc/pwrm_telemetry.c b/drivers/plat= form/x86/intel/pmc/pwrm_telemetry.c new file mode 100644 index 000000000000..25ca6979c214 --- /dev/null +++ b/drivers/platform/x86/intel/pmc/pwrm_telemetry.c @@ -0,0 +1,227 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Intel PMC PWRM ACPI driver + * + * Copyright (C) 2025, Intel Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "core.h" + +#define ENTRY_LEN 5 + +/* DWORD2 */ +#define DVSEC_ID_MASK GENMASK(15, 0) +#define NUM_ENTRIES_MASK GENMASK(23, 16) +#define ENTRY_SIZE_MASK GENMASK(31, 24) + +/* DWORD3 */ +#define TBIR_MASK GENMASK(2, 0) +#define DISC_TBL_OFF_MASK GENMASK(31, 3) + +const guid_t intel_vsec_guid =3D + GUID_INIT(0x294903fb, 0x634d, 0x4fc7, 0xaf, 0x1f, 0x0f, 0xb9, + 0x56, 0xb0, 0x4f, 0xc1); + +static bool is_valid_entry(union acpi_object *pkg) +{ + int i; + + if (!pkg || pkg->type !=3D ACPI_TYPE_PACKAGE || pkg->package.count !=3D E= NTRY_LEN) + return false; + + if (pkg->package.elements[0].type !=3D ACPI_TYPE_STRING) + return false; + + for (i =3D 1; i < ENTRY_LEN; i++) + if (pkg->package.elements[i].type !=3D ACPI_TYPE_INTEGER) + return false; + + return true; +} + +int pmc_parse_telem_dsd(union acpi_object *obj, + struct intel_vsec_header *header, + u32 (**acpi_disc)[4]) +{ + union acpi_object *vsec_pkg; + union acpi_object *disc_pkg; + u64 hdr0; + u64 hdr1; + int num_regions; + int i; + + if (!header) + return -EINVAL; + + if (!obj || obj->type !=3D ACPI_TYPE_PACKAGE || obj->package.count !=3D 2) + return -EINVAL; + + /* First Package is DVSEC info */ + vsec_pkg =3D &obj->package.elements[0]; + if (!is_valid_entry(vsec_pkg)) + return -EINVAL; + + hdr0 =3D vsec_pkg->package.elements[3].integer.value; + hdr1 =3D vsec_pkg->package.elements[4].integer.value; + + header->id =3D FIELD_GET(DVSEC_ID_MASK, hdr0); + header->num_entries =3D FIELD_GET(NUM_ENTRIES_MASK, hdr0); + header->entry_size =3D FIELD_GET(ENTRY_SIZE_MASK, hdr0); + header->tbir =3D FIELD_GET(TBIR_MASK, hdr1); + header->offset =3D FIELD_GET(DISC_TBL_OFF_MASK, hdr1); + + /* Second Package contains the discovery tables */ + disc_pkg =3D &obj->package.elements[1]; + if (disc_pkg->type !=3D ACPI_TYPE_PACKAGE || disc_pkg->package.count < 1) + return -EINVAL; + + num_regions =3D disc_pkg->package.count; + if (header->num_entries !=3D num_regions) + return -EINVAL; + + *acpi_disc =3D kmalloc_array(num_regions, sizeof(**acpi_disc), GFP_KERNEL= ); + if (!*acpi_disc) + return -ENOMEM; + + for (i =3D 0; i < num_regions; i++) { + union acpi_object *pkg; + u64 value; + int j; + + pkg =3D &disc_pkg->package.elements[i]; + if (!is_valid_entry(pkg)) { + kfree(*acpi_disc); + return -EINVAL; + } + + /* Element 0 is a descriptive string; DWORD values start at index 1. */ + for (j =3D 1; j < ENTRY_LEN; j++) { + value =3D pkg->package.elements[j].integer.value; + if (value > U32_MAX) { + kfree(*acpi_disc); + return -ERANGE; + } + + (*acpi_disc)[i][j - 1] =3D value; + } + } + + return 0; +} +EXPORT_SYMBOL_NS_GPL(pmc_parse_telem_dsd, "INTEL_PMC_CORE"); + +union acpi_object *pmc_find_telem_guid(union acpi_object *dsd) +{ + int i; + + if (!dsd || dsd->type !=3D ACPI_TYPE_PACKAGE) + return NULL; + + for (i =3D 0; i + 1 < dsd->package.count; i +=3D 2) { + union acpi_object *uuid_obj, *data_obj; + guid_t uuid; + + uuid_obj =3D &dsd->package.elements[i]; + data_obj =3D &dsd->package.elements[i + 1]; + + if (uuid_obj->type !=3D ACPI_TYPE_BUFFER || + uuid_obj->buffer.length !=3D 16) + continue; + + memcpy(&uuid, uuid_obj->buffer.pointer, 16); + if (guid_equal(&uuid, &intel_vsec_guid)) + return data_obj; + } + + return NULL; +} +EXPORT_SYMBOL_NS_GPL(pmc_find_telem_guid, "INTEL_PMC_CORE"); + +static int pmc_pwrm_acpi_probe(struct platform_device *pdev) +{ + struct acpi_buffer buf =3D { ACPI_ALLOCATE_BUFFER, NULL }; + acpi_handle handle =3D ACPI_HANDLE(&pdev->dev); + struct intel_vsec_header header; + struct intel_vsec_header *headers[2] =3D { &header, NULL }; + struct intel_vsec_platform_info info =3D { }; + struct device *dev =3D &pdev->dev; + struct resource *res; + u32 (*acpi_disc)[4]; + union acpi_object *dsd; + acpi_status status; + int ret; + + if (!handle) + return -ENODEV; + + status =3D acpi_evaluate_object(handle, "_DSD", NULL, &buf); + if (ACPI_FAILURE(status)) + return dev_err_probe(dev, -ENODEV, "Could not evaluate _DSD: %s\n", + acpi_format_exception(status)); + + dsd =3D pmc_find_telem_guid(buf.pointer); + if (!dsd) { + ret =3D -ENODEV; + goto cleanup_acpi_buf; + } + + ret =3D pmc_parse_telem_dsd(dsd, &header, &acpi_disc); + if (ret) + goto cleanup_acpi_buf; + + res =3D platform_get_resource(pdev, IORESOURCE_MEM, header.tbir); + if (!res) { + ret =3D -EINVAL; + goto cleanup_acpi_disc; + } + + info.headers =3D headers; + info.caps =3D VSEC_CAP_TELEMETRY; + info.acpi_disc =3D acpi_disc; + info.src =3D INTEL_VSEC_DISC_ACPI; + info.base_addr =3D res->start; + + ret =3D intel_vsec_register(&pdev->dev, &info); + +cleanup_acpi_disc: + kfree(acpi_disc); +cleanup_acpi_buf: + ACPI_FREE(buf.pointer); + + return ret; +} + +static const struct acpi_device_id pmc_pwrm_acpi_ids[] =3D { + { "INTC1122", 0 }, /* Nova Lake */ + { "INTC1129", 0 }, /* Nova Lake */ + { } +}; +MODULE_DEVICE_TABLE(acpi, pmc_pwrm_acpi_ids); + +static struct platform_driver pmc_pwrm_acpi_driver =3D { + .probe =3D pmc_pwrm_acpi_probe, + .driver =3D { + .name =3D "intel_pmc_pwrm_acpi", + .acpi_match_table =3D ACPI_PTR(pmc_pwrm_acpi_ids), + }, +}; +module_platform_driver(pmc_pwrm_acpi_driver); + +MODULE_AUTHOR("David E. Box "); +MODULE_DESCRIPTION("Intel PMC PWRM ACPI driver"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("INTEL_VSEC"); --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB8DF344DA8; Fri, 13 Mar 2026 01:52:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366752; cv=none; b=C3UbDuoL2a4BPr8mMIX8idZjsXLpDpA9irko9Z4YmyN6TjCex5g7qtC5hUFUZ6AAa4T3r82s7ikGWN8kvWyUg2VFsDTqzeBb1C5cyK18x/ef6EzoSXka2ThilUGjqaRfRjYfkgpbvvSWM+krffnjg5B6Z137aGCERa6TRSTs7Mo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366752; c=relaxed/simple; bh=R2x0PrfpKvjccrjzU758mRF9aDjoa62HI8fwlmFVWxg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rr1mD1z+FSWOKNcPjCgLcFFa4wrfxN2cAXVjRDN2Wmw0IP8HmGYPf8cdLSx9XxiaxvoGiyrRoSC9YBGvHVwvavGZoWptM0SdxgW++eMd0fY9eCgpmGGYhh6ncDYNXEee7HgHvIy3c5cJq0u1vVqr+qqdiHWcRebcYqLep1XMudk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=R/JdzGZ0; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="R/JdzGZ0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366748; x=1804902748; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=R2x0PrfpKvjccrjzU758mRF9aDjoa62HI8fwlmFVWxg=; b=R/JdzGZ0j6RW2rNbyuplI+mjCC9it8c14Rmmj1cXxBy1Kv2ax7AtJHjV r+JxIuhJEjMDypsk9jh5VpmAysaAvmYFBjmqfdJfXlh6a3u9Rz9EYgIL8 1QsbQlTIvJ+XAtxHcrI4xnYrF64kqD5cR3mXqXXG8KVe7wIuJE88zR7Mc 9OC+etvwYBmVoQ1uBb/oRks0I2v2FY2chp//SA6U1pXNh3ePYkDq403Uo 39EHayEWEwPNBQeQIefLpjB9dNsk9kAFRnDKOKI0kzo0VivTKrpo/tpaB ECZhggxtqtHG3mtWc6+qi9qDQPJYsJwwVq2Ift8AaEsygBYKvMn/XP4xG g==; X-CSE-ConnectionGUID: /fxvpvvuTGOq5z14ZPaPNA== X-CSE-MsgGUID: cOukLhhuT+StPPO843iUiA== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354594" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354594" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: bZ06CU6wQQ6R4H98Tk131g== X-CSE-MsgGUID: lZVSM4EtRfC7GgGR0tVvsw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108512" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 15/22] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency Date: Thu, 12 Mar 2026 18:51:54 -0700 Message-ID: <20260313015202.3660072-16-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename intel_pmc_ssram_telemetry_probe() to pmc_ssram_telemetry_probe() and intel_pmc_ssram_telemetry_pci_ids[] to pmc_ssram_telemetry_pci_ids[], updating the MODULE_DEVICE_TABLE() and pci_driver wiring accordingly. This aligns the symbol names with the driver filename and module name, reduces redundant intel_ prefixes, and improves readability. No functional behavior changes are intended. Signed-off-by: David E. Box Reviewed-by: Ilpo J=C3=A4rvinen --- drivers/platform/x86/intel/pmc/ssram_telemetry.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 6f6e83e70fc5..1deb4d71da3f 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -149,7 +149,7 @@ int pmc_ssram_telemetry_get_pmc_info(unsigned int pmc_i= dx, } EXPORT_SYMBOL_GPL(pmc_ssram_telemetry_get_pmc_info); =20 -static int intel_pmc_ssram_telemetry_probe(struct pci_dev *pcidev, const s= truct pci_device_id *id) +static int pmc_ssram_telemetry_probe(struct pci_dev *pcidev, const struct = pci_device_id *id) { int ret; =20 @@ -183,7 +183,7 @@ static int intel_pmc_ssram_telemetry_probe(struct pci_d= ev *pcidev, const struct return ret; } =20 -static const struct pci_device_id intel_pmc_ssram_telemetry_pci_ids[] =3D { +static const struct pci_device_id pmc_ssram_telemetry_pci_ids[] =3D { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_MTL_SOCM) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCS) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCM) }, @@ -193,14 +193,14 @@ static const struct pci_device_id intel_pmc_ssram_tel= emetry_pci_ids[] =3D { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_WCL_PCDN) }, { } }; -MODULE_DEVICE_TABLE(pci, intel_pmc_ssram_telemetry_pci_ids); +MODULE_DEVICE_TABLE(pci, pmc_ssram_telemetry_pci_ids); =20 -static struct pci_driver intel_pmc_ssram_telemetry_driver =3D { +static struct pci_driver pmc_ssram_telemetry_driver =3D { .name =3D "intel_pmc_ssram_telemetry", - .id_table =3D intel_pmc_ssram_telemetry_pci_ids, - .probe =3D intel_pmc_ssram_telemetry_probe, + .id_table =3D pmc_ssram_telemetry_pci_ids, + .probe =3D pmc_ssram_telemetry_probe, }; -module_pci_driver(intel_pmc_ssram_telemetry_driver); +module_pci_driver(pmc_ssram_telemetry_driver); =20 MODULE_IMPORT_NS("INTEL_VSEC"); MODULE_AUTHOR("Xi Pardee "); --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9DC1337BA6; Fri, 13 Mar 2026 01:52:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="74354597" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354597" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: ukU4FvFWTqeuDfszU6JniQ== X-CSE-MsgGUID: h4eqBIB4Req9XaOI4ac/bg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108515" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 16/22] platform/x86/intel/pmc/ssram: Use fixed-size static pmc array Date: Thu, 12 Mar 2026 18:51:55 -0700 Message-ID: <20260313015202.3660072-17-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Xi Pardee Switch pmc_ssram_telems from a devm-allocated pointer to a fixed-size static array, eliminating per-probe allocation overhead and simplifying lifetime management. Correspondingly simplify pmc_ssram_telemetry_get_pmc_info() validation to check devid availability and tighten input bounds checking. Drop null-pointer checks now that the storage is static. Signed-off-by: Xi Pardee Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmc/ssram_telemetry.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 1deb4d71da3f..9c3d7ba2fd52 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -24,7 +24,7 @@ =20 DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_= T)) =20 -static struct pmc_ssram_telemetry *pmc_ssram_telems; +static struct pmc_ssram_telemetry pmc_ssram_telems[3]; static bool device_probed; =20 static int @@ -140,7 +140,7 @@ int pmc_ssram_telemetry_get_pmc_info(unsigned int pmc_i= dx, if (pmc_idx >=3D MAX_NUM_PMC) return -EINVAL; =20 - if (!pmc_ssram_telems || !pmc_ssram_telems[pmc_idx].devid) + if (!pmc_ssram_telems[pmc_idx].devid) return -ENODEV; =20 pmc_ssram_telemetry->devid =3D pmc_ssram_telems[pmc_idx].devid; @@ -153,12 +153,6 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *p= cidev, const struct pci_de { int ret; =20 - pmc_ssram_telems =3D devm_kzalloc(&pcidev->dev, sizeof(*pmc_ssram_telems)= * MAX_NUM_PMC, - GFP_KERNEL); - if (!pmc_ssram_telems) { - ret =3D -ENOMEM; - goto probe_finish; - } =20 ret =3D pcim_enable_device(pcidev); if (ret) { --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03A6C33DEC8; Fri, 13 Mar 2026 01:52:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366761; cv=none; b=MPWas0pSQb4uJyZygd5i7ni1hBj7AHFB6olXbSV6WdARu1owwinRJQYH9Tz4xRusLo8eHfUU5jS56BPb1onepmhW8gycYhjJI8zuD6ZtKrMaesY6ifo8fjdf4005l1gIJQEpT/5UR3/yF3F9W+YZ6wQ4N5gPXOx4MhBlfdFsoOo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366761; c=relaxed/simple; bh=e1S8raHL6U6wBJ8ruzzvM0H21MrzxEn6TFDGtuGpeH4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YbnyXfhth84UMLViTSEJJE8J8oAdgCJXNHyjo618DOAbFb6oD8H1jkgcWtU+VdpBAkRedDiHAjGrGLFdJTZRN/8rZPTGUTD1I7HmhRffvRDaFA8g8D2XGYfnZka52qJcgoscBcf15pPg2xLIM9Ip3Q0N7VwFNtwcuMGtG6CeSWo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=YFiKFv6K; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="YFiKFv6K" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366754; x=1804902754; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=e1S8raHL6U6wBJ8ruzzvM0H21MrzxEn6TFDGtuGpeH4=; b=YFiKFv6KqSXau/Tk2v8x+AYJ4gb/mBInLasxJG2COKexszA2/sbrVPFr 65pQ+kZWaERfKlCrAk3yJDU3cM/y2J6ozaSM9rtKxPqNArXulv238lZ3m b0UFxw6w/W4IPG+V6bS8Ny9+1n+SJJZOpi4Bfkr7/FVzbDCWNeWPcQ0SZ oxAWtmzikTElBcmNwwykvFDKnzbrGhtVQdEkZ/eoQs0jBk9xf1raNOjHA qP5du2GNnqPTKQvBHFoaZ28jIv4YnSUbOPyM5atJMLgDL6g6xm+Wj/w6x EVUWdeRzF2c0iafP8x6mL+QI/Z7TF711K6u/fnMuQd0qzllynAL2Gzvq+ w==; X-CSE-ConnectionGUID: oL21l9OLQY+v2UZeWuhh9A== X-CSE-MsgGUID: 6XIG89YxRc6k+QYteB8Vqw== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354603" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354603" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: 89UbklxMTcKhw/hQkw800g== X-CSE-MsgGUID: W7Ipz7btQ3Oexz/az466tw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108518" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 17/22] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper Date: Thu, 12 Mar 2026 18:51:56 -0700 Message-ID: <20260313015202.3660072-18-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move DEVID/PWRMBASE extraction into pmc_ssram_get_devid_pwrmbase(). This is a preparatory refactor to place functionality in a common helper for reuse by a subsequent patch, while keeping behavior unchanged in this step. Signed-off-by: David E. Box --- .../platform/x86/intel/pmc/ssram_telemetry.c | 31 ++++++++++++------- 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 9c3d7ba2fd52..75a80a74a069 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -27,6 +27,23 @@ DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *,= if (_T) iounmap(_T)) static struct pmc_ssram_telemetry pmc_ssram_telems[3]; static bool device_probed; =20 +static inline u64 get_base(void __iomem *addr, u32 offset) +{ + return lo_hi_readq(addr + offset) & GENMASK_ULL(63, 3); +} + +static void pmc_ssram_get_devid_pwrmbase(void __iomem *ssram, unsigned int= pmc_idx) +{ + u64 pwrm_base; + u16 devid; + + pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); + devid =3D readw(ssram + SSRAM_DEVID_OFFSET); + + pmc_ssram_telems[pmc_idx].devid =3D devid; + pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; +} + static int pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 ssram_base, void _= _iomem *ssram) { @@ -63,18 +80,12 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64= ssram_base, void __iomem return intel_vsec_register(&pcidev->dev, &info); } =20 -static inline u64 get_base(void __iomem *addr, u32 offset) -{ - return lo_hi_readq(addr + offset) & GENMASK_ULL(63, 3); -} - static int pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, unsigned int pmc_idx, = u32 offset) { void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D NULL; void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D NULL; - u64 ssram_base, pwrm_base; - u16 devid; + u64 ssram_base; =20 ssram_base =3D pci_resource_start(pcidev, 0); tmp_ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); @@ -99,11 +110,7 @@ pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, uns= igned int pmc_idx, u32 of ssram =3D no_free_ptr(tmp_ssram); } =20 - pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); - devid =3D readw(ssram + SSRAM_DEVID_OFFSET); - - pmc_ssram_telems[pmc_idx].devid =3D devid; - pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; + pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); =20 /* Find and register and PMC telemetry entries */ return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FA0E346FC3; Fri, 13 Mar 2026 01:52:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366761; cv=none; b=Ht8s9bONSCVMQA1GDZN7rZot+8XQY5VNWLQ4aVo9vx7Rae41ZLkst+2VgAcXLipuZugAZd4bb26c/sep4YtR4satoSQ1tJHKFHNBdAQY9E3DeS8ZQ+JbBrQIvkvx30CmamzwBBzKW4R/6zsWnxEjtuQEDJpyoRoQUBzhGqzn4wc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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d="scan'208";a="220108521" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:13 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 18/22] platform/x86/intel/pmc/ssram: Add PCI platform data Date: Thu, 12 Mar 2026 18:51:57 -0700 Message-ID: <20260313015202.3660072-19-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add per-device platform data for SSRAM telemetry PCI IDs and route probe through a method selector driven by id->driver_data. This is a preparatory refactor for follow-on discovery methods while preserving current behavior: all supported IDs continue to use the PCI initialization path. Signed-off-by: David E. Box --- .../platform/x86/intel/pmc/ssram_telemetry.c | 69 +++++++++++++++---- 1 file changed, 55 insertions(+), 14 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 75a80a74a069..7db98037c521 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -24,6 +24,18 @@ =20 DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_= T)) =20 +enum resource_method { + RES_METHOD_PCI, +}; + +struct ssram_type { + enum resource_method method; +}; + +static const struct ssram_type pci_main =3D { + .method =3D RES_METHOD_PCI, +}; + static struct pmc_ssram_telemetry pmc_ssram_telems[3]; static bool device_probed; =20 @@ -81,7 +93,7 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 s= sram_base, void __iomem } =20 static int -pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, unsigned int pmc_idx, = u32 offset) +pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev, unsigned int pmc_i= dx, u32 offset) { void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D NULL; void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D NULL; @@ -116,6 +128,20 @@ pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, un= signed int pmc_idx, u32 of return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); } =20 +static int pmc_ssram_telemetry_pci_init(struct pci_dev *pcidev) +{ + int ret; + + ret =3D pmc_ssram_telemetry_get_pmc_pci(pcidev, PMC_IDX_MAIN, 0); + if (ret) + return ret; + + pmc_ssram_telemetry_get_pmc_pci(pcidev, PMC_IDX_IOE, SSRAM_IOE_OFFSET); + pmc_ssram_telemetry_get_pmc_pci(pcidev, PMC_IDX_PCH, SSRAM_PCH_OFFSET); + + return ret; +} + /** * pmc_ssram_telemetry_get_pmc_info() - Get a PMC devid and base_addr info= rmation * @pmc_idx: Index of the PMC @@ -158,8 +184,18 @@ EXPORT_SYMBOL_GPL(pmc_ssram_telemetry_get_pmc_info); =20 static int pmc_ssram_telemetry_probe(struct pci_dev *pcidev, const struct = pci_device_id *id) { + const struct ssram_type *ssram_type; + enum resource_method method; int ret; =20 + ssram_type =3D (const struct ssram_type *)id->driver_data; + if (!ssram_type) { + dev_dbg(&pcidev->dev, "missing driver data\n"); + ret =3D -EINVAL; + goto probe_finish; + } + + method =3D ssram_type->method; =20 ret =3D pcim_enable_device(pcidev); if (ret) { @@ -167,12 +203,10 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *= pcidev, const struct pci_de goto probe_finish; } =20 - ret =3D pmc_ssram_telemetry_get_pmc(pcidev, PMC_IDX_MAIN, 0); - if (ret) - goto probe_finish; - - pmc_ssram_telemetry_get_pmc(pcidev, PMC_IDX_IOE, SSRAM_IOE_OFFSET); - pmc_ssram_telemetry_get_pmc(pcidev, PMC_IDX_PCH, SSRAM_PCH_OFFSET); + if (method =3D=3D RES_METHOD_PCI) + ret =3D pmc_ssram_telemetry_pci_init(pcidev); + else + ret =3D -EINVAL; =20 probe_finish: /* @@ -185,13 +219,20 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *= pcidev, const struct pci_de } =20 static const struct pci_device_id pmc_ssram_telemetry_pci_ids[] =3D { - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_MTL_SOCM) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCM) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_LNL_SOCM) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_PTL_PCDH) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_PTL_PCDP) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_WCL_PCDN) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_MTL_SOCM), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCS), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_ARL_SOCM), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_LNL_SOCM), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_PTL_PCDH), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_PTL_PCDP), + .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_WCL_PCDN), + .driver_data =3D (kernel_ulong_t)&pci_main }, { } }; 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X-CSE-ConnectionGUID: SXRqx+4oQa+0O9f1jn2GCw== X-CSE-MsgGUID: fxO+iNRHQl6uarAqNgr7Zg== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354611" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354611" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: LJvuCfgKQWq/SleK9LG13Q== X-CSE-MsgGUID: n86wPIh7RMiVY8p+4qan0Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108525" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:13 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 19/22] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe Date: Thu, 12 Mar 2026 18:51:58 -0700 Message-ID: <20260313015202.3660072-20-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Xi Pardee Switch the readiness synchronization from a global device_probed flag to per-index devid publication. This is required because a subsequent patch makes probe reentrant, so a single global flag can no longer reliably signal completion. Signed-off-by: Xi Pardee Signed-off-by: David E. Box --- .../platform/x86/intel/pmc/ssram_telemetry.c | 34 ++++++++----------- 1 file changed, 14 insertions(+), 20 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 7db98037c521..246efdcf6950 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -37,7 +37,6 @@ static const struct ssram_type pci_main =3D { }; =20 static struct pmc_ssram_telemetry pmc_ssram_telems[3]; -static bool device_probed; =20 static inline u64 get_base(void __iomem *addr, u32 offset) { @@ -52,8 +51,13 @@ static void pmc_ssram_get_devid_pwrmbase(void __iomem *s= sram, unsigned int pmc_i pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); devid =3D readw(ssram + SSRAM_DEVID_OFFSET); =20 - pmc_ssram_telems[pmc_idx].devid =3D devid; pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; + /* + * Memory barrier is used to ensure the correct write order between base_= addr + * and devid. + */ + smp_wmb(); + pmc_ssram_telems[pmc_idx].devid =3D devid; } =20 static int @@ -151,32 +155,28 @@ static int pmc_ssram_telemetry_pci_init(struct pci_de= v *pcidev) * * 0 - Success * * -EAGAIN - Probe function has not finished yet. Try again. * * -EINVAL - Invalid pmc_idx - * * -ENODEV - PMC device is not available */ int pmc_ssram_telemetry_get_pmc_info(unsigned int pmc_idx, struct pmc_ssram_telemetry *pmc_ssram_telemetry) { + if (pmc_idx >=3D MAX_NUM_PMC) + return -EINVAL; + /* * PMCs are discovered in probe function. If this function is called befo= re - * probe function complete, the result would be invalid. Use device_probed - * variable to avoid this case. Return -EAGAIN to inform the consumer to = call + * probe function complete, the result would be invalid. Use devid to avo= id + * this case. Return -EAGAIN to inform the consumer to call * again later. */ - if (!device_probed) + if (!pmc_ssram_telems[pmc_idx].devid) return -EAGAIN; =20 + pmc_ssram_telemetry->devid =3D pmc_ssram_telems[pmc_idx].devid; /* * Memory barrier is used to ensure the correct read order between - * device_probed variable and PMC info. + * devid variable and base_addr. */ smp_rmb(); - if (pmc_idx >=3D MAX_NUM_PMC) - return -EINVAL; - - if (!pmc_ssram_telems[pmc_idx].devid) - return -ENODEV; - - pmc_ssram_telemetry->devid =3D pmc_ssram_telems[pmc_idx].devid; pmc_ssram_telemetry->base_addr =3D pmc_ssram_telems[pmc_idx].base_addr; return 0; } @@ -209,12 +209,6 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *p= cidev, const struct pci_de ret =3D -EINVAL; =20 probe_finish: - /* - * Memory barrier is used to ensure the correct write order between PMC i= nfo - * and device_probed variable. - */ - smp_wmb(); - device_probed =3D true; return ret; } =20 --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9C33336EC9; Fri, 13 Mar 2026 01:52:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366776; cv=none; b=L5X+vhZJqgNKDqmWE+QMKR8xcXJr56Z8yvVmekw008CmrwMztY2zU1WF+D2qy9HGqIOktVeF16Fddclcrxfm0Ue/Bnsot8V7SCH/2Zn/nb5q+So80xLEIMeC5RxDC+6InPMMMllZOdNFuc2wVm+QPOJH2cAZFcRWdfjHOSRB7e0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366776; c=relaxed/simple; bh=cHvNmyfTzDEKzQJQTUfCW1OK/LXgebpLZjQDLiY0EOc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pGhPzbK4KzbXw39MJ91tqXn3DRkHYRTQ1nwWCqGMviO8qmnnNGc9cX8e4WhgCju3PjbQCSWPveF2y60KLXbcdZQj0EE1Dy//OEYLZGT8AFn0YgApyIl3DF6uGbOjKiLiYFgjnU3P4l+sZVsFgvOvgOWFrUrKfBJYA3Yp3k8+A0U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dKW3SJML; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dKW3SJML" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366768; x=1804902768; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cHvNmyfTzDEKzQJQTUfCW1OK/LXgebpLZjQDLiY0EOc=; b=dKW3SJMLpiam14a6XJ7rOPJpn/o6VleuUHURjZmK3KVoiEsZK1M/DhqV j3rJvqC6C+XQ8gn3yrCa6xv7G0gkuIPlIyekQmw4mNkVGUU76XHBmahGe U2P43YOfnjnDSdTyJe+9qHuA3LIwKvrhT4FuZ9Q9ovMMYo8RQDD6BlM/N q+p2zoPP1WJiivies253Oxjml0TE8zsJQlfpZZgHva7EFRnT2KiZbrHb9 c0LtcAkDHJmkUjr3pfot+1Qv18sqvKeGeQsj6D+nI8A7I8+cdAG4azBOC BGdLWVGpZppZJ4zZrTaLcSDSD6DquWdROH5B37aNXrjb286Y1TtOG+ykq Q==; X-CSE-ConnectionGUID: 7QeCh7HmSaWfR0ub/ygbPg== X-CSE-MsgGUID: lKVtPUkTSD6YP9Djob46cg== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354613" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354613" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: WVo9RwH3TsGWzeplyQEDkA== X-CSE-MsgGUID: 1WxKWnpJRjyQpgUpeyGOvQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108527" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:13 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 20/22] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding Date: Thu, 12 Mar 2026 18:51:59 -0700 Message-ID: <20260313015202.3660072-21-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Prepare the SSRAM telemetry driver for ACPI-based discovery by adding the common initialization path and selection framework needed for resource discovery from the ACPI companion device. At this stage, existing supported devices continue to use the PCI path. This change lays the groundwork for follow-on patches that wire platform IDs to the ACPI policy path. Signed-off-by: David E. Box Signed-off-by: Xi Pardee --- .../platform/x86/intel/pmc/ssram_telemetry.c | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 246efdcf6950..b937ebb2322f 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -5,6 +5,7 @@ * Copyright (c) 2023, Intel Corporation. */ =20 +#include #include #include #include @@ -26,14 +27,17 @@ DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *= , if (_T) iounmap(_T)) =20 enum resource_method { RES_METHOD_PCI, + RES_METHOD_ACPI, }; =20 struct ssram_type { enum resource_method method; + enum pmc_index p_index; }; =20 static const struct ssram_type pci_main =3D { .method =3D RES_METHOD_PCI, + .p_index =3D PMC_IDX_MAIN, }; =20 static struct pmc_ssram_telemetry pmc_ssram_telems[3]; @@ -146,6 +150,76 @@ static int pmc_ssram_telemetry_pci_init(struct pci_dev= *pcidev) return ret; } =20 +static int pmc_ssram_telemetry_get_pmc_acpi(struct pci_dev *pcidev, unsig= ned int pmc_idx) +{ + void __iomem __free(pmc_ssram_telemetry_iounmap) * ssram =3D NULL; + u64 ssram_base; + + ssram_base =3D pci_resource_start(pcidev, 0); + if (!ssram_base) + return -ENODEV; + + ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); + if (!ssram) + return -ENOMEM; + + pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); + + return 0; +} + +static int pmc_ssram_telemetry_acpi_init(struct pci_dev *pcidev, + enum pmc_index index) +{ + struct acpi_buffer buf =3D { ACPI_ALLOCATE_BUFFER, NULL }; + acpi_handle handle =3D ACPI_HANDLE(&pcidev->dev); + struct intel_vsec_header header; + struct intel_vsec_header *headers[2] =3D { &header, NULL }; + struct intel_vsec_platform_info info =3D { }; + union acpi_object *dsd; + u32 (*acpi_disc)[4]; + acpi_status status; + int ret; + + if (!handle) + return -ENODEV; + + status =3D acpi_evaluate_object(handle, "_DSD", NULL, &buf); + if (ACPI_FAILURE(status)) + return -ENODEV; + + dsd =3D pmc_find_telem_guid(buf.pointer); + if (!dsd) { + ret =3D -ENODEV; + goto cleanup_acpi_buf; + } + + ret =3D pmc_parse_telem_dsd(dsd, &header, &acpi_disc); + if (ret) + goto cleanup_acpi_buf; + + info.headers =3D headers; + info.caps =3D VSEC_CAP_TELEMETRY; + info.acpi_disc =3D acpi_disc; + info.src =3D INTEL_VSEC_DISC_ACPI; + + /* This is an ACPI companion device. PCI BAR will be used for base addr. = */ + info.base_addr =3D 0; + + ret =3D intel_vsec_register(&pcidev->dev, &info); + if (ret) + goto cleanup_acpi_disc; + + ret =3D pmc_ssram_telemetry_get_pmc_acpi(pcidev, index); + +cleanup_acpi_disc: + kfree(acpi_disc); +cleanup_acpi_buf: + ACPI_FREE(buf.pointer); + + return ret; +} + /** * pmc_ssram_telemetry_get_pmc_info() - Get a PMC devid and base_addr info= rmation * @pmc_idx: Index of the PMC @@ -186,6 +260,7 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de { const struct ssram_type *ssram_type; enum resource_method method; + enum pmc_index index; int ret; =20 ssram_type =3D (const struct ssram_type *)id->driver_data; @@ -196,6 +271,7 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de } =20 method =3D ssram_type->method; + index =3D ssram_type->p_index; =20 ret =3D pcim_enable_device(pcidev); if (ret) { @@ -205,6 +281,8 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de =20 if (method =3D=3D RES_METHOD_PCI) ret =3D pmc_ssram_telemetry_pci_init(pcidev); + else if (method =3D=3D RES_METHOD_ACPI) + ret =3D pmc_ssram_telemetry_acpi_init(pcidev, index); else ret =3D -EINVAL; =20 @@ -238,6 +316,7 @@ static struct pci_driver pmc_ssram_telemetry_driver =3D= { }; module_pci_driver(pmc_ssram_telemetry_driver); =20 +MODULE_IMPORT_NS("INTEL_PMC_CORE"); MODULE_IMPORT_NS("INTEL_VSEC"); MODULE_AUTHOR("Xi Pardee "); MODULE_DESCRIPTION("Intel PMC SSRAM Telemetry driver"); --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39041331A65; Fri, 13 Mar 2026 01:52:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366767; cv=none; b=WJsFBFKXKfImFnH4fheBVWbQ2UOAaQJOEDYyIQBDfeAT31Z5QqkAus5+Bgo/oGb3f8k/ZovEyUaqXB4VBE2upd7mYcWn6C4E64yIQdkXEXy3XnsNV+raiFscVFkMAkv9jJbEK6Z9cLee1urNzlbtMM2mhyxUm5PryW8qUwrJorc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366767; c=relaxed/simple; bh=B8JS8RQBRrQVr1GSRI9Lf2J0JExHYR/5c0SOq7MzXKg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Q4S6e9GIv/LB4kz/bL4kcUN/bpxdYgPZCOfhM1FCLRyXb/Ykuy6aj0F/Fk5wO8m5ASqi94W4CM8QzWyHwnzEDAHBMOcHK8zvgQgr+kFR+PXVaM3gXiG57+l5hnAXAyxSWtLXfomo5IVzwcVfTeQzKImwr55CcyjAt7iXyKVBU40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Ou7iI46z; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ou7iI46z" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366758; x=1804902758; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=B8JS8RQBRrQVr1GSRI9Lf2J0JExHYR/5c0SOq7MzXKg=; b=Ou7iI46zw4V6b9k1L5h+b/bKHyTiCP1i5hDPZgIF5NNyG6yLRhRaq2hv 35GJqG1VMsmGeSLi6ERmpDxdqakp3NncWgRLVEgtpiPFKvEDhrbYMnQx4 aWD4PWS+5cTeD+jNhzG0zmLpGEXBpJptMY8UlpJDfVEBYbxTYuag3+AvB efKkZsDMOx+GXsK3KpsX7zbCiMJF7hmbpTwbnkkyOxRlW/mHBzUZzW+32 MvHLaiDw6PEDYZgIDkp5YcodDx+h+XQ5FCZOJXAk8DZcdzeKoLqCxDLaE OCk3Ao2/XawnF6ZvT7Ltxel2DDrGXh246coMwZRiziE+/mM+ShWKzLYUz A==; X-CSE-ConnectionGUID: oey+hHs0Sry63pkNiYXI8A== X-CSE-MsgGUID: +m2MyMu+RuaUEaDuOpWxOQ== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354617" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354617" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: Bfxnia9TQTyslxJwaFfbTA== X-CSE-MsgGUID: OChU2o0pQYuVC2HLS/q5lg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108530" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:13 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 21/22] platform/x86/intel/pmc/ssram: Make PMT registration optional Date: Thu, 12 Mar 2026 18:52:00 -0700 Message-ID: <20260313015202.3660072-22-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The SSRAM telemetry driver extracts essential PMC device ID and power management base address information that intel_pmc_core depends on for core functionality. PMT registration failure should not prevent this critical data from being available, as it would break intel_pmc_core operation entirely. Change the behavior to log a warning when PMT registration fails but continue with successful driver initialization, ensuring the primary telemetry data remains accessible to dependent drivers. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmc/ssram_telemetry.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index b937ebb2322f..12b7c1299c2f 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -106,6 +106,7 @@ pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev,= unsigned int pmc_idx, u3 void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D NULL; void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D NULL; u64 ssram_base; + int ret; =20 ssram_base =3D pci_resource_start(pcidev, 0); tmp_ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); @@ -133,7 +134,11 @@ pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev= , unsigned int pmc_idx, u3 pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); =20 /* Find and register and PMC telemetry entries */ - return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); + ret =3D pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); + if (ret) + dev_warn(&pcidev->dev, "could not register PMT\n"); + + return 0; } =20 static int pmc_ssram_telemetry_pci_init(struct pci_dev *pcidev) @@ -208,12 +213,12 @@ static int pmc_ssram_telemetry_acpi_init(struct pci_d= ev *pcidev, =20 ret =3D intel_vsec_register(&pcidev->dev, &info); if (ret) - goto cleanup_acpi_disc; + dev_warn(&pcidev->dev, "could not register PMT\n"); =20 ret =3D pmc_ssram_telemetry_get_pmc_acpi(pcidev, index); =20 -cleanup_acpi_disc: kfree(acpi_disc); + cleanup_acpi_buf: ACPI_FREE(buf.pointer); =20 --=20 2.43.0 From nobody Tue Apr 7 12:52:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 657D933E344; Fri, 13 Mar 2026 01:52:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366770; cv=none; b=QXBqJtPednzfV97JwFSfop7TAzIeKS7E4UYgANLNJt3ykomMZjFLurSLrTn55b9641ZJOmlQY7P06a+QKEyy8AfyS++bP/EKIWrDWb9pDccWipj06x0bo4vYnf69hORIv0r+xhlPtmPR3wL/ojurnXEwzcwL2Y8RbBG0yqyQrtM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773366770; c=relaxed/simple; bh=TDOjwrAiE0+YRhpVFIaO2hLNE/kMQhYEezbZ6Pqkkvw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KIXTSigOvhTMe0fhO0LOUYcUD12/dgGPmkYAWIRLMowERbPpmwJDOFLdgTMoZ1EJTpStRrG7RU+yy82eCpb8THoT0ae/DTG9gZA8z+Eq/q8+cwyeH498TzcWzkVrIlmDhdOmfdNQRYeRLtp5DiZ7K83nknXICyt9jbHjI46dkRc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Ljyh100d; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ljyh100d" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773366761; x=1804902761; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TDOjwrAiE0+YRhpVFIaO2hLNE/kMQhYEezbZ6Pqkkvw=; b=Ljyh100dqgfawkzJAwcnKzls++wVd/Ude8FR2PZtD+bsPeyiD4PDg37F t76M2RO/8c3p8cfAXHc1ROHX0LWYvwMyYCVtKbu90CwMq9q9oCvBeNXk2 garFwxhKNJvrBuurcFMZvX4/Tkxd11naB6kTD/m9ldiat9HHK47A+fVC+ RCr5J9gWc9Iw5++pgtqFs+5mSy085dq6/s9hwYL5/gVfQ+Wp1MoLQtJCB TtTS/y5odsaH0N5p7w3E6bSfZHhFTyB4Dxhom1z6q+f0kkORC436p7AUZ yOnJja88+pvmbu4f3YqgemyBZFFhXy7NvmTsIBG3q/APT+uRQr66V+/IB Q==; X-CSE-ConnectionGUID: 6nN9Ojf8TkqvpF4z2lF9rg== X-CSE-MsgGUID: MIiATrrCSKKNj+VhJTRHYA== X-IronPort-AV: E=McAfee;i="6800,10657,11727"; a="74354618" X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="74354618" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:12 -0700 X-CSE-ConnectionGUID: 2v/npuzSSlG6rGW/t+sNeA== X-CSE-MsgGUID: r5vIVCK9Q2+ACBBE2zQiCg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,117,1770624000"; d="scan'208";a="220108533" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2026 18:52:13 -0700 From: "David E. Box" To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com, irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com, srinivas.pandruvada@linux.intel.com, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, xi.pardee@linux.intel.com Cc: david.e.box@linux.intel.com, hansg@kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 22/22] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery Date: Thu, 12 Mar 2026 18:52:01 -0700 Message-ID: <20260313015202.3660072-23-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com> References: <20260313015202.3660072-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add Nova Lake S PMC device IDs to enable binding of the SSRAM telemetry driver on NVL platforms, and map them to the ACPI-based discovery policy. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmc/core.h | 5 +++++ drivers/platform/x86/intel/pmc/ssram_telemetry.c | 16 ++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/i= ntel/pmc/core.h index 284aced99f72..57557ad7d43b 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -329,6 +329,11 @@ enum ppfear_regs { #define PMC_DEVID_MTL_IOEP 0x7ecf #define PMC_DEVID_MTL_IOEM 0x7ebf =20 +/* NVL */ +#define PMC_DEVID_NVL_PCDH 0xd37e +#define PMC_DEVID_NVL_PCDS 0xd47e +#define PMC_DEVID_NVL_PCHS 0x6e27 + extern const char *pmc_lpm_modes[]; =20 struct pmc_bit_map { diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 12b7c1299c2f..930b4a510c71 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -40,6 +40,16 @@ static const struct ssram_type pci_main =3D { .p_index =3D PMC_IDX_MAIN, }; =20 +static const struct ssram_type acpi_main =3D { + .method =3D RES_METHOD_ACPI, + .p_index =3D PMC_IDX_MAIN, +}; + +static const struct ssram_type acpi_pch =3D { + .method =3D RES_METHOD_ACPI, + .p_index =3D PMC_IDX_PCH, +}; + static struct pmc_ssram_telemetry pmc_ssram_telems[3]; =20 static inline u64 get_base(void __iomem *addr, u32 offset) @@ -310,6 +320,12 @@ static const struct pci_device_id pmc_ssram_telemetry_= pci_ids[] =3D { .driver_data =3D (kernel_ulong_t)&pci_main }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_WCL_PCDN), .driver_data =3D (kernel_ulong_t)&pci_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_NVL_PCDH), + .driver_data =3D (kernel_ulong_t)&acpi_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_NVL_PCDS), + .driver_data =3D (kernel_ulong_t)&acpi_main }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PMC_DEVID_NVL_PCHS), + .driver_data =3D (kernel_ulong_t)&acpi_pch }, { } }; MODULE_DEVICE_TABLE(pci, pmc_ssram_telemetry_pci_ids); --=20 2.43.0