From nobody Tue Apr 7 11:18:08 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36CB33328FA for ; Fri, 13 Mar 2026 10:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397898; cv=none; b=VHhSkP0zBVLmvfpySsZlN4MqFAByDXx6+Q0A5yAN2UQEiMZbp5ArvQX/PtKea74k7BPnW75SENV8JldHlOR6UtjECfmEqnP2BlwZ7F1Vrhvf9yC2qed2nGDvkvjVH8pcur+z1hjyw3z2t8/SRsWU5kNAZc/fX7LKm2K20xZOZ2o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397898; c=relaxed/simple; bh=IWdLMZCoeT7sLlZFMTceFcULNxOWcybT5jnFhi56l0g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=K9XAd+UhwU/51NsQNDcf7YQ2gm8etawOqsBcuOatwWMzI62QZ2reFkxJw77rUN2mBTl9P+mAQo6wfvsafkbK3jCe5ir4fVdMlhn0He7OTQ22zz5U4nxMyUbXLxjMMAViVmA/bfoOaXXEktuiXB64lxhNIfxVHO4t86yl2ojZeiw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=Wfa/GqUE; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=juTvdS38; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="Wfa/GqUE"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="juTvdS38" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62D9TjHN1498959 for ; Fri, 13 Mar 2026 10:31:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= PuZSbOJsGs/9ICK7khlpc4C8PH85TPIcJBVd/47S+1g=; b=Wfa/GqUE4yfOje20 lfBRivyWkrPN/r6KPmPTNY41r9BvvWu2CuSuVGVsawI3q8axU2jbm7UmXNp5fyau D25eeLO4mtvK/ROVMoEP/0Y0KdjxAQdJ2+aLCcW2NyhAa2nC2V4XKPKct7Yba/4L hMJp3I+5WgJlwiSXI4tLL1n+SPrqGT/tZJGWMTqKyVqdVACQXNmiMlm+uQwqp0Eq FmvtN4c7DcAdGDvrZkl+r5PFtyX8v6oP7St95UcFmYvQfjl7wrGbg20+em8LarwT /ZmdC7D6SpJxqPpTr2mKdNlvnT+EOQC2KyjW36ZEsCia7VKYR5eXczF1PqbV5Pgi rAhFIw== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4cvg0hg6u4-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 13 Mar 2026 10:31:36 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-35a0ee0fed2so1597151a91.0 for ; Fri, 13 Mar 2026 03:31:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1773397895; x=1774002695; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PuZSbOJsGs/9ICK7khlpc4C8PH85TPIcJBVd/47S+1g=; b=juTvdS38acnJafigojYN6bH8RGbLOFghZt25jUjxDxLeOOR3IHxnoHU/3Mv+48FDbD DKoYxQ+ZJT412JOCo950AW19eQp8EZD6+1NixGeSuHa7aw7J2wDsjcUJ8j7Ixy+IBgu8 eZiZ8sEOcWpZiH1XQ58hBFU42qt/1JFyiDygdzeuGV8uA2Zv3WIduLYoj04IUcmjJeY+ eV3F5IZSOZnJlFdGEo4Q4Iyi/h1lj7MwJ4kflPzOlTgJCaZCgZKwRXM8Zv5MaBdoDghc JAEK8NLBWdl+CF1HE84WDCjNrJGBMCXuQLpeX9CeYSdPisafUFKrs6mQSqybg6P8Fy1u fBaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773397895; x=1774002695; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=PuZSbOJsGs/9ICK7khlpc4C8PH85TPIcJBVd/47S+1g=; b=ojF3sCdyZSTOFQ0vBSZdnKq10QfIc5YgWmuVlXRcl+ZPrtsq7yI5BbVy+LVKgZZW8h LpBE3CUfTwpLwVrtsNB+8egt/ztYqH6cCmiVYSoixSOMYED5hyKjTMoVYGgARS8PeSiB P9idZNsk/B+n13GBCxtMUNyLlYAqLlWVS3yb0JKwhZHruu4i5Q1blEuzImCSM2IbeE4e Flpmzn7LOrXqPUEpcfuEbnKED0GCiSOQM15GjEZZuSFaGm2rju1rz/Dbw4AuB08Y1SU3 QlARnlX5tCHt+9pQGKc192yRh+iS/F+gGawUZqkR5nR2eYFm+gaO2WWj898158IhRc9M 4ZjQ== X-Forwarded-Encrypted: i=1; AJvYcCUIwW1YVkSmwRZ5Cm8A0JVU5zTwpL0dN2Lo1kUau9l4rx8wCjzK8zyZSVPER46qjNUYg75ilUADZLkDCXQ=@vger.kernel.org X-Gm-Message-State: AOJu0YxI+dcCwW4Vi2g2joB+ubZd9hMb5bXwNSTIZVStpP2pySUEzpOc z5xLbsk90z+RsI9++IrmurZOUZ6PLnCKqSLAZcY0gDI4QdMyu/5KqXdthUdU9k1xTnun6dMn/B+ HJZc+wyMJ/nzXI/Ayxo01Yn6DyWxCK0BK8ogvXAmtoESScu8WdR+3RdDeNLvSs0ZkHuc= X-Gm-Gg: ATEYQzzsEOgBaSlpplUA3exwV7MBsBfsgPQBexB4WEL4ivHAEKQClhhAA+pDYh60VWQ hHcGkHK2DhUkPN53HOZU7+yfLmJ3V2txYz+pNKTpzgfbJoR73J2gcKrT9AVVLVRABSA/4G6UVKE iNuUklDa1ehoiuLgvKTVtiLPClJRZM4isf16Yh+ShAkqtWEHPhUZrdURLCjEYceAVpZigRd4O2h kGqhnoQkMF69t/6kZ0JQZ7dT2k50gUb8q1yvVTu9y5776+Q2e009QMb/iyEA7nNUt+dq2RO6xxJ VcWTeNLl4vlcWqGcW8puRkVA6NVc6YRkkJXH7QvbaiR6OTJAmLEY4WDEchiUOd7aJXrFw8alCru ZYyU9vHBmpDjSz3lSm0qSH4/HnnPxfYDRozn/9tt7Yulx7aygqIkkMcF81vfGNHBJVzBGO9kZfv MvXt2Pf0S2BjHWvmcljGF0jLtYXGJo/1kaTw== X-Received: by 2002:a17:90b:1e45:b0:359:f2e1:5906 with SMTP id 98e67ed59e1d1-35a21e3958emr2423110a91.4.1773397895317; Fri, 13 Mar 2026 03:31:35 -0700 (PDT) X-Received: by 2002:a17:90b:1e45:b0:359:f2e1:5906 with SMTP id 98e67ed59e1d1-35a21e3958emr2423085a91.4.1773397894859; Fri, 13 Mar 2026 03:31:34 -0700 (PDT) Received: from hu-ajainp-blr.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35a02fc9454sm8604577a91.12.2026.03.13.03.31.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 03:31:34 -0700 (PDT) From: Anvesh Jain P Date: Fri, 13 Mar 2026 15:59:51 +0530 Subject: [PATCH v4 1/5] dt-bindings: embedded-controller: Add EC bindings for Qualcomm reference devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260313-v04-add-driver-for-ec-v4-1-ca9d0efd62aa@oss.qualcomm.com> References: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> In-Reply-To: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> To: Sibi Sankar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, Anvesh Jain P , Maya Matuszczyk X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773397885; l=2238; i=anvesh.p@oss.qualcomm.com; s=20260313; h=from:subject:message-id; bh=UTz9Z1xOCUg69vDgInVuKa/ozDgodVccbshMqN1RjNM=; b=DqH6TX4TZB/5jaGrLIyjO5ApcznbF35JeuPxrx6JArsKWKWk6eGSJKs7DxhDwmGLH1phABS8I 7tMXYW+tTg9AJaVJwUuQHv61kLQHPc/EiyTZJY62hTLNBNbYsLJ2XFf X-Developer-Key: i=anvesh.p@oss.qualcomm.com; a=ed25519; pk=8o9EG7gkPe2Er9y9UVCx8MTdcFCwU8Pa54hBZPuduXE= X-Authority-Analysis: v=2.4 cv=T6eBjvKQ c=1 sm=1 tr=0 ts=69b3e788 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=gEfo2CItAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=6bqoFnLgofmmdwMbvCAA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-ORIG-GUID: mWztshzQ3fPEJYwmHcPJ7rSKh_n-Rkpw X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzEzMDA4MiBTYWx0ZWRfX2nFlWGiCn2ID 0mmCpDODVVWcHJTX/m4r+j9c0t8wvHt/L4qpPkvoWc3w3dsrhZEMDbsWPjGweAd3LFkZwan0cZP /rQ6pGR9rCRNQTwuoXRA+yjb5ikkP0sGdGjye+cyobP3LZ/9vYPfsMGhXeiuhd208GqZFzPUYGO zQ78LjMeDL0eKaLsShLIr2K3bD1eZhO8d/9S1O9K8zDJ1uz/U1BUbh9kGZVWK+FDSv/qekpL2O/ ZN3YbYJhpuBA04KySBxjst9ePKhl1XdujOoftEcvTM/9rRHUoK+/r5Q11VfzLNXh9/RHcASP19l uGF5pdOQW4el2qXvqgM1uUajQSIOV6goTdDMWyKvfCgjx/IRD86yenGfUjfX7ftUgixzSQNSnHG 3QBIC2dbc0UGkR2uUf7gHW7D0oi/p66RUPmvUOV2NTvyj5HBZflI+1+ubNj7ojTzX9zVWYW5w5h bADUwDvKB8U9RcJjO0g== X-Proofpoint-GUID: mWztshzQ3fPEJYwmHcPJ7rSKh_n-Rkpw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-13_02,2026-03-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 spamscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 suspectscore=0 bulkscore=0 phishscore=0 impostorscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603130082 From: Maya Matuszczyk Add bindings for the EC firmware running on Hamoa/Purwa and Glymur reference devices. Signed-off-by: Maya Matuszczyk Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Co-developed-by: Anvesh Jain P Signed-off-by: Anvesh Jain P --- .../embedded-controller/qcom,hamoa-ec.yaml | 56 ++++++++++++++++++= ++++ 1 file changed, 56 insertions(+) diff --git a/Documentation/devicetree/bindings/embedded-controller/qcom,ham= oa-ec.yaml b/Documentation/devicetree/bindings/embedded-controller/qcom,ham= oa-ec.yaml new file mode 100644 index 000000000000..baa95f06644a --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/qcom,hamoa-ec.y= aml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/qcom,hamoa-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Hamoa Embedded Controller + +maintainers: + - Sibi Sankar + - Anvesh Jain P + +description: + Qualcomm Snapdragon based Hamoa/Purwa and Glymur reference devices have = an + EC running on different MCU chips. The EC handles things like fan contro= l, + temperature sensors, access to EC internal state changes. + +properties: + compatible: + oneOf: + - items: + - enum: + - qcom,glymur-crd-ec + - qcom,hamoa-iot-evk-ec + - const: qcom,hamoa-crd-ec + - enum: + - qcom,hamoa-crd-ec + + reg: + const: 0x76 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + embedded-controller@76 { + compatible =3D "qcom,hamoa-crd-ec"; + reg =3D <0x76>; + + interrupts-extended =3D <&tlmm 66 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +... --=20 2.34.1 From nobody Tue Apr 7 11:18:08 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 136313328FA for ; Fri, 13 Mar 2026 10:31:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397905; cv=none; b=ZmEdqr6sNhA35ZHn5g36OQFjjd8GwIUmrWulIJW43lB90afG4snTQ5Hvz/otb/Dftxs/TDxRByMeZUZBoU8k+Uyy3tY+Lds/vN2i7j+/2peVX6fB8EduhJzyYSe3onz6QYhsDXCyLFS9DLvBrtlPOJcCguAR+YuQDsjoE0atkEc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397905; c=relaxed/simple; bh=5dCXMiUZfqQ6rMqsbJSOTrVATkIK9LwVrLKScX+8+eQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GD3YjOEGW9eCrpGTf3LtyYmkHrq32kZ25SAN4vB9Ybi53vHu/MZmvfofmPIywhhr8xek6lISBwOslCgRWbkdZ5tK0C8rmJwpKoEz6s4iPvYpbMabRPSfLnO2z0A2D7/5vNtfwfGuLCXsIb3k3ChOvyynbAurncuKN67x8jutj7U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=CHpHrgA1; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=OM/po9C3; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="CHpHrgA1"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="OM/po9C3" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62D5td9I1574535 for ; Fri, 13 Mar 2026 10:31:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= xNiuNzq3gQ6K+5dGMyhYy3eFSXt2D3xTYj0YGjuQSBc=; b=CHpHrgA1IpYEqg7J BGTYXvTw4k8L4CKO7ExJ+nEmQYNyphuzjihtJeF0I8p4ZFaIL3FG/W3wQRyHIU7/ ZO8Y2BxILURNFZiWNfrH/Aifsq8qppPXjhuT/QJL0JCX31eKI4/JLG+a/XK642j8 cR/uh3wCgEb/ocJdK5PMKK7cwGFY4OOfNczgjXBmQx7Ya8myhjpf0aJxSIL04mj+ oM6b5oXxrfyWj9mYMHUBGuc0ZO555AS5gSQMaOG1KLuDZiNHABaImcll3l9pKC1K H4RHl5g0EortaHVrvA88fJWvmijLClar8Av2BnFCl39J7foseOefcvDMQVQWwD+w WwnJ7Q== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4cuh53nnpu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 13 Mar 2026 10:31:41 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-359fdf17147so1259856a91.1 for ; Fri, 13 Mar 2026 03:31:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1773397901; x=1774002701; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=xNiuNzq3gQ6K+5dGMyhYy3eFSXt2D3xTYj0YGjuQSBc=; b=OM/po9C37cX5QMa8E3Kvjz0TXuTM8tUmWgClrv07W+SaSBmFliab1Thtj4N9X99B4l Fk85IaLacQRnxldwxhvBo7ap1mnnHYQLU6FRDuxyu+AanqCO50QQ/7FAIM3p1oNXPjyK PWN/6q14Tdl+FVyyl2LiLDYv6pHg1oTmrmNZpbmrc/4Y9SkSQ9NRFDtghTJ+LMic9hwb P5koJ8vauRIoYw3WjoNBFpsm1ZDhKbZysqHwPRSyTmwQPraE4t2gTg98fCa0dS1ZE8z2 RvXLkYj0UM9UBnf2ZvHUjtbyvUvPbNXfFZ63zYxja2qLhAGVpmBp8dwtCOK3wESiDtTD D3xA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773397901; x=1774002701; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=xNiuNzq3gQ6K+5dGMyhYy3eFSXt2D3xTYj0YGjuQSBc=; b=L4+3zIsTlzpxEiY40BsLJheHXzU/f7aLxIjZoyXYfkV2n0OTtW+qYJ9dytAnqemzHe wqfnKHrDFNmlMZlBKSbtTZLLucBXRUnuwh7PXcYreHi4fKD61stylMfeFREPyzv1IxDQ YCHFQI8ruGgPEWiCjPD7+5nAFGaXzQqsiPnGNKwcLf0SuCRzD+RTLcO0mJmmvQjhpGII t3UAh5i7l4Kcytr7mEIeNGo+tYKpEz7a32+Uso3h4Qc1tkzQ4ZyxIdkRFMJY/2XrHSvl +2645An2y1F4aHb6WG2yRQJDxcqK/hcHvPTqVCmpzTmrIzX/7bUzOVpP0wUyMdqjEBCa ySnA== X-Forwarded-Encrypted: i=1; AJvYcCUoxfu8XHKcXkavfOVgMeP29ymYCJxvzGBaacCgvfsXG/qLHPeizyNM8nJQXAjtsQAqt4/HTaUZOMjo2IY=@vger.kernel.org X-Gm-Message-State: AOJu0YxCMyVp6CZpKBEuVKSyTjkKEpYdEO0G7Yk1ZRW8UBwR9EAZUJV3 paHtRts/o6znOB1oAV/22WaN9R8VL9Y29fk8AyLOUpKYiplQwLW343NiPnHverS8o8pZErlKwgA 9XMkCwGP0BOmFIWzSGqnTDfKudub9JBSdsrHyJ3DmbIq2IHkKLXilE+rGnrZObtevrcM= X-Gm-Gg: ATEYQzz1gek57jESGjuG9sxTNPDoa+49orCX4tij4bVgUgxsdSNjQ35fRkJsaWwJH9w /hpTolLDZrD47+cQb+RSU9WOPlQr8wUC0TvDVX/ZE4bwlEqTf1LcAChcbc0e8SOLcL/pYIOPwBA eSHkza+YKRMpZf4luaabRpOmPEhGYT9bK17bDANVuo66nQ4yeiy4O9XkUey7EePLFtyDQ3K7u/Z lQfJJ398doqs31E7noASkPxwHXzdB4HcMpqDPPBZfqG/cMXJFPkc2UhOTyzuopwH24S/LIRZurR shBqZN0T0MwhogXDPeYqvwaw0LVSM0fTwiROuOXkDAFRRDrkqp2PMm0wJkogwkZIDTztIJh59rT oeqfCVzs9xhZZWxC55BsWXfkaSs8S1vWb4yHKVVTvYNIIzS+UdWY/rzEwObdoFt+SX1in5LwRbb Or/WzZyQICADXPujOToy0/WkCzfzSio90crw== X-Received: by 2002:a17:90b:4d10:b0:34e:630c:616c with SMTP id 98e67ed59e1d1-35a220a9470mr2456736a91.31.1773397900596; Fri, 13 Mar 2026 03:31:40 -0700 (PDT) X-Received: by 2002:a17:90b:4d10:b0:34e:630c:616c with SMTP id 98e67ed59e1d1-35a220a9470mr2456698a91.31.1773397899947; Fri, 13 Mar 2026 03:31:39 -0700 (PDT) Received: from hu-ajainp-blr.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35a02fc9454sm8604577a91.12.2026.03.13.03.31.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 03:31:39 -0700 (PDT) From: Anvesh Jain P Date: Fri, 13 Mar 2026 15:59:52 +0530 Subject: [PATCH v4 2/5] platform: arm64: Add driver for EC found on Qualcomm reference devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260313-v04-add-driver-for-ec-v4-2-ca9d0efd62aa@oss.qualcomm.com> References: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> In-Reply-To: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> To: Sibi Sankar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, Anvesh Jain P , Maya Matuszczyk X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773397885; l=17300; i=anvesh.p@oss.qualcomm.com; s=20260313; h=from:subject:message-id; bh=scJhwrq7di930clN/Dsk45GTJKU1yF0+/pmxGqzskOg=; b=bsrK8yx3M9Lhbji0fhihmQpsw3qsY6LpsdMFE/4WzC44k3MUDn4tdWf42M+ftNiRxYMRr4xgL zYYsH4stvySBuZxjJgNaTVO9bAFZt8mcrJ/FinBxY6PDXAM5XbGnAkQ X-Developer-Key: i=anvesh.p@oss.qualcomm.com; a=ed25519; pk=8o9EG7gkPe2Er9y9UVCx8MTdcFCwU8Pa54hBZPuduXE= X-Authority-Analysis: v=2.4 cv=ZN/aWH7b c=1 sm=1 tr=0 ts=69b3e78d cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=pGLkceISAAAA:8 a=E2FcRaxJAAAA:8 a=689zGLOwWasileE73dUA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 a=Yev8HTsh1NrKSfoOyGCL:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzEzMDA4MiBTYWx0ZWRfX7VdGzydE9v6e s1F9FsQUXezZvQTqXR1w+A5cF903tjwH6ZrEI/FrXqPWGbxmWOHOxt/MjcRn4WuGnmBp+i/6lpQ q5W0Ld33Px4iE5kB9KGsmtKS+tCez5R806R6mHSZUuM/2DyFVW330HAJEKJwt8lcdaogn2V4Ouk Hu53u5ztjnyT9HDaGrJog9ISXswouxLOZA1x3Rv2o9CQQzrF864pDaharOLjKjK23h4WRij+/AU KtKGPq0rcib+BZFZAU1lk1hNhRNY9HxN6DNHmzndmOyZIMuZUknDv8yw4x2iApTU+nHGfb2Y6WW dzZDiA2q67Hw4iFnovNjCaUFJdNooCBwNdAp9Lf4JWuuVuP6euo5pmcKQWTdXa4zISmS9mjBqZj Z+G8C7BCvcPErVclHnPJGhKVWyUY1Azk5b0iy/sKUeVqp9m8VBMdqi9OHkEu6u1ClsRxMPUCehM QikHq3+TtRLNOjmW25w== X-Proofpoint-GUID: 795PWLMqCTIAGuxso-EM-KkKvedz9vPR X-Proofpoint-ORIG-GUID: 795PWLMqCTIAGuxso-EM-KkKvedz9vPR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-13_02,2026-03-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 phishscore=0 adultscore=0 malwarescore=0 bulkscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603130082 From: Sibi Sankar Add Embedded controller driver support for Hamoa/Purwa/Glymur qualcomm reference boards. It handles fan control, temperature sensors, access to EC state changes and supports reporting suspend entry/exit to the EC. Co-developed-by: Maya Matuszczyk Signed-off-by: Maya Matuszczyk Signed-off-by: Sibi Sankar Co-developed-by: Anvesh Jain P Signed-off-by: Anvesh Jain P Reviewed-by: Dmitry Baryshkov --- MAINTAINERS | 8 + drivers/platform/arm64/Kconfig | 12 + drivers/platform/arm64/Makefile | 1 + drivers/platform/arm64/qcom-hamoa-ec.c | 468 +++++++++++++++++++++++++++++= ++++ 4 files changed, 489 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 2882a67bdf6d..9657c384be44 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21932,6 +21932,14 @@ S: Supported W: https://wireless.wiki.kernel.org/en/users/Drivers/wcn36xx F: drivers/net/wireless/ath/wcn36xx/ =20 +QUALCOMM HAMOA EMBEDDED CONTROLLER DRIVER +M: Sibi Sankar +M: Anvesh Jain P +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/embedded-controller/qcom,hamoa-ec.yaml +F: drivers/platform/arm64/qcom-hamoa-ec.c + QUANTENNA QTNFMAC WIRELESS DRIVER M: Igor Mitsyanko R: Sergey Matyukevich diff --git a/drivers/platform/arm64/Kconfig b/drivers/platform/arm64/Kconfig index 10f905d7d6bf..025cdf091f9e 100644 --- a/drivers/platform/arm64/Kconfig +++ b/drivers/platform/arm64/Kconfig @@ -90,4 +90,16 @@ config EC_LENOVO_THINKPAD_T14S =20 Say M or Y here to include this support. =20 +config EC_QCOM_HAMOA + tristate "Embedded Controller driver for Qualcomm Hamoa/Glymur reference = devices" + depends on ARCH_QCOM || COMPILE_TEST + depends on I2C + help + Say M or Y here to enable the Embedded Controller driver for Qualcomm + Snapdragon-based Hamoa/Glymur reference devices. The driver handles fan + control, temperature sensors, access to EC state changes and supports + reporting suspend entry/exit to the EC. + + This driver currently supports Hamoa/Purwa/Glymur reference devices. + endif # ARM64_PLATFORM_DEVICES diff --git a/drivers/platform/arm64/Makefile b/drivers/platform/arm64/Makef= ile index 60c131cff6a1..7681be4a46e9 100644 --- a/drivers/platform/arm64/Makefile +++ b/drivers/platform/arm64/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_EC_ACER_ASPIRE1) +=3D acer-aspire1-ec.o obj-$(CONFIG_EC_HUAWEI_GAOKUN) +=3D huawei-gaokun-ec.o obj-$(CONFIG_EC_LENOVO_YOGA_C630) +=3D lenovo-yoga-c630.o obj-$(CONFIG_EC_LENOVO_THINKPAD_T14S) +=3D lenovo-thinkpad-t14s.o +obj-$(CONFIG_EC_QCOM_HAMOA) +=3D qcom-hamoa-ec.o diff --git a/drivers/platform/arm64/qcom-hamoa-ec.c b/drivers/platform/arm6= 4/qcom-hamoa-ec.c new file mode 100644 index 000000000000..452775e765e8 --- /dev/null +++ b/drivers/platform/arm64/qcom-hamoa-ec.c @@ -0,0 +1,468 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2024 Maya Matuszczyk + * Copyright (c) 2026, Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include + +#define EC_SCI_EVT_READ_CMD 0x05 +#define EC_FW_VERSION_CMD 0x0e +#define EC_MODERN_STANDBY_CMD 0x23 +#define EC_FAN_DBG_CONTROL_CMD 0x30 +#define EC_SCI_EVT_CONTROL_CMD 0x35 +#define EC_THERMAL_CAP_CMD 0x42 + +#define EC_FW_VERSION_RESP_LEN 4 +#define EC_THERMAL_CAP_RESP_LEN 3 +#define EC_FAN_DEBUG_CMD_LEN 6 +#define EC_FAN_SPEED_DATA_SIZE 4 + +#define EC_MODERN_STANDBY_ENTER 0x01 +#define EC_MODERN_STANDBY_EXIT 0x00 + +#define EC_FAN_DEBUG_MODE_OFF 0 +#define EC_FAN_DEBUG_MODE_ON BIT(0) +#define EC_FAN_ON BIT(1) +#define EC_FAN_DEBUG_TYPE_PWM BIT(2) +#define EC_MAX_FAN_CNT 2 +#define EC_FAN_NAME_SIZE 20 +#define EC_FAN_MAX_PWM 255 + +enum qcom_ec_sci_events { + EC_FAN1_STATUS_CHANGE_EVT =3D 0x30, + EC_FAN2_STATUS_CHANGE_EVT, + EC_FAN1_SPEED_CHANGE_EVT, + EC_FAN2_SPEED_CHANGE_EVT, + EC_NEW_LUT_SET_EVT, + EC_FAN_PROFILE_SWITCH_EVT, + EC_THERMISTOR_1_THRESHOLD_CROSS_EVT, + EC_THERMISTOR_2_THRESHOLD_CROSS_EVT, + EC_THERMISTOR_3_THRESHOLD_CROSS_EVT, + /* Reserved: 0x39 - 0x3c/0x3f */ + EC_RECOVERED_FROM_RESET_EVT =3D 0x3d, +}; + +struct qcom_ec_version { + u8 main_version; + u8 sub_version; + u8 test_version; +}; + +struct qcom_ec_thermal_cap { +#define EC_THERMAL_FAN_CNT(x) (FIELD_GET(GENMASK(1, 0), (x))) +#define EC_THERMAL_FAN_TYPE(x) (FIELD_GET(GENMASK(4, 2), (x))) +#define EC_THERMAL_THERMISTOR_MASK(x) (FIELD_GET(GENMASK(7, 0), (x))) + u8 fan_cnt; + u8 fan_type; + u8 thermistor_mask; +}; + +struct qcom_ec_cooling_dev { + struct thermal_cooling_device *cdev; + struct device *parent_dev; + u8 fan_id; + u8 state; +}; + +struct qcom_ec { + struct qcom_ec_cooling_dev *ec_cdev; + struct qcom_ec_thermal_cap thermal_cap; + struct qcom_ec_version version; + struct i2c_client *client; +}; + +static int qcom_ec_read(struct qcom_ec *ec, u8 cmd, u8 resp_len, u8 *resp) +{ + int ret; + + ret =3D i2c_smbus_read_i2c_block_data(ec->client, cmd, resp_len, resp); + + if (ret < 0) + return ret; + else if (ret =3D=3D 0 || ret =3D=3D 0xff) + return -EOPNOTSUPP; + + if (resp[0] >=3D resp_len) + return -EINVAL; + + return 0; +} + +/* + * EC Device Firmware Version: + * + * Read Response: + * ---------------------------------------------------------------------- + * | Offset | Name | Description | + * ---------------------------------------------------------------------- + * | 0x00 | Byte count | Number of bytes in response | + * | | | (exluding byte count) | + * ---------------------------------------------------------------------- + * | 0x01 | Test-version | Test-version of EC firmware | + * ---------------------------------------------------------------------- + * | 0x02 | Sub-version | Sub-version of EC firmware | + * ---------------------------------------------------------------------- + * | 0x03 | Main-version | Main-version of EC firmware | + * ---------------------------------------------------------------------- + * + */ +static int qcom_ec_read_fw_version(struct device *dev) +{ + struct i2c_client *client =3D to_i2c_client(dev); + struct qcom_ec *ec =3D i2c_get_clientdata(client); + struct qcom_ec_version *version =3D &ec->version; + u8 resp[EC_FW_VERSION_RESP_LEN]; + int ret; + + ret =3D qcom_ec_read(ec, EC_FW_VERSION_CMD, EC_FW_VERSION_RESP_LEN, resp); + if (ret < 0) + return ret; + + version->main_version =3D resp[3]; + version->sub_version =3D resp[2]; + version->test_version =3D resp[1]; + + dev_dbg(dev, "EC Version %d.%d.%d\n", + version->main_version, version->sub_version, version->test_version); + + return 0; +} + +/* + * EC Device Thermal Capabilities: + * + * Read Response: + * -----------------------------------------------------------------------= ------- + * | Offset | Name | Description | + * -----------------------------------------------------------------------= ------- + * | 0x00 | Byte count | Number of bytes in response | + * | | | (exluding byte count) | + * -----------------------------------------------------------------------= ------- + * | 0x02 (LSB) | EC Thermal | Bit 0-1: Number of fans | + * | 0x3 | Capabilities | Bit 2-4: Type of fan | + * | | | Bit 5-6: Reserved | + * | | | Bit 7: Data Valid/Invalid | + * | | | (Valid - 1, Invalid - 0) | + * | | | Bit 8-15: Thermistor 0 - 7 presence | + * | | | (0 present, 1 absent) | + * -----------------------------------------------------------------------= ------- + * + */ +static int qcom_ec_thermal_capabilities(struct device *dev) +{ + struct i2c_client *client =3D to_i2c_client(dev); + struct qcom_ec *ec =3D i2c_get_clientdata(client); + struct qcom_ec_thermal_cap *cap =3D &ec->thermal_cap; + u8 resp[EC_THERMAL_CAP_RESP_LEN]; + int ret; + + ret =3D qcom_ec_read(ec, EC_THERMAL_CAP_CMD, EC_THERMAL_CAP_RESP_LEN, res= p); + if (ret < 0) + return ret; + + cap->fan_cnt =3D min(EC_MAX_FAN_CNT, EC_THERMAL_FAN_CNT(resp[1])); + cap->fan_type =3D EC_THERMAL_FAN_TYPE(resp[1]); + cap->thermistor_mask =3D EC_THERMAL_THERMISTOR_MASK(resp[2]); + + dev_dbg(dev, "Fan count: %d Fan Type: %d Thermistor Mask: %d\n", + cap->fan_cnt, cap->fan_type, cap->thermistor_mask); + + return 0; +} + +static irqreturn_t qcom_ec_irq(int irq, void *data) +{ + struct qcom_ec *ec =3D data; + struct device *dev =3D &ec->client->dev; + int val; + + val =3D i2c_smbus_read_byte_data(ec->client, EC_SCI_EVT_READ_CMD); + if (val < 0) { + dev_err(dev, "Failed to read EC SCI Event: %d\n", val); + return IRQ_HANDLED; + } + + switch (val) { + case EC_FAN1_STATUS_CHANGE_EVT: + dev_dbg(dev, "Fan1 status changed\n"); + break; + case EC_FAN2_STATUS_CHANGE_EVT: + dev_dbg(dev, "Fan2 status changed\n"); + break; + case EC_FAN1_SPEED_CHANGE_EVT: + dev_dbg(dev, "Fan1 speed crossed low/high trip point\n"); + break; + case EC_FAN2_SPEED_CHANGE_EVT: + dev_dbg(dev, "Fan2 speed crossed low/high trip point\n"); + break; + case EC_NEW_LUT_SET_EVT: + dev_dbg(dev, "New LUT set\n"); + break; + case EC_FAN_PROFILE_SWITCH_EVT: + dev_dbg(dev, "FAN Profile switched\n"); + break; + case EC_THERMISTOR_1_THRESHOLD_CROSS_EVT: + dev_dbg(dev, "Thermistor 1 threshold crossed\n"); + break; + case EC_THERMISTOR_2_THRESHOLD_CROSS_EVT: + dev_dbg(dev, "Thermistor 2 threshold crossed\n"); + break; + case EC_THERMISTOR_3_THRESHOLD_CROSS_EVT: + dev_dbg(dev, "Thermistor 3 threshold crossed\n"); + break; + case EC_RECOVERED_FROM_RESET_EVT: + dev_dbg(dev, "EC recovered from reset\n"); + break; + default: + dev_dbg(dev, "Unknown EC event: %d\n", val); + break; + } + + return IRQ_HANDLED; +} + +static int qcom_ec_sci_evt_control(struct device *dev, bool enable) +{ + struct i2c_client *client =3D to_i2c_client(dev); + u8 control =3D enable ? 1 : 0; + int ret; + + ret =3D i2c_smbus_write_byte_data(client, EC_SCI_EVT_CONTROL_CMD, control= ); + + return ret; +} + +static int qcom_ec_fan_get_max_state(struct thermal_cooling_device *cdev, = unsigned long *state) +{ + *state =3D EC_FAN_MAX_PWM; + + return 0; +} + +static int qcom_ec_fan_get_cur_state(struct thermal_cooling_device *cdev, = unsigned long *state) +{ + struct qcom_ec_cooling_dev *ec_cdev =3D cdev->devdata; + + *state =3D ec_cdev->state; + + return 0; +} + +/* + * Fan Debug control command: + * + * Command Payload: + * -----------------------------------------------------------------------= --------------- + * | Offset | Name | Description | + * -----------------------------------------------------------------------= --------------- + * | 0x00 | Command | Fan control command | + * -----------------------------------------------------------------------= --------------- + * | 0x01 | Fan ID | 0x1 : Fan 1 | + * | | | 0x2 : Fan 2 | + * -----------------------------------------------------------------------= --------------- + * | 0x02 | Byte count =3D 4| Size of data to set fan speed | + * -----------------------------------------------------------------------= --------------- + * | 0x03 | Mode | Bit 0: Debug Mode On/Off (0 - OFF, 1 - ON ) | + * | | | Bit 1: Fan On/Off (0 - Off, 1 - ON) | + * | | | Bit 2: Debug Type (0 - RPM, 1 - PWM) | + * -----------------------------------------------------------------------= --------------- + * | 0x04 (LSB) | Speed in RPM | RPM value, if mode selected is RPM | + * | 0x05 | | | + * -----------------------------------------------------------------------= --------------- + * | 0x06 | Speed in PWM | PWM value, if mode selected is PWM (0 - 255) | + * _______________________________________________________________________= _______________ + * + */ +static int qcom_ec_fan_debug_mode_off(struct qcom_ec_cooling_dev *ec_cdev) +{ + struct device *dev =3D ec_cdev->parent_dev; + struct i2c_client *client =3D to_i2c_client(dev); + u8 request[6] =3D { ec_cdev->fan_id, EC_FAN_SPEED_DATA_SIZE, + EC_FAN_DEBUG_MODE_OFF, 0, 0, 0 }; + int ret; + + ret =3D i2c_smbus_write_i2c_block_data(client, EC_FAN_DBG_CONTROL_CMD, + sizeof(request), request); + if (ret) + dev_err(dev, "Failed to turn off fan%d debug mode: %d\n", + ec_cdev->fan_id, ret); + + return ret; +} + +static int qcom_ec_fan_set_cur_state(struct thermal_cooling_device *cdev, = unsigned long state) +{ + struct qcom_ec_cooling_dev *ec_cdev =3D cdev->devdata; + struct device *dev =3D ec_cdev->parent_dev; + struct i2c_client *client =3D to_i2c_client(dev); + + u8 request[6] =3D { ec_cdev->fan_id, EC_FAN_SPEED_DATA_SIZE, + EC_FAN_DEBUG_MODE_ON | EC_FAN_ON | EC_FAN_DEBUG_TYPE_PWM, + 0, 0, state }; + int ret; + + ret =3D i2c_smbus_write_i2c_block_data(client, EC_FAN_DBG_CONTROL_CMD, + sizeof(request), request); + if (ret) { + dev_err(dev, "Failed to set fan pwm: %d\n", ret); + return ret; + } + + ec_cdev->state =3D state; + + return 0; +} + +static const struct thermal_cooling_device_ops qcom_ec_thermal_ops =3D { + .get_max_state =3D qcom_ec_fan_get_max_state, + .get_cur_state =3D qcom_ec_fan_get_cur_state, + .set_cur_state =3D qcom_ec_fan_set_cur_state, +}; + +static int qcom_ec_resume(struct device *dev) +{ + struct i2c_client *client =3D to_i2c_client(dev); + int ret; + + ret =3D i2c_smbus_write_byte_data(client, EC_MODERN_STANDBY_CMD, EC_MODER= N_STANDBY_ENTER); + + return ret; +} + +static int qcom_ec_suspend(struct device *dev) +{ + struct i2c_client *client =3D to_i2c_client(dev); + int ret; + + ret =3D i2c_smbus_write_byte_data(client, EC_MODERN_STANDBY_CMD, EC_MODER= N_STANDBY_EXIT); + + return ret; +} + +static int qcom_ec_probe(struct i2c_client *client) +{ + struct qcom_ec_cooling_dev *cdev; + struct device *dev =3D &client->dev; + struct qcom_ec *ec; + int ret, i; + + ec =3D devm_kzalloc(dev, sizeof(*ec), GFP_KERNEL); + if (!ec) + return -ENOMEM; + + ec->client =3D client; + + ret =3D devm_request_threaded_irq(dev, client->irq, NULL, qcom_ec_irq, + IRQF_ONESHOT, "qcom_ec", ec); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to get irq\n"); + + i2c_set_clientdata(client, ec); + + ret =3D qcom_ec_read_fw_version(dev); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to read ec firmware version\n"); + + ret =3D qcom_ec_thermal_capabilities(dev); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to read thermal capabilities\n"); + + ret =3D qcom_ec_sci_evt_control(dev, true); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to enable SCI events\n"); + + ec->ec_cdev =3D devm_kcalloc(dev, ec->thermal_cap.fan_cnt, sizeof(*ec->ec= _cdev), GFP_KERNEL); + if (!ec->ec_cdev) + return -ENOMEM; + + for (i =3D 0; i < ec->thermal_cap.fan_cnt; i++) { + struct qcom_ec_cooling_dev *ec_cdev =3D &ec->ec_cdev[i]; + char name[EC_FAN_NAME_SIZE]; + + snprintf(name, EC_FAN_NAME_SIZE, "qcom_ec_fan_%d", i); + ec_cdev->fan_id =3D i + 1; + ec_cdev->parent_dev =3D dev; + + ec_cdev->cdev =3D thermal_cooling_device_register(name, ec_cdev, + &qcom_ec_thermal_ops); + if (IS_ERR(ec_cdev->cdev)) { + dev_err_probe(dev, PTR_ERR(cdev), + "Thermal cooling device registration failed\n"); + ret =3D -EINVAL; + goto unroll_cooling_dev; + } + } + + return 0; + +unroll_cooling_dev: + for (i--; i >=3D 0; i--) { + struct qcom_ec_cooling_dev *ec_cdev =3D &ec->ec_cdev[i]; + + if (ec_cdev->cdev) { + thermal_cooling_device_unregister(ec_cdev->cdev); + ec_cdev->cdev =3D NULL; + } + } + + return ret; +} + +static void qcom_ec_remove(struct i2c_client *client) +{ + struct qcom_ec *ec =3D i2c_get_clientdata(client); + struct device *dev =3D &client->dev; + int ret; + + ret =3D qcom_ec_sci_evt_control(dev, false); + if (ret < 0) + dev_err(dev, "Failed to disable SCI events: %d\n", ret); + + for (int i =3D 0; i < ec->thermal_cap.fan_cnt; i++) { + struct qcom_ec_cooling_dev *ec_cdev =3D &ec->ec_cdev[i]; + + qcom_ec_fan_debug_mode_off(ec_cdev); + + if (ec_cdev->cdev) { + thermal_cooling_device_unregister(ec_cdev->cdev); + ec_cdev->cdev =3D NULL; + } + } +} + +static const struct of_device_id qcom_ec_of_match[] =3D { + { .compatible =3D "qcom,hamoa-crd-ec" }, + {} +}; +MODULE_DEVICE_TABLE(of, qcom_ec_of_match); + +static const struct i2c_device_id qcom_ec_i2c_id_table[] =3D { + { "qcom-hamoa-ec", }, + {} +}; +MODULE_DEVICE_TABLE(i2c, qcom_ec_i2c_id_table); + +static DEFINE_SIMPLE_DEV_PM_OPS(qcom_ec_pm_ops, + qcom_ec_suspend, + qcom_ec_resume); + +static struct i2c_driver qcom_ec_i2c_driver =3D { + .driver =3D { + .name =3D "qcom-hamoa-ec", + .of_match_table =3D qcom_ec_of_match, + .pm =3D &qcom_ec_pm_ops + }, + .probe =3D qcom_ec_probe, + .remove =3D qcom_ec_remove, + .id_table =3D qcom_ec_i2c_id_table, +}; +module_i2c_driver(qcom_ec_i2c_driver); + +MODULE_DESCRIPTION("QCOM Hamoa Embedded Controller"); +MODULE_LICENSE("GPL"); --=20 2.34.1 From nobody Tue Apr 7 11:18:08 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59CEC348453 for ; Fri, 13 Mar 2026 10:31:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397908; cv=none; b=X2j6RKbKnPZyWxbWaVNVoB5PVc+xrCt6Hhk7Uh3F4+ezuBPRi03Vz/fs+P112cfV16oBq8Ay3CaCr53Bv3S+eUJSjMPFqdVc90g7eB7CSEnmeRRqzadK0s67uZmEvhmeS0HdPnZf29+T9NxiHhihXjdxEhSWUGxCC2YqjmofDp8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397908; c=relaxed/simple; bh=xldEZlkL3TP9FPHEHS9y1uxnS59IKMaOFivpS/3Xf5Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PqzYqjGUipCD30zM2u8MRG2TfKIVbSCTmuedptr+DwBATFreAZXSVUDbwcjX+PGWTCVV/6MJ69tC7k5zHqZEPF/zu6FGq4qkFnRT1kKx35meFcAMnWweYvQhdJ+0lSHAKUWghlT5ronqADxVDmBt7ojiDYkmkzwyLzkDz3wWLWE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ZGA1ALx5; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=VH7kGVaV; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ZGA1ALx5"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="VH7kGVaV" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62D9B9fZ3906341 for ; Fri, 13 Mar 2026 10:31:46 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 9Xvn1JCUZ0cwf2oMk92ZZMfp11uTKnNctokTsra0oTI=; b=ZGA1ALx5Nw7NAUxf iHavz+RLs5A9WQ2kmgGWiRoC2bF9OyWSvNKcb8OALU7DXspyVI83E25FYBlu3bjy Gs0YLQTYORE0SUWsKE0yng0MoRz0rOHjN4XNjxDXI5qAXx8Me7C1NTkENe6DF6oi VpX+kqbP6QNVqdHvdzz0MQZbToheT1tvk2Swl4f0MGwNv6rhe8sv9KyyiIYOeUbT JwmUOABlwtn4f45DvwW6cHbLceexvZ4gqGFTeir8x2tx+LTeUuy8HE8VbkXcbFV1 yEQCGaX9S9J5+Ob2fXMORuMEWTAcqaGmmi4FWt8Jv6o1tbu8wiUpFvJapYTC/ZCf cVucuQ== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4cvfqs89fy-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 13 Mar 2026 10:31:46 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-354c0234c1fso2391878a91.2 for ; Fri, 13 Mar 2026 03:31:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1773397905; x=1774002705; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=9Xvn1JCUZ0cwf2oMk92ZZMfp11uTKnNctokTsra0oTI=; b=VH7kGVaVQu6lwZ32yAe6/RobbzO4z9srOnLeyCGXD8zaZulRMx0X3Pih1DC14LW9w7 cS+DyJXbV/DapVQMCIQQrOOZJn/gmE54Dv046cwT7WlEKSmKCENoe4ME1SCBEjZ0F2rr 77Ewogbmgbr2nnDlOAcqn//K+9/XogGEQ9Kp6HjHwYxeDk1iVYsHNqt/Ns/GpTgSeeJf LpAsbd42gJvrGsycxx9yX8snx9e2WA7QSM8wj+lqjTg7rv7RwpwzIL0pzp6lpgpTpgPl KeQjvQd/tE/A539d7qn/jM6Q4/5/FPK+fYFfhw/+tfSPKcM9zjdGIpxkJnDaq0zePdMW cc1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773397905; x=1774002705; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=9Xvn1JCUZ0cwf2oMk92ZZMfp11uTKnNctokTsra0oTI=; b=ojIx5+zzGNriVHDqSekBPvsIIk0oIgxXkiiAmrCbbd1MMe7ROnLHXjhaKpJfTtXr71 fgjXbh5K2l2YLjeGDxqQmY4bWGjJRbwM3bw2ZPMFBJuc1Umbp8YlzBii2H29ogv02dpP 9+2hzBv82k9+uBoClS92Y/iV0/OL9YuWTvIZFVUKeP7qjDTH68L0dL5v1kPuv/xCI5EX 2qN0bUWo1JJ4c1DPcwxaVtN9FgmT+eOlGRISgRaxuw0u+7pm6Mdq53swf34gk1WBXFE7 OhEAJSrhvk0mnpoAmOvaQqE9eMCfjNxcK5cXGp+tUCpLk0u7ye18bQw5vi5WlB3Ax9tp HQ4g== X-Forwarded-Encrypted: i=1; AJvYcCUaX173Uscca/9zckH0dIgXWqs7uX5fNWRFL6w3O996wq9kZb7jg3sRSNCYosKiLOsAngsIbAkxfMU/zms=@vger.kernel.org X-Gm-Message-State: AOJu0YzJZanXZfopElbytoDJ9dniP7qU0oZU8ehYwuqzAVYevVjMdCbg QC16mNFKYKUfjNmPfby1zuPAMmpYOWiNKJROyDV8D3k1QAZqfa6bRNoX1maBmE9PVMhkoEDj4Sq q7PZ+2VwkJngwfJdo+jEcHG66nAiGOfIMJlreA0yN13pRUE03NXTHacw4FSF05tE3VrM= X-Gm-Gg: ATEYQzwjfeBg3nm4h2S53T5CR3RthXy8aPaem68H8xSMKwWeCwblbeFvCm7SmHWVti+ xJDUVhgkRWFVhJIXTY7JgYap29uV4Ysur4H20GpFmvN+YT4fftjMubcvryuQwWrFkTscl68STAQ LGIRJtbEmGZ19Ss406MAc5551zscUAzSl4Xyrrt9OePPn1uNorWltvgp8WKm7QtW2VS1ZpMs/g/ 2SFkUeNyfyrYWLuIg18CrjSq8IOn91KIqN3j6IHLTeuYD99TwRIQrjOMu5GPW/X3ujEwLl6d0G3 k6i2t3figLkN48rFS6avpr4JIqU8bIRP3sx9HM6rMeZkjrwqKwOSufRT16dd3eoFKkHsUPkanvL yLxoHuRVSLiDxEWmEphpRrzFqcbagEMeoSmv6iUtivWB42pcEpLDV57w96THL7+Ddp0LX4U067B hqr+FP8+v9UZCJ7ohKl37qDgrTrakpmzndFg== X-Received: by 2002:a17:90b:3908:b0:34c:6124:3616 with SMTP id 98e67ed59e1d1-35a22055899mr2461299a91.27.1773397905188; Fri, 13 Mar 2026 03:31:45 -0700 (PDT) X-Received: by 2002:a17:90b:3908:b0:34c:6124:3616 with SMTP id 98e67ed59e1d1-35a22055899mr2461274a91.27.1773397904697; Fri, 13 Mar 2026 03:31:44 -0700 (PDT) Received: from hu-ajainp-blr.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35a02fc9454sm8604577a91.12.2026.03.13.03.31.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 03:31:44 -0700 (PDT) From: Anvesh Jain P Date: Fri, 13 Mar 2026 15:59:53 +0530 Subject: [PATCH v4 3/5] arm64: dts: qcom: glymur-crd: Add Embedded controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260313-v04-add-driver-for-ec-v4-3-ca9d0efd62aa@oss.qualcomm.com> References: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> In-Reply-To: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> To: Sibi Sankar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, Anvesh Jain P X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773397885; l=1464; i=anvesh.p@oss.qualcomm.com; s=20260313; h=from:subject:message-id; bh=8N7OjW2s6im3g+0cokctzc9m2ycLJN/bB2F3iLp7CGM=; b=f8mLTT9leD61wtzAtfCRAB5ZhTMzEhqIRJgSK/TzgBXB0qkn4ndB5oyTHwLCgLZEfn9iw0Npp UNVsp2YDg9YD2314Y0ezS3gznzpTdipPpIIwudiEuSgd1XxPvwmiHf7 X-Developer-Key: i=anvesh.p@oss.qualcomm.com; a=ed25519; pk=8o9EG7gkPe2Er9y9UVCx8MTdcFCwU8Pa54hBZPuduXE= X-Proofpoint-ORIG-GUID: B84-yPUkmSawXu6qjMn_su6bqI44TS7z X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzEzMDA4MiBTYWx0ZWRfX+bNpyrWz97t8 Sfh7Zyv1YXc3kUdzckI0AY+mCJW9k5HoPzWTnR7KZ0nWh6le1eKJRLLQz2BMPnijlK/B1MC7tZ8 rs7+TP2wLLIFOs2vutTDvp0q48dbbtaCtfOK9Ff6WOLBkKDN7MciAOzqgBsOpTy1ERjZgL9h5ls A84FV9X4FRtNITLN+UIeQ8yrsGPqc/n8jeDbvgPyqbR9SmNpVTQk+UIwGM6T9/mv7i3mdHRqpAi HY5IVfyCCbls2FtRUA7TeCPpU4mngwnUoHSxs4p7znhkLbQXp8B7Ma/HBn/tw1BY7pKxDFuvarH /bP6z2VdnIKm+ApvTGbynBKJy8DnlVs+pIoayxLa31Hq3BL18SGdQyDpNcObl4+mjkJgpol1q6K VyrRvcI056gyM2dzQX6ZZBkTzvS2k8Z9ZGLVSZTLeOZuGHi4LFbwOh5AISAvG5yCGaSwlZBxPU/ Jyft8rMaXUtijS2Bs2A== X-Proofpoint-GUID: B84-yPUkmSawXu6qjMn_su6bqI44TS7z X-Authority-Analysis: v=2.4 cv=GoNPO01C c=1 sm=1 tr=0 ts=69b3e792 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=QoH_nSX9lomw0ZZp7d4A:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-13_02,2026-03-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 bulkscore=0 priorityscore=1501 phishscore=0 clxscore=1011 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603130082 From: Sibi Sankar Add embedded controller node for Glymur CRDs which adds fan control, temperature sensors, access to EC state changes through SCI events and suspend entry/exit notifications to the EC. Signed-off-by: Sibi Sankar Co-developed-by: Anvesh Jain P Signed-off-by: Anvesh Jain P Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/glymur-crd.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/= qcom/glymur-crd.dts index 877945319012..ae24af25aa6d 100644 --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts @@ -367,6 +367,22 @@ vreg_l4h_e0_1p2: ldo4 { }; }; =20 +&i2c9 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + embedded-controller@76 { + compatible =3D "qcom,glymur-crd-ec", "qcom,hamoa-crd-ec"; + reg =3D <0x76>; + + interrupts-extended =3D <&tlmm 66 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 =3D <&ec_int_n_default>; + pinctrl-names =3D "default"; + }; +}; + &pcie3b { vddpe-3v3-supply =3D <&vreg_nvmesec>; =20 @@ -490,6 +506,12 @@ &tlmm { <10 2>, /* OOB UART */ <44 4>; /* Security SPI (TPM) */ =20 + ec_int_n_default: ec-int-n-state { + pins =3D "gpio66"; + function =3D "gpio"; + bias-disable; + }; + pcie4_default: pcie4-default-state { clkreq-n-pins { pins =3D "gpio147"; --=20 2.34.1 From nobody Tue Apr 7 11:18:08 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0EEE36CE19 for ; Fri, 13 Mar 2026 10:31:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397913; cv=none; b=QNNkaOBGJkQTc2kotYqZev9p+j6fswoFKkLhY2p1KCgeThlneWu542roH7hmX8QqczyXmdpejWqFB738dsbKAg+C4xKHdjEUhS/dMB23DW5lYBQHCFyR5Boj6m0PcnBU4naO+JsCc45pSeLcZOLU2tDaHRG4aSdJIL11rL/tjHM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397913; c=relaxed/simple; bh=ioU0R5DvWAxH3BbtVQW71w1R9pFivjF1xgNCOqTS+Bw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=q2kLfzpiWZSa0sNWl87FZNRMwKUGafz4Xgvd3RJOashz6EciRkkgda90vpiK7T75Y9Jyi81Z7cssPAWBULRcYuAOuNU8a09sbCy6Da10RuAc1wdFR6JWIxmP+3ucBQdH5p0qlLXaygB0VFJJUkFx3IHUkaGT7rdagJNOG3vX4B0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=j5RQfBbC; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=NjYX2+Zh; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="j5RQfBbC"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="NjYX2+Zh" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62D8vCMY481530 for ; Fri, 13 Mar 2026 10:31:50 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= i9qisWVnXG0axSpKhRaWffp9loppOSeVL6k4KPV9VJM=; b=j5RQfBbCVBIxwVTi sC4swklYBDS5ka1kbFDUgR08DNZLssDAJ7s09tk1JIsimBPxJRzrtYRyd56P0qlK JArebeQIeTNPOYPxbpo/gIWxM/8NxXYKyHnngRW2+tj9H/gGlgIOb86aajkqqfvU pFWsjAZtPhGViS3n1O2+Al4Dwwb17s+RGvU+Eo89REIK+xUgkXCvTLMQkvUwXvrf DUaY8BIkCg5SviDM58/vbzCXPEd53kDcy0VvuHmB1cWWQ6GvAruVo42LhjHu8+69 s2ciN7kk19wR5u8qdKxSo29l26uUuvJgmncnNVW7BXg4XTC4kEgg2v+vuj1iG6WN flW1EQ== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4cvfh7rbax-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 13 Mar 2026 10:31:50 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-35a188e5aa2so1236728a91.1 for ; Fri, 13 Mar 2026 03:31:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1773397910; x=1774002710; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=i9qisWVnXG0axSpKhRaWffp9loppOSeVL6k4KPV9VJM=; b=NjYX2+ZhznnIWa1g/Lv1yzIGqN+LHm6PEOx/wSg5BnHJRkaZdX4Y1M2NVYX35bKYXo EEOIA9IOYCmLf7vwwIeSMbllQFLC00c0Jw1S1kV3SfqQH40/FLYACmrsvDF4pNOgJ4xP ybcywr2phLeAWOIRvocw1DogqDgFzt8LlbXp/0MqxtIte68jDBzn+PV/TeKR01W59ud+ r7hq50cdX86MebN0tiPOItYhLZ8weT7FgpR9q7Qv00sdeqrxsR0yorKNVfjGaJM6v2mn hXbfnfBstGudxzuDz1ZqCbBuFnoe4olGdtNqurMyvABp0UmpgZxOoyZmgd0RUuGWHrHx 5ujg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773397910; x=1774002710; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=i9qisWVnXG0axSpKhRaWffp9loppOSeVL6k4KPV9VJM=; b=aOCVs8GX9fzQVCdI0EeRH104B/J0t9PkAsgpgVBSVHhJ7x/cFWjm/OsJzCR1/MILqw yNgZB3rSbuD3fgYLjFrJ7tOkIxSkxXBASblWXFNdAJnvPU/PK+KhCvJ0hPJiduAg+2yG ep/6CUQAEV3kDjEDSCuHOMcaY7+daw4YNSJYXzO4wabT4y/3Q3uZC64drOs6RRQsHvCF DhNtVNXrZ11NV6asakLGei1G7gkoBXJBEbcWwJrZvVZY6y3FxQEGIfRHur80Yar5qRLE i18olEV3PstueAhUgw4sKkVHKaRQd1Z9ZK5tBkNEJmRlVhX0qgsrcT7qHZYkSTVKhvsP 9jgg== X-Forwarded-Encrypted: i=1; AJvYcCV4MAtEmNINxwbfDx34euZIkD7AUPqtEZJ68w84dMjRs1emrY5B5JqwDqHsi23YKG1EnlydJVcQIklQbsE=@vger.kernel.org X-Gm-Message-State: AOJu0YySH1j9Ti/Yh3Tt73jjDjt4jwa07gATNOTsthrRIMArGIRwse5V QEEAwQw/Sb9kioX50dmAZvRWYpeBoqZLxI/C5oo90dIokURgjF402YyHkauh8P8yGSo8bre/tnO pa1TOqgjwmFJ7DWC9p5fd+n6mMvdVedWrPvsiJz1bTasTMM9TDr30A65fZTai4J3AQUk= X-Gm-Gg: ATEYQzxR4I5jfGu+HcQTbRwgRK5iZVR1XfXFpFmPXer9PXAsJjXnCUQYbLLTg8Kwi/i +K4xLy7z+ENRaxy4/dh2tC3YOhNFzbNTTilE2mJXWI+r6shUNpaMvqov8XpQw9q9yVuCSkN7aNF SekjoJe6MnmSXjr4OT0DotIFaRbwZQTnorQVQpvHZ3CT/fJfRW6LUr3W+uz4WLu3/wfYyDiXVnB fvP8jOPU3yTC/0h+3+8IVF4JAqYN1j7lP1YjsOXcV2Hy125NCanXVoPhNzTFB7/OsYyZ+Ot/5Sm qVTRuo4VbMBZ3k8j1X+nfg4k59uK+uGU0v8KRMIz1BDyJFYPiKGWIjOoyRDsnxgh2MVIAUbQvPV f1NxkWf++agq8xkH2ic+6mouVRbw6KGhNuSAyktmhgdjnfT+d9x9ByknCKC0hV3SuVLGllnDRgR 6yoz6VvRSHTiVzN0wTAwR3jua1hUm2InD1eQ== X-Received: by 2002:a17:90b:3e8c:b0:359:bb60:9b7e with SMTP id 98e67ed59e1d1-35a2200344dmr2521949a91.27.1773397909815; Fri, 13 Mar 2026 03:31:49 -0700 (PDT) X-Received: by 2002:a17:90b:3e8c:b0:359:bb60:9b7e with SMTP id 98e67ed59e1d1-35a2200344dmr2521907a91.27.1773397909300; Fri, 13 Mar 2026 03:31:49 -0700 (PDT) Received: from hu-ajainp-blr.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35a02fc9454sm8604577a91.12.2026.03.13.03.31.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 03:31:48 -0700 (PDT) From: Anvesh Jain P Date: Fri, 13 Mar 2026 15:59:54 +0530 Subject: [PATCH v4 4/5] arm64: dts: qcom: x1-crd: Add Embedded controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260313-v04-add-driver-for-ec-v4-4-ca9d0efd62aa@oss.qualcomm.com> References: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> In-Reply-To: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> To: Sibi Sankar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, Anvesh Jain P X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773397885; l=1323; i=anvesh.p@oss.qualcomm.com; s=20260313; h=from:subject:message-id; bh=MmynX+YUKCI48fsEMucxFayEj5jtotLLwXapIGwI67U=; b=Mp4Qx4HrGGfCTyYoK7rpV50UIVbEMWUtIiENNJVoqQI2UqgvOTMkzkgrIvvwypN/Nos6IzPY3 pd+rOV/q41zAsRSClDmOmmE2FPbEgYlIbXWVVuE+oh3y5vk1q6EMWPY X-Developer-Key: i=anvesh.p@oss.qualcomm.com; a=ed25519; pk=8o9EG7gkPe2Er9y9UVCx8MTdcFCwU8Pa54hBZPuduXE= X-Proofpoint-ORIG-GUID: dR5AgictCccH2_qsHqqIAP2gEetmQhj5 X-Proofpoint-GUID: dR5AgictCccH2_qsHqqIAP2gEetmQhj5 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzEzMDA4MiBTYWx0ZWRfXziCZRJiIR6im xpq0h5fh4QEIJLb1io5gw/+lkwyrm6duaVFdkUwGheCe/MWxH8jRXnfF3acO//NTBLwKaEc3pI0 9R5WBDkc+BKzcTtyy9/antlo/SZPaZnb4mqHrP2YU+ix5XFUakXIzD+HYSDsryoyknTii+sNxV8 veklrxCywgQ6kVQ6XpXB64efDujObTTgxZm3e5fg79f6bFye3ZwK+zHbHDLpiKUsYRoeXb4TFuG nkUi7hfxkTzybboZdtEgkC5B3Hr+QaKS0QwHLEQ24IQALqzfWtjzxGgWjBfVcd48K4tagv9QrEp tE3Y34cPYgSXz2ZRSqKe0qCa83lNZjPU5x+ThLJMkE2E8uz1Ceu2S7t7iBa94e3nF3+jkz+p3dX uTNIDAzkIsRFq9qp7k3cyNluyWrG/45u//mSYQzUZ7T9U5oNWjoxrKBQyxZ4pA/L8PYKYsmeRIw 93QFRKatCMEtfXyMzWg== X-Authority-Analysis: v=2.4 cv=BpiQAIX5 c=1 sm=1 tr=0 ts=69b3e796 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=gaXMZf0GDK_To7W6ZIUA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-13_02,2026-03-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603130082 From: Sibi Sankar Add embedded controller node for Hamoa/Purwa CRDs which adds fan control, temperature sensors, access to EC internal state changes and suspend entry/exit notifications to the EC. Signed-off-by: Sibi Sankar Co-developed-by: Anvesh Jain P Signed-off-by: Anvesh Jain P Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/x1-crd.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qco= m/x1-crd.dtsi index ded96fb43489..d523e7cea3ec 100644 --- a/arch/arm64/boot/dts/qcom/x1-crd.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-crd.dtsi @@ -1042,6 +1042,16 @@ eusb6_repeater: redriver@4f { =20 #phy-cells =3D <0>; }; + + embedded-controller@76 { + compatible =3D "qcom,hamoa-crd-ec"; + reg =3D <0x76>; + + interrupts-extended =3D <&tlmm 66 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 =3D <&ec_int_n_default>; + pinctrl-names =3D "default"; + }; }; =20 &i2c7 { @@ -1485,6 +1495,12 @@ &tlmm { <44 4>, /* SPI (TPM) */ <238 1>; /* UFS Reset */ =20 + ec_int_n_default: ec-int-n-state { + pins =3D "gpio66"; + function =3D "gpio"; + bias-disable; + }; + edp_reg_en: edp-reg-en-state { pins =3D "gpio70"; function =3D "gpio"; --=20 2.34.1 From nobody Tue Apr 7 11:18:08 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E972535AC37 for ; Fri, 13 Mar 2026 10:31:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397918; cv=none; b=uD+50Aj/vQkkNywHFWd74d7+GSazbpNDB+fXh3FBqPTa4Qp7l6sVMO/0W8xnk7H28A336iZGmagL2pcBHDMtSqxzHRsGLKxZrMLCDzzTpQcdzxOdqeGif1BBqpsjCPNZOq4PzojUvh+RWslHbGN36DajIWn28/q/FHv9fS6V2OQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773397918; c=relaxed/simple; bh=0gCStdfi90J1zLoNtjQkeV5b9HZ470QUaFZu2d3u/MU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ukfJ8lA9oDa1UnfZJI6aqIWzW1XRtxXDJ4YW1zeaUr7YVervVYCciOegZg4BgDH2w1AQTt+E7LnPUVA+7aFlxztbtEa47KEuQi46pCx6Pw67KPTCRErhhPSC45ksVRd/alM7Vf1UTlDdikClib++huyA5+czhYOlCXuK3f9UH1c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=SyLJzQ75; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=JIWkrUly; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="SyLJzQ75"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="JIWkrUly" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62D5tdi53342514 for ; Fri, 13 Mar 2026 10:31:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= G1sM8vUnMjs/6i3/VG+5tMcUkWBVpAHwFVnLhbHyrhA=; b=SyLJzQ75N9vv376X Vm05qVy8QrVP1Lgftu2Sxg4jvLtPD+vgx2P3gp/0Lhzbjp4905e3bI/vQCfwtyVd ih19WTUMO+ClgasaHn456GF0uAUYCmzkjUO8Zl/+zMJC7Xx/zmawjR5Sxv+L2++I NK5lvzoDFxNkTs50xxf+LR3CdnM4cfrPgF3tp7FhYeHAXyv55ctNCHlut7eWOvsc auz3Kur0hiVvunnkAFLdc8vxwfG/SqbY+At5IAtuPXVdHiw83PyNoB+qkctdx5Rr EFndXyVthBIybpDb8tSnsb6gC73Tpbw+uzwUwc+PE2iObOJ6PeVVoVMs2GmqXEtV qHHuMw== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4cus9w4d80-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 13 Mar 2026 10:31:55 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-35a0337930eso1454690a91.3 for ; Fri, 13 Mar 2026 03:31:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1773397914; x=1774002714; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=G1sM8vUnMjs/6i3/VG+5tMcUkWBVpAHwFVnLhbHyrhA=; b=JIWkrUly33bfkQm5sM4VmgbeEQjYUdLGtOtuRaM5aI/YdDXIRt1T2v9s65J0xMeciz sYSIp+nLsAILSNvT8jiCWkuL53+Hrg2fLbprA98U6q+xOz2OGTEXIO3bU8q4Q0kuclL5 yAf4fBXDHTeT7R2F/w1NJJGApo/v8qOknutPkZOn+EPUhcDQpjBu9bM5PHk55r9sT/Ms LUMmoKFZwNaM7xG4beDTqS2vN+dmpim4Wr9TmB8BT6GYY+Q6EHmX6sFivnAu58SUJPd9 Iuobv+Au2X4md65rc04WXEV9Fa3VJRmZ+xPf8uw7JMiOOmP9BEQcP2CVUNdcnWpGrcj3 P6sQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773397914; x=1774002714; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=G1sM8vUnMjs/6i3/VG+5tMcUkWBVpAHwFVnLhbHyrhA=; b=DIKZ+bY8wIzpYejMtmg6n+W+I4IUcT2oY1BBD2XN8JpJAEWZWTT4gJaek4dFP8xGaU UzczZ4otVa8ewr1rkI221pi7EksOiANY1WQUtJQZf0Pf/6JyXxey9RgxdCYUhLdm41rX o/5YWut91h6GI3jGWgk2EBxuAK9AKn87pTZI/UANbrKrGGaCF91gzSh/9zMcON2nK4v2 u5IwkJXSHQGqg4dNrCUVnNoDzF2um2E/cn3foSbsktFgpRK9TDQ/cmTRuenQgyT4Uh8V Ci5EQetkGj5Cdc0epm+aZMFgCMPh2c4OfomsjokHhU88GyB4cjMrjSV61SXM3y+FSNSZ NH7g== X-Forwarded-Encrypted: i=1; AJvYcCUeGpX6PxRUXb97xOg2+bf4pWH6m1cG4IN0Nk439gDE0ol38AwfWX1SFKK2QqAp/hmB982wymIBFhOYexA=@vger.kernel.org X-Gm-Message-State: AOJu0YySLdsh5s8R2VwVAzbErI6t/WNYeIWOtHod7h17CQrmd96aA+mX D4juH86f2fpuNLcyOFQeLNr61AvWAPEXyX1d8neG4krY4sez3zxKZAITsvCfrNC9m6qJeSiQjVe tazmJFIAq1x0l0RvQtud1ftlpMAenaY7+rhfXTaKAcX4buI1W7rDFztzFmsN2JvtAvjaFijJ6uM 8= X-Gm-Gg: ATEYQzxUn4NdcmzxX2glr14JlCwtknwGuD8a+KVDBIMzhYTuM0R17UAntWN80ynIQtc 69bAkC5tI6bZLt+S+Bf3nuoqZe+g4wLwJULB9JOsz3jl8Ws1ShZ8ohOA51bI0OQ8ryhe3cvd5Ez hFXB0hGQONLvfdLVUYa7e9fYJ5taAhV/bPiHUU7JQ5Csx08f9hc7YxtFrVPEHAqWp+wAzNoIZkz 51Ov5plTZHe0gAdQ2yoEqjalSP95j5wFZ5RJCvjgm7MQO9H59gCML797IH+EHo5pASGSKEDXxsW 4k5y36MdHVXfibMo36qfwUY6nPaQbi1BfYrJYkI+G7HnR2v9NBl8of2rg1WQyJJreq780T6t7qZ TLrKDTL1HMV4XIytZdX3SwU1RfF+7EKoEoGN2C/XN0bEUy3jTsukDcGJgEifAKimoKnIdtdyZyn sat7E3Z5s2y1q2dk5TsKRwlZDsBOJEMa8KRw== X-Received: by 2002:a17:90b:3f85:b0:359:9083:3661 with SMTP id 98e67ed59e1d1-35a21ef110fmr2504040a91.15.1773397914394; Fri, 13 Mar 2026 03:31:54 -0700 (PDT) X-Received: by 2002:a17:90b:3f85:b0:359:9083:3661 with SMTP id 98e67ed59e1d1-35a21ef110fmr2504010a91.15.1773397913946; Fri, 13 Mar 2026 03:31:53 -0700 (PDT) Received: from hu-ajainp-blr.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35a02fc9454sm8604577a91.12.2026.03.13.03.31.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 03:31:53 -0700 (PDT) From: Anvesh Jain P Date: Fri, 13 Mar 2026 15:59:55 +0530 Subject: [PATCH v4 5/5] arm64: dts: qcom: hamoa-iot-evk: Add Embedded controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260313-v04-add-driver-for-ec-v4-5-ca9d0efd62aa@oss.qualcomm.com> References: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> In-Reply-To: <20260313-v04-add-driver-for-ec-v4-0-ca9d0efd62aa@oss.qualcomm.com> To: Sibi Sankar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, Anvesh Jain P X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773397885; l=1383; i=anvesh.p@oss.qualcomm.com; s=20260313; h=from:subject:message-id; bh=koKZLgJJmkvuQ2/G2ERJ69WkW+ygNkTLSWIVLY+GMAQ=; b=mkDfQv7TN6sC9yKQkRfX1VHj36JLzGcZfXhroqENPftWosj0joaCcUq56nrCtg65b3Ouuj9yC f8ZdxNRK+r9DPu+oqOGGHT8xFpnP+mvNejHvJXCyzTmLgOfj21+B5aF X-Developer-Key: i=anvesh.p@oss.qualcomm.com; a=ed25519; pk=8o9EG7gkPe2Er9y9UVCx8MTdcFCwU8Pa54hBZPuduXE= X-Proofpoint-GUID: B9xOGf-_xf301pBzWw3nW86d7QW1usZ4 X-Authority-Analysis: v=2.4 cv=IIIPywvG c=1 sm=1 tr=0 ts=69b3e79b cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=um1wo07bdbQtbc5qrgwA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzEzMDA4MiBTYWx0ZWRfX3SR11cQVzUvu 82R2VdkSi4BLf9yebcmLXNP6SyGmFleMTRFqyyl4gMygqmw0u7uhxdFdtF/66i0t8i18sEHUtTi e6HYQyXSxmtGasEeOrEWY/fHuWwJ0DWnXmwvA24yUqFvRkaRMQzFRAW4sKkVq+B+mITG4G+NL6c lu9Ui+TMOADIZcWmiHuNgAu9Td9MyzqJJkoGvKubSSPnBsFc9sgdEtyEYggXq+bxICX9u9G3HlV SdgX+L1bNBalm0K5eqbFAVMxgyT+ABFzMokf13OonlbIE6ewgnaxIAz8Ni053GLQ7Zijyw9B116 7ibSzd4I9bfsrfaLU3FloRPMNOSxjIW+yBpKZBUZaw60tUKt41FTA+UQ6XHAR5ffg7Q46SZOWT4 Icbr89a9dpuObnyKdyVSHLKna6JzjBD/mTER3SloDg5qCk0mCwaNtk/QXxer+bhiBTSbZ5N+3qG d+xD9Ugr7tnk27MiuYg== X-Proofpoint-ORIG-GUID: B9xOGf-_xf301pBzWw3nW86d7QW1usZ4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-13_02,2026-03-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 impostorscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603130082 From: Sibi Sankar Add embedded controller node for Hamoa IOT EVK boards which adds fan control, temperature sensors, access to EC internal state changes and suspend entry/exit notifications to the EC. Signed-off-by: Sibi Sankar Co-developed-by: Anvesh Jain P Signed-off-by: Anvesh Jain P Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/d= ts/qcom/hamoa-iot-evk.dts index 630642baa435..b3430424a052 100644 --- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts @@ -799,6 +799,16 @@ eusb6_repeater: redriver@4f { pinctrl-0 =3D <&eusb6_reset_n>; pinctrl-names =3D "default"; }; + + embedded-controller@76 { + compatible =3D "qcom,hamoa-iot-evk-ec", "qcom,hamoa-crd-ec"; + reg =3D <0x76>; + + interrupts-extended =3D <&tlmm 66 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 =3D <&ec_int_n_default>; + pinctrl-names =3D "default"; + }; }; =20 &i2c7 { @@ -1272,6 +1282,12 @@ right_tweeter: speaker@0,1 { }; =20 &tlmm { + ec_int_n_default: ec-int-n-state { + pins =3D "gpio66"; + function =3D "gpio"; + bias-disable; + }; + edp_reg_en: edp-reg-en-state { pins =3D "gpio70"; function =3D "gpio"; --=20 2.34.1