From nobody Tue Apr 7 12:53:43 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4BD538F645; Fri, 13 Mar 2026 10:08:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773396516; cv=none; b=UUfYPsZKweSgDhXbeXY7ZkISvWdofMIgmneBzpxaRz3QANy17VMqimy+Y5eIl9DepRELMJChF9/vvOymAG6um4SNKFY1r1QclcBTjd0vGN9BVedkU2LKT9dNR4xounOokNTpvxHIeqlasYbw52ZnR4mdAmTtiCtGilA/7ub+DFM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773396516; c=relaxed/simple; bh=X4P9bqw/tIokZle3LT7wc0YRJfPr51Mfgbm0e+Wf97I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=azxfiqq9eWsdJr90YhQTDZKASyvsGbv4r/48AlF5X/FSVxPkUexhYaON1XZPwCktndJvavyf/vwZK780BSwDteM4dJeDZNskcQgB7R1w8VE0SgklguFOz0P7vXDFwUyzEPHBfQ398ZWVHiCg1eqtYlTSX04knhZJnNYUi/SwdMw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Fri, 13 Mar 2026 18:08:12 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Fri, 13 Mar 2026 18:08:12 +0800 From: aspeedyh Date: Fri, 13 Mar 2026 18:07:42 +0800 Subject: [PATCH 7/7] arm: dts: aspeed: Add eSPI node for AST2600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260313-upstream_espi-v1-7-9504428e1f43@aspeedtech.com> References: <20260313-upstream_espi-v1-0-9504428e1f43@aspeedtech.com> In-Reply-To: <20260313-upstream_espi-v1-0-9504428e1f43@aspeedtech.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , "Andrew Jeffery" , Ryan Chen , Philipp Zabel CC: , , , , , , aspeedyh X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773396491; l=1060; i=yh_chung@aspeedtech.com; s=20260313; h=from:subject:message-id; bh=X4P9bqw/tIokZle3LT7wc0YRJfPr51Mfgbm0e+Wf97I=; b=kK0C0gMsRBFk9Iv1JxhBwvqxNK7ufbtGNrD4kw1oHLHc35n/Xyibin/aLRLMjakvBubMHuRUp n8kx0NtlapOC4TQXotHHwzP3cvScPvveTms/jil7qyQOqdBRtdJO8C3 X-Developer-Key: i=yh_chung@aspeedtech.com; a=ed25519; pk=o71dz0J8lpN+v0f3Mk4gT9PfVngADPC1Pex4aK6VigM= Add the AST2600 eSPI controller node with the register region, interrupt, clock, reset and pinctrl properties. Signed-off-by: aspeedyh --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/as= peed/aspeed-g6.dtsi index 189bc3bbb47c..84aec45f39e7 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -408,6 +408,17 @@ adc1: adc@1e6e9100 { status =3D "disabled"; }; =20 + espi: espi@1e6ee000 { + compatible =3D "aspeed,ast2600-espi"; + reg =3D <0x1e6ee000 0x1000>; + interrupts =3D ; + clocks =3D <&syscon ASPEED_CLK_GATE_ESPICLK>; + resets =3D <&syscon 57>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_espi_default>; + status =3D "disabled"; + }; + sbc: secure-boot-controller@1e6f2000 { compatible =3D "aspeed,ast2600-sbc"; reg =3D <0x1e6f2000 0x1000>; --=20 2.34.1